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* [RFC] drm/i915: PAT: swap UC and WT.
@ 2017-02-28 18:41 Rodrigo Vivi
  2017-02-28 20:53 ` ✓ Fi.CI.BAT: success for " Patchwork
  0 siblings, 1 reply; 2+ messages in thread
From: Rodrigo Vivi @ 2017-02-28 18:41 UTC (permalink / raw)
  To: intel-gfx; +Cc: Ben Widawsky, Rodrigo Vivi

When trying to understand our PPAT table definition I noticed that
pat_sel is composed by:
PAT - Bit 7 of PTE
PCD - Bit 4 of PTE (Cache disabled)
PWT - Bit 3 of PTE (Write through)

So it seems
010 should indicate Uncached while
011 should indicate Write Through

But we are currently doing
Index 2 WT for scanout with eLLC
Index 3 UC fr uncached objects, mostly for scanout.

This patch shouldn't have any real impact because it just change the
internal mapping PTE to PAT in a way that makes more sense of Mapping
PCD and PWT bits.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
 drivers/gpu/drm/i915/i915_gem_gtt.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index df9f71e..f153cd9 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2652,8 +2652,8 @@ static void bdw_setup_private_ppat(struct drm_i915_private *dev_priv)
 
 	pat = GEN8_PPAT(0, GEN8_PPAT_WB | GEN8_PPAT_LLC)     | /* for normal objects, no eLLC */
 	      GEN8_PPAT(1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC) | /* for something pointing to ptes? */
-	      GEN8_PPAT(2, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC) | /* for scanout with eLLC */
-	      GEN8_PPAT(3, GEN8_PPAT_UC)                     | /* Uncached objects, mostly for scanout */
+	      GEN8_PPAT(2, GEN8_PPAT_UC)                     | /* Uncached objects, mostly for scanout */
+	      GEN8_PPAT(3, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC) | /* for scanout with eLLC */
 	      GEN8_PPAT(4, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0)) |
 	      GEN8_PPAT(5, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1)) |
 	      GEN8_PPAT(6, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2)) |
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index f7d4e19..2d831ae 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -128,10 +128,10 @@
 #define I915_PDPES_PER_PDP(dev_priv)	(USES_FULL_48BIT_PPGTT(dev_priv) ?\
 					GEN8_PML4ES_PER_PML4 : GEN8_LEGACY_PDPES)
 
-#define PPAT_UNCACHED_INDEX		(_PAGE_PWT | _PAGE_PCD)
+#define PPAT_UNCACHED_INDEX		_PAGE_PCD
 #define PPAT_CACHED_PDE_INDEX		0 /* WB LLC */
 #define PPAT_CACHED_INDEX		_PAGE_PAT /* WB LLCeLLC */
-#define PPAT_DISPLAY_ELLC_INDEX		_PAGE_PCD /* WT eLLC */
+#define PPAT_DISPLAY_ELLC_INDEX		(_PAGE_PWT | _PAGE_PCD) /* WT eLLC */
 
 #define CHV_PPAT_SNOOP			(1<<6)
 #define GEN8_PPAT_AGE(x)		(x<<4)
-- 
1.9.1

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^ permalink raw reply related	[flat|nested] 2+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915: PAT: swap UC and WT.
  2017-02-28 18:41 [RFC] drm/i915: PAT: swap UC and WT Rodrigo Vivi
@ 2017-02-28 20:53 ` Patchwork
  0 siblings, 0 replies; 2+ messages in thread
From: Patchwork @ 2017-02-28 20:53 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: PAT: swap UC and WT.
URL   : https://patchwork.freedesktop.org/series/20418/
State : success

== Summary ==

Series 20418v1 drm/i915: PAT: swap UC and WT.
https://patchwork.freedesktop.org/api/1.0/series/20418/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11 
fi-bsw-n3050     total:278  pass:239  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19 
fi-bxt-t5700     total:108  pass:95   dwarn:0   dfail:0   fail:0   skip:12 
fi-byt-n2820     total:278  pass:247  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50 
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-kbl-7500u     total:278  pass:259  dwarn:1   dfail:0   fail:0   skip:18 
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17 
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18 
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28 
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29 

5d37006b578e38562382215e8782cfced9c992ce drm-tip: 2017y-02m-28d-16h-27m-13s UTC integration manifest
c9ac31d drm/i915: PAT: swap UC and WT.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4010/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

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2017-02-28 18:41 [RFC] drm/i915: PAT: swap UC and WT Rodrigo Vivi
2017-02-28 20:53 ` ✓ Fi.CI.BAT: success for " Patchwork

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