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* [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write
@ 2017-02-28 10:37 Ley Foon Tan
  2017-02-28 10:39 ` Ley Foon Tan
  2017-02-28 21:11 ` Bjorn Helgaas
  0 siblings, 2 replies; 6+ messages in thread
From: Ley Foon Tan @ 2017-02-28 10:37 UTC (permalink / raw)
  To: Bjorn Helgaas; +Cc: linux-kernel, linux-pci, lftan.linux, Ley Foon Tan, stable

Commit eb5767122feba1 used the TLP_FMTTYPE_CFGRD* for TLP write operation
and this cause writing to configuration space will fail. This patch
fix it by using correct FMTTYPE for write operation.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: stable@vger.kernel.org
---
 drivers/pci/host/pcie-altera.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
index 0c15402..68c839f 100644
--- a/drivers/pci/host/pcie-altera.c
+++ b/drivers/pci/host/pcie-altera.c
@@ -57,10 +57,14 @@
 #define TLP_WRITE_TAG			0x10
 #define RP_DEVFN			0
 #define TLP_REQ_ID(bus, devfn)		(((bus) << 8) | (devfn))
-#define TLP_CFG_DW0(pcie, bus)						\
+#define TLP_CFGRD_DW0(pcie, bus)					\
     ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0			\
 				    : TLP_FMTTYPE_CFGRD1) << 24) |	\
      TLP_PAYLOAD_SIZE)
+#define TLP_CFGWR_DW0(pcie, bus)					\
+    ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0			\
+				    : TLP_FMTTYPE_CFGWR1) << 24) |	\
+     TLP_PAYLOAD_SIZE)
 #define TLP_CFG_DW1(pcie, tag, be)	\
     (((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))
 #define TLP_CFG_DW2(bus, devfn, offset)	\
@@ -222,7 +226,7 @@ static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,
 {
 	u32 headers[TLP_HDR_SIZE];
 
-	headers[0] = TLP_CFG_DW0(pcie, bus);
+	headers[0] = TLP_CFGRD_DW0(pcie, bus);
 	headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);
 	headers[2] = TLP_CFG_DW2(bus, devfn, where);
 
@@ -237,7 +241,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
 	u32 headers[TLP_HDR_SIZE];
 	int ret;
 
-	headers[0] = TLP_CFG_DW0(pcie, bus);
+	headers[0] = TLP_CFGWR_DW0(pcie, bus);
 	headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);
 	headers[2] = TLP_CFG_DW2(bus, devfn, where);
 
-- 
1.8.2.3

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write
  2017-02-28 10:37 [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write Ley Foon Tan
@ 2017-02-28 10:39 ` Ley Foon Tan
  2017-02-28 21:11 ` Bjorn Helgaas
  1 sibling, 0 replies; 6+ messages in thread
From: Ley Foon Tan @ 2017-02-28 10:39 UTC (permalink / raw)
  To: Ley Foon Tan; +Cc: Bjorn Helgaas, linux-kernel, linux-pci, stable

On Tue, Feb 28, 2017 at 6:37 PM, Ley Foon Tan <ley.foon.tan@intel.com> wrote:
> Commit eb5767122feba1 used the TLP_FMTTYPE_CFGRD* for TLP write operation
> and this cause writing to configuration space will fail. This patch
> fix it by using correct FMTTYPE for write operation.
>
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> Cc: stable@vger.kernel.org
> ---
>  drivers/pci/host/pcie-altera.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
> index 0c15402..68c839f 100644
> --- a/drivers/pci/host/pcie-altera.c
> +++ b/drivers/pci/host/pcie-altera.c
> @@ -57,10 +57,14 @@
>  #define TLP_WRITE_TAG                  0x10
>  #define RP_DEVFN                       0
>  #define TLP_REQ_ID(bus, devfn)         (((bus) << 8) | (devfn))
> -#define TLP_CFG_DW0(pcie, bus)                                         \
> +#define TLP_CFGRD_DW0(pcie, bus)                                       \
>      ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0                 \
>                                     : TLP_FMTTYPE_CFGRD1) << 24) |      \
>       TLP_PAYLOAD_SIZE)
> +#define TLP_CFGWR_DW0(pcie, bus)                                       \
> +    ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0                 \
> +                                   : TLP_FMTTYPE_CFGWR1) << 24) |      \
> +     TLP_PAYLOAD_SIZE)
>  #define TLP_CFG_DW1(pcie, tag, be)     \
>      (((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))
>  #define TLP_CFG_DW2(bus, devfn, offset)        \
> @@ -222,7 +226,7 @@ static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,
>  {
>         u32 headers[TLP_HDR_SIZE];
>
> -       headers[0] = TLP_CFG_DW0(pcie, bus);
> +       headers[0] = TLP_CFGRD_DW0(pcie, bus);
>         headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);
>         headers[2] = TLP_CFG_DW2(bus, devfn, where);
>
> @@ -237,7 +241,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
>         u32 headers[TLP_HDR_SIZE];
>         int ret;
>
> -       headers[0] = TLP_CFG_DW0(pcie, bus);
> +       headers[0] = TLP_CFGWR_DW0(pcie, bus);
>         headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);
>         headers[2] = TLP_CFG_DW2(bus, devfn, where);
>
> --
> 1.8.2.3
>
Please use this patch instead. Add cc:stable@vger.kernel.org to the
patch itself instead of cc in email list.


Regards
Ley Foon

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write
  2017-02-28 10:37 [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write Ley Foon Tan
  2017-02-28 10:39 ` Ley Foon Tan
@ 2017-02-28 21:11 ` Bjorn Helgaas
  1 sibling, 0 replies; 6+ messages in thread
From: Bjorn Helgaas @ 2017-02-28 21:11 UTC (permalink / raw)
  To: Ley Foon Tan; +Cc: Bjorn Helgaas, linux-kernel, linux-pci, lftan.linux, stable

On Tue, Feb 28, 2017 at 06:37:16PM +0800, Ley Foon Tan wrote:
> Commit eb5767122feba1 used the TLP_FMTTYPE_CFGRD* for TLP write operation
> and this cause writing to configuration space will fail. This patch
> fix it by using correct FMTTYPE for write operation.
> 
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> Cc: stable@vger.kernel.org

I really botched it with eb5767122feba1, didn't I?  Thanks for cleaning up
after me.  I queued this to for-linus for v4.11-rc1.

> ---
>  drivers/pci/host/pcie-altera.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
> index 0c15402..68c839f 100644
> --- a/drivers/pci/host/pcie-altera.c
> +++ b/drivers/pci/host/pcie-altera.c
> @@ -57,10 +57,14 @@
>  #define TLP_WRITE_TAG			0x10
>  #define RP_DEVFN			0
>  #define TLP_REQ_ID(bus, devfn)		(((bus) << 8) | (devfn))
> -#define TLP_CFG_DW0(pcie, bus)						\
> +#define TLP_CFGRD_DW0(pcie, bus)					\
>      ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0			\
>  				    : TLP_FMTTYPE_CFGRD1) << 24) |	\
>       TLP_PAYLOAD_SIZE)
> +#define TLP_CFGWR_DW0(pcie, bus)					\
> +    ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0			\
> +				    : TLP_FMTTYPE_CFGWR1) << 24) |	\
> +     TLP_PAYLOAD_SIZE)
>  #define TLP_CFG_DW1(pcie, tag, be)	\
>      (((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))
>  #define TLP_CFG_DW2(bus, devfn, offset)	\
> @@ -222,7 +226,7 @@ static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,
>  {
>  	u32 headers[TLP_HDR_SIZE];
>  
> -	headers[0] = TLP_CFG_DW0(pcie, bus);
> +	headers[0] = TLP_CFGRD_DW0(pcie, bus);
>  	headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);
>  	headers[2] = TLP_CFG_DW2(bus, devfn, where);
>  
> @@ -237,7 +241,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
>  	u32 headers[TLP_HDR_SIZE];
>  	int ret;
>  
> -	headers[0] = TLP_CFG_DW0(pcie, bus);
> +	headers[0] = TLP_CFGWR_DW0(pcie, bus);
>  	headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);
>  	headers[2] = TLP_CFG_DW2(bus, devfn, where);
>  
> -- 
> 1.8.2.3
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write
  2017-02-28 10:31 Ley Foon Tan
@ 2017-02-28 10:32 ` Ley Foon Tan
  0 siblings, 0 replies; 6+ messages in thread
From: Ley Foon Tan @ 2017-02-28 10:32 UTC (permalink / raw)
  To: Ley Foon Tan; +Cc: Bjorn Helgaas, linux-kernel, linux-pci, stable

On Tue, Feb 28, 2017 at 6:31 PM, Ley Foon Tan <ley.foon.tan@intel.com> wrote:
> Commit eb5767122feba1 used the TLP_FMTTYPE_CFGRD* for TLP write operation
> and this cause writing to configuration space will fail. This patch
> fix it by using correct FMTTYPE for write operation.
>
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> ---
>  drivers/pci/host/pcie-altera.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
> index 0c15402..68c839f 100644
> --- a/drivers/pci/host/pcie-altera.c
> +++ b/drivers/pci/host/pcie-altera.c
> @@ -57,10 +57,14 @@
>  #define TLP_WRITE_TAG                  0x10
>  #define RP_DEVFN                       0
>  #define TLP_REQ_ID(bus, devfn)         (((bus) << 8) | (devfn))
> -#define TLP_CFG_DW0(pcie, bus)                                         \
> +#define TLP_CFGRD_DW0(pcie, bus)                                       \
>      ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0                 \
>                                     : TLP_FMTTYPE_CFGRD1) << 24) |      \
>       TLP_PAYLOAD_SIZE)
> +#define TLP_CFGWR_DW0(pcie, bus)                                       \
> +    ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0                 \
> +                                   : TLP_FMTTYPE_CFGWR1) << 24) |      \
> +     TLP_PAYLOAD_SIZE)
>  #define TLP_CFG_DW1(pcie, tag, be)     \
>      (((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))
>  #define TLP_CFG_DW2(bus, devfn, offset)        \
> @@ -222,7 +226,7 @@ static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,
>  {
>         u32 headers[TLP_HDR_SIZE];
>
> -       headers[0] = TLP_CFG_DW0(pcie, bus);
> +       headers[0] = TLP_CFGRD_DW0(pcie, bus);
>         headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);
>         headers[2] = TLP_CFG_DW2(bus, devfn, where);
>
> @@ -237,7 +241,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
>         u32 headers[TLP_HDR_SIZE];
>         int ret;
>
> -       headers[0] = TLP_CFG_DW0(pcie, bus);
> +       headers[0] = TLP_CFGWR_DW0(pcie, bus);
>         headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);
>         headers[2] = TLP_CFG_DW2(bus, devfn, where);

Resend the patch by adding stable@vger.kernel.org to cc list.
Please ignore the previous one.

Thanks.

Regards
Ley Foon

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write
@ 2017-02-28 10:31 Ley Foon Tan
  2017-02-28 10:32 ` Ley Foon Tan
  0 siblings, 1 reply; 6+ messages in thread
From: Ley Foon Tan @ 2017-02-28 10:31 UTC (permalink / raw)
  To: Bjorn Helgaas; +Cc: linux-kernel, linux-pci, lftan.linux, stable, Ley Foon Tan

Commit eb5767122feba1 used the TLP_FMTTYPE_CFGRD* for TLP write operation
and this cause writing to configuration space will fail. This patch
fix it by using correct FMTTYPE for write operation.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
 drivers/pci/host/pcie-altera.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
index 0c15402..68c839f 100644
--- a/drivers/pci/host/pcie-altera.c
+++ b/drivers/pci/host/pcie-altera.c
@@ -57,10 +57,14 @@
 #define TLP_WRITE_TAG			0x10
 #define RP_DEVFN			0
 #define TLP_REQ_ID(bus, devfn)		(((bus) << 8) | (devfn))
-#define TLP_CFG_DW0(pcie, bus)						\
+#define TLP_CFGRD_DW0(pcie, bus)					\
     ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0			\
 				    : TLP_FMTTYPE_CFGRD1) << 24) |	\
      TLP_PAYLOAD_SIZE)
+#define TLP_CFGWR_DW0(pcie, bus)					\
+    ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0			\
+				    : TLP_FMTTYPE_CFGWR1) << 24) |	\
+     TLP_PAYLOAD_SIZE)
 #define TLP_CFG_DW1(pcie, tag, be)	\
     (((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))
 #define TLP_CFG_DW2(bus, devfn, offset)	\
@@ -222,7 +226,7 @@ static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,
 {
 	u32 headers[TLP_HDR_SIZE];
 
-	headers[0] = TLP_CFG_DW0(pcie, bus);
+	headers[0] = TLP_CFGRD_DW0(pcie, bus);
 	headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);
 	headers[2] = TLP_CFG_DW2(bus, devfn, where);
 
@@ -237,7 +241,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
 	u32 headers[TLP_HDR_SIZE];
 	int ret;
 
-	headers[0] = TLP_CFG_DW0(pcie, bus);
+	headers[0] = TLP_CFGWR_DW0(pcie, bus);
 	headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);
 	headers[2] = TLP_CFG_DW2(bus, devfn, where);
 
-- 
1.8.2.3

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write
@ 2017-02-28 10:24 Ley Foon Tan
  0 siblings, 0 replies; 6+ messages in thread
From: Ley Foon Tan @ 2017-02-28 10:24 UTC (permalink / raw)
  To: Bjorn Helgaas; +Cc: linux-kernel, linux-pci, lftan.linux, Ley Foon Tan

Commit eb5767122feba1 used the TLP_FMTTYPE_CFGRD* for TLP write operation
and this cause writing to configuration space will fail. This patch
fix it by using correct FMTTYPE for write operation.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
 drivers/pci/host/pcie-altera.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
index 0c15402..68c839f 100644
--- a/drivers/pci/host/pcie-altera.c
+++ b/drivers/pci/host/pcie-altera.c
@@ -57,10 +57,14 @@
 #define TLP_WRITE_TAG			0x10
 #define RP_DEVFN			0
 #define TLP_REQ_ID(bus, devfn)		(((bus) << 8) | (devfn))
-#define TLP_CFG_DW0(pcie, bus)						\
+#define TLP_CFGRD_DW0(pcie, bus)					\
     ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0			\
 				    : TLP_FMTTYPE_CFGRD1) << 24) |	\
      TLP_PAYLOAD_SIZE)
+#define TLP_CFGWR_DW0(pcie, bus)					\
+    ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0			\
+				    : TLP_FMTTYPE_CFGWR1) << 24) |	\
+     TLP_PAYLOAD_SIZE)
 #define TLP_CFG_DW1(pcie, tag, be)	\
     (((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))
 #define TLP_CFG_DW2(bus, devfn, offset)	\
@@ -222,7 +226,7 @@ static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,
 {
 	u32 headers[TLP_HDR_SIZE];
 
-	headers[0] = TLP_CFG_DW0(pcie, bus);
+	headers[0] = TLP_CFGRD_DW0(pcie, bus);
 	headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);
 	headers[2] = TLP_CFG_DW2(bus, devfn, where);
 
@@ -237,7 +241,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
 	u32 headers[TLP_HDR_SIZE];
 	int ret;
 
-	headers[0] = TLP_CFG_DW0(pcie, bus);
+	headers[0] = TLP_CFGWR_DW0(pcie, bus);
 	headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);
 	headers[2] = TLP_CFG_DW2(bus, devfn, where);
 
-- 
1.8.2.3

^ permalink raw reply related	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-02-28 21:38 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-02-28 10:37 [PATCH] PCI: altera: Fix TLP_CFG_DW0 for TLP write Ley Foon Tan
2017-02-28 10:39 ` Ley Foon Tan
2017-02-28 21:11 ` Bjorn Helgaas
  -- strict thread matches above, loose matches on Subject: below --
2017-02-28 10:31 Ley Foon Tan
2017-02-28 10:32 ` Ley Foon Tan
2017-02-28 10:24 Ley Foon Tan

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