[PATCH i-g-t 1/2] lib/intel_batchbuffer: Add secure batch buffer flushing on ring

[PATCH i-g-t 1/2] lib/intel_batchbuffer: Add secure batch buffer flushing on ring

[Antonio Argenziano]

Added functions for flushing a batch buffer as privileged.

Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 lib/intel_batchbuffer.c | 45 +++++++++++++++++++++++++++++++++++++++++----
 lib/intel_batchbuffer.h |  4 +++-
 2 files changed, 44 insertions(+), 5 deletions(-)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index f1353901..38ce3b69 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -158,15 +158,35 @@ flush_on_ring_common(struct intel_batchbuffer *batch, int ring)
 }
 
 /**
- * intel_batchbuffer_flush_on_ring:
+ * intel_batchbuffer_flush_on_ring_secure:
  * @batch: batchbuffer object
  * @ring: execbuf ring flag
  *
  * Submits the batch for execution on @ring.
  */
 void
-intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring)
+intel_batchbuffer_flush_on_ring_secure(struct intel_batchbuffer *batch, int ring)
+{
+    int flags = 0;
+
+	flags |= ring;
+	flags |= I915_EXEC_SECURE;
+
+    intel_batchbuffer_flush_on_ring(batch, flags);
+
+}
+
+/**
+ * intel_batchbuffer_flush_on_ring:
+ * @batch: batchbuffer object
+ * @flags: execbuf ring flag, plus additional submission flags
+ *
+ * Submits the batch for execution on the engine set in @flags.
+ */
+void
+intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int flags)
 {
+    int ring = flags & I915_EXEC_RING_MASK;
 	unsigned int used = flush_on_ring_common(batch, ring);
 	drm_intel_context *ctx;
 
@@ -179,9 +199,10 @@ intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring)
 
 	/* XXX bad kernel API */
 	ctx = batch->ctx;
-	if (ring != I915_EXEC_RENDER)
+	if ((ring) != I915_EXEC_RENDER)
 		ctx = NULL;
-	do_or_die(drm_intel_gem_bo_context_exec(batch->bo, ctx, used, ring));
+
+	do_or_die(drm_intel_gem_bo_context_exec(batch->bo, ctx, used, flags));
 
 	intel_batchbuffer_reset(batch);
 }
@@ -224,6 +245,22 @@ intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch,
 }
 
 /**
+ * intel_batchbuffer_flush_secure:
+ * @batch: batchbuffer object
+ *
+ * Submits the batch, as a secure batch, for execution on the blitter engine,
+ * selecting the right ring depending upon the hardware platform.
+ */
+void
+intel_batchbuffer_flush_secure(struct intel_batchbuffer *batch)
+{
+	int ring = 0;
+	if (HAS_BLT_RING(batch->devid))
+		ring = I915_EXEC_BLT;
+	intel_batchbuffer_flush_on_ring_secure(batch, ring);
+}
+
+/**
  * intel_batchbuffer_flush:
  * @batch: batchbuffer object
  *
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 869747db..0ed2055a 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -35,7 +35,9 @@ void intel_batchbuffer_free(struct intel_batchbuffer *batch);
 
 
 void intel_batchbuffer_flush(struct intel_batchbuffer *batch);
-void intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring);
+void intel_batchbuffer_flush_secure(struct intel_batchbuffer *batch);
+void intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int flags);
+void intel_batchbuffer_flush_on_ring_secure(struct intel_batchbuffer *batch, int ring);
 void intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch,
 					  drm_intel_context *context);
 
-- 
2.11.0

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[PATCH i-g-t 2/2] tests/gem_bad_address: Fix store address

[Antonio Argenziano]

The test purpose is to write at an invalid GTT location. To do so, the
store instruction used in the test has been updated to use the correct
value and extra unneeded flags have been removed. The batch buffer is
also sent as privileged now.

Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 tests/gem_bad_address.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/tests/gem_bad_address.c b/tests/gem_bad_address.c
index a970dfa4..720ab24d 100644
--- a/tests/gem_bad_address.c
+++ b/tests/gem_bad_address.c
@@ -38,22 +38,26 @@
 #include "drm.h"
 #include "intel_bufmgr.h"
 
+/*
+    The intent of this test is to try write an area of memory that is outside
+    the currently allowed boundary of the GTT. To do so it will use a batch
+    buffer that will run on Blitter engine as a privileged batch.
+*/
+
 static drm_intel_bufmgr *bufmgr;
 struct intel_batchbuffer *batch;
 
-#define BAD_GTT_DEST ((512*1024*1024)) /* past end of aperture */
-
 static void
 bad_store(void)
 {
 	BEGIN_BATCH(4, 0);
-	OUT_BATCH(MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL | 1 << 21);
-	OUT_BATCH(0);
-	OUT_BATCH(BAD_GTT_DEST);
+	OUT_BATCH(MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL );
+	OUT_BATCH(0); // lower part of the address (first 4 GByte = GTT size)
+	OUT_BATCH(0x1); //Higher part of the address (>GTT size)
 	OUT_BATCH(0xdeadbeef);
 	ADVANCE_BATCH();
 
-	intel_batchbuffer_flush(batch);
+	intel_batchbuffer_flush_secure(batch);
 }
 
 igt_simple_main
-- 
2.11.0

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Re: [PATCH i-g-t 2/2] tests/gem_bad_address: Fix store address

[Chris Wilson]

On Tue, Feb 28, 2017 at 01:58:24PM -0800, Antonio Argenziano wrote:
> The test purpose is to write at an invalid GTT location. To do so, the
> store instruction used in the test has been updated to use the correct
> value and extra unneeded flags have been removed. The batch buffer is
> also sent as privileged now.

Delete it.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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