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* [PATCH v2] drm/i915: Don't use enums for hardware engine id
@ 2017-03-01 20:26 Michal Wajdeczko
  2017-03-01 20:42 ` Chris Wilson
  2017-03-01 22:17 ` ✓ Fi.CI.BAT: success for drm/i915: Don't use enums for hardware engine id (rev2) Patchwork
  0 siblings, 2 replies; 3+ messages in thread
From: Michal Wajdeczko @ 2017-03-01 20:26 UTC (permalink / raw)
  To: intel-gfx

Generally we are using macros for any hardware identifiers as these
may change between Gens. Do the same with hardware engine ids.

v2: move hw engine defs to i915_reg.h (Chris)

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_reg.h         |  6 ++++++
 drivers/gpu/drm/i915/intel_engine_cs.c  |  2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.h | 33 +++++++++++++++++----------------
 3 files changed, 24 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 93dcbbc..456cb7d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -77,7 +77,13 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define _MASKED_BIT_ENABLE(a)	({ typeof(a) _a = (a); _MASKED_FIELD(_a, _a); })
 #define _MASKED_BIT_DISABLE(a)	(_MASKED_FIELD((a), 0))
 
+/* Engine ID */
 
+#define RCS_HW		0
+#define VCS_HW		1
+#define BCS_HW		2
+#define VECS_HW		3
+#define VCS2_HW		4
 
 /* PCI config space */
 
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index c4d4698..a238304 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -29,7 +29,7 @@
 static const struct engine_info {
 	const char *name;
 	unsigned exec_id;
-	enum intel_engine_hw_id hw_id;
+	unsigned hw_id;
 	u32 mmio_base;
 	unsigned irq_shift;
 	int (*init_legacy)(struct intel_engine_cs *engine);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 3dd6eee..b5767c5 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -186,26 +186,27 @@ struct i915_ctx_workarounds {
 struct drm_i915_gem_request;
 struct intel_render_state;
 
+
+/*
+ * Engine IDs definitions.
+ * Keep instances of the same type engine together.
+ */
+enum intel_engine_id {
+	RCS = 0,
+	BCS,
+	VCS,
+	VCS2,
+#define _VCS(n) (VCS + (n))
+	VECS
+};
+
 struct intel_engine_cs {
 	struct drm_i915_private *i915;
 	const char	*name;
-	enum intel_engine_id {
-		RCS = 0,
-		BCS,
-		VCS,
-		VCS2,	/* Keep instances of the same type engine together. */
-		VECS
-	} id;
-#define _VCS(n) (VCS + (n))
+	enum intel_engine_id id;
 	unsigned int exec_id;
-	enum intel_engine_hw_id {
-		RCS_HW = 0,
-		VCS_HW,
-		BCS_HW,
-		VECS_HW,
-		VCS2_HW
-	} hw_id;
-	enum intel_engine_hw_id guc_id; /* XXX same as hw_id? */
+	unsigned int hw_id;
+	unsigned int guc_id;
 	u32		mmio_base;
 	unsigned int irq_shift;
 	struct intel_ring *buffer;
-- 
2.7.4

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH v2] drm/i915: Don't use enums for hardware engine id
  2017-03-01 20:26 [PATCH v2] drm/i915: Don't use enums for hardware engine id Michal Wajdeczko
@ 2017-03-01 20:42 ` Chris Wilson
  2017-03-01 22:17 ` ✓ Fi.CI.BAT: success for drm/i915: Don't use enums for hardware engine id (rev2) Patchwork
  1 sibling, 0 replies; 3+ messages in thread
From: Chris Wilson @ 2017-03-01 20:42 UTC (permalink / raw)
  To: Michal Wajdeczko; +Cc: intel-gfx

On Wed, Mar 01, 2017 at 08:26:15PM +0000, Michal Wajdeczko wrote:
> Generally we are using macros for any hardware identifiers as these
> may change between Gens. Do the same with hardware engine ids.
> 
> v2: move hw engine defs to i915_reg.h (Chris)
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_reg.h         |  6 ++++++
>  drivers/gpu/drm/i915/intel_engine_cs.c  |  2 +-
>  drivers/gpu/drm/i915/intel_ringbuffer.h | 33 +++++++++++++++++----------------
>  3 files changed, 24 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 93dcbbc..456cb7d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -77,7 +77,13 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>  #define _MASKED_BIT_ENABLE(a)	({ typeof(a) _a = (a); _MASKED_FIELD(_a, _a); })
>  #define _MASKED_BIT_DISABLE(a)	(_MASKED_FIELD((a), 0))
>  
> +/* Engine ID */
>  
> +#define RCS_HW		0
> +#define VCS_HW		1
> +#define BCS_HW		2
> +#define VECS_HW		3
> +#define VCS2_HW		4

Works for me. I dream of i915_reg.h being broken up as well.

>  
>  /* PCI config space */
>  
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index c4d4698..a238304 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -29,7 +29,7 @@
>  static const struct engine_info {
>  	const char *name;
>  	unsigned exec_id;
> -	enum intel_engine_hw_id hw_id;
> +	unsigned hw_id;
>  	u32 mmio_base;
>  	unsigned irq_shift;
>  	int (*init_legacy)(struct intel_engine_cs *engine);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 3dd6eee..b5767c5 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -186,26 +186,27 @@ struct i915_ctx_workarounds {
>  struct drm_i915_gem_request;
>  struct intel_render_state;
>  
> +
> +/*
> + * Engine IDs definitions.
> + * Keep instances of the same type engine together.
> + */
> +enum intel_engine_id {
> +	RCS = 0,
> +	BCS,
> +	VCS,
> +	VCS2,
> +#define _VCS(n) (VCS + (n))
> +	VECS
> +};
> +
>  struct intel_engine_cs {
>  	struct drm_i915_private *i915;
>  	const char	*name;
> -	enum intel_engine_id {
> -		RCS = 0,
> -		BCS,
> -		VCS,
> -		VCS2,	/* Keep instances of the same type engine together. */
> -		VECS
> -	} id;
> -#define _VCS(n) (VCS + (n))
> +	enum intel_engine_id id;
>  	unsigned int exec_id;
> -	enum intel_engine_hw_id {
> -		RCS_HW = 0,
> -		VCS_HW,
> -		BCS_HW,
> -		VECS_HW,
> -		VCS2_HW
> -	} hw_id;
> -	enum intel_engine_hw_id guc_id; /* XXX same as hw_id? */
> +	unsigned int hw_id;
> +	unsigned int guc_id;

Bah. There goes the reminder that guc_id is not special and we just want
to get an architect to confirm that they won't differ!.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Don't use enums for hardware engine id (rev2)
  2017-03-01 20:26 [PATCH v2] drm/i915: Don't use enums for hardware engine id Michal Wajdeczko
  2017-03-01 20:42 ` Chris Wilson
@ 2017-03-01 22:17 ` Patchwork
  1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2017-03-01 22:17 UTC (permalink / raw)
  To: Michal Wajdeczko; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Don't use enums for hardware engine id (rev2)
URL   : https://patchwork.freedesktop.org/series/20396/
State : success

== Summary ==

Series 20396v2 drm/i915: Don't use enums for hardware engine id
https://patchwork.freedesktop.org/api/1.0/series/20396/revisions/2/mbox/

Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                dmesg-warn -> PASS       (fi-bxt-t5700)

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11 
fi-bsw-n3050     total:278  pass:239  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19 
fi-bxt-t5700     total:278  pass:258  dwarn:0   dfail:0   fail:0   skip:20 
fi-byt-j1900     total:278  pass:251  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:278  pass:247  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-ilk-650       total:278  pass:192  dwarn:36  dfail:0   fail:0   skip:50 
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-kbl-7500u     total:278  pass:259  dwarn:1   dfail:0   fail:0   skip:18 
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17 
fi-skl-6700k     total:278  pass:216  dwarn:44  dfail:0   fail:0   skip:18 
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28 
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29 

a777f02a6f1fbe44b42f245d6397b3f960a0a257 drm-tip: 2017y-03m-01d-20h-32m-24s UTC integration manifest
94ada26 drm/i915: Don't use enums for hardware engine id

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4024/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
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2017-03-01 20:26 [PATCH v2] drm/i915: Don't use enums for hardware engine id Michal Wajdeczko
2017-03-01 20:42 ` Chris Wilson
2017-03-01 22:17 ` ✓ Fi.CI.BAT: success for drm/i915: Don't use enums for hardware engine id (rev2) Patchwork

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