* [PATCH 0/5] drm/i915: CCS prep stuff
@ 2017-03-07 19:42 ville.syrjala
2017-03-07 19:42 ` [PATCH 1/5] drm/i915: Plumb drm_framebuffer into more places ville.syrjala
` (7 more replies)
0 siblings, 8 replies; 12+ messages in thread
From: ville.syrjala @ 2017-03-07 19:42 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Already reviewed prep stuff for CCS. Posting it separately so
that I can push it if/when CI gives the green light.
Ville Syrjälä (5):
drm/i915: Plumb drm_framebuffer into more places
drm/i915: Move nv12 chroma plane handling into intel_surf_alignment()
drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane
drm/i915: Pass the correct plane index to _intel_compute_tile_offset()
drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages
drivers/gpu/drm/i915/intel_display.c | 213 ++++++++++++++++-------------------
drivers/gpu/drm/i915/intel_drv.h | 11 +-
drivers/gpu/drm/i915/intel_fbdev.c | 4 +-
3 files changed, 99 insertions(+), 129 deletions(-)
--
2.10.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH 1/5] drm/i915: Plumb drm_framebuffer into more places 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala @ 2017-03-07 19:42 ` ville.syrjala 2017-03-07 19:42 ` [PATCH 2/5] drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() ville.syrjala ` (6 subsequent siblings) 7 siblings, 0 replies; 12+ messages in thread From: ville.syrjala @ 2017-03-07 19:42 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> Now that framebuffers can be used even before calling drm_framebuffer_init() we can start to plumb them into more places, instead of passing individual pieces for fb metadata. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 132 ++++++++++++++--------------------- drivers/gpu/drm/i915/intel_drv.h | 11 +-- drivers/gpu/drm/i915/intel_fbdev.c | 4 +- 3 files changed, 57 insertions(+), 90 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e77ca7dfa44d..d97f3f3554e4 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1990,10 +1990,13 @@ static unsigned int intel_tile_size(const struct drm_i915_private *dev_priv) return IS_GEN2(dev_priv) ? 2048 : 4096; } -static unsigned int intel_tile_width_bytes(const struct drm_i915_private *dev_priv, - uint64_t fb_modifier, unsigned int cpp) +static unsigned int +intel_tile_width_bytes(const struct drm_framebuffer *fb, int plane) { - switch (fb_modifier) { + struct drm_i915_private *dev_priv = to_i915(fb->dev); + unsigned int cpp = fb->format->cpp[plane]; + + switch (fb->modifier) { case DRM_FORMAT_MOD_NONE: return cpp; case I915_FORMAT_MOD_X_TILED: @@ -2022,43 +2025,38 @@ static unsigned int intel_tile_width_bytes(const struct drm_i915_private *dev_pr } break; default: - MISSING_CASE(fb_modifier); + MISSING_CASE(fb->modifier); return cpp; } } -unsigned int intel_tile_height(const struct drm_i915_private *dev_priv, - uint64_t fb_modifier, unsigned int cpp) +static unsigned int +intel_tile_height(const struct drm_framebuffer *fb, int plane) { - if (fb_modifier == DRM_FORMAT_MOD_NONE) + if (fb->modifier == DRM_FORMAT_MOD_NONE) return 1; else - return intel_tile_size(dev_priv) / - intel_tile_width_bytes(dev_priv, fb_modifier, cpp); + return intel_tile_size(to_i915(fb->dev)) / + intel_tile_width_bytes(fb, plane); } /* Return the tile dimensions in pixel units */ -static void intel_tile_dims(const struct drm_i915_private *dev_priv, +static void intel_tile_dims(const struct drm_framebuffer *fb, int plane, unsigned int *tile_width, - unsigned int *tile_height, - uint64_t fb_modifier, - unsigned int cpp) + unsigned int *tile_height) { - unsigned int tile_width_bytes = - intel_tile_width_bytes(dev_priv, fb_modifier, cpp); + unsigned int tile_width_bytes = intel_tile_width_bytes(fb, plane); + unsigned int cpp = fb->format->cpp[plane]; *tile_width = tile_width_bytes / cpp; - *tile_height = intel_tile_size(dev_priv) / tile_width_bytes; + *tile_height = intel_tile_size(to_i915(fb->dev)) / tile_width_bytes; } unsigned int -intel_fb_align_height(struct drm_i915_private *dev_priv, - unsigned int height, - uint32_t pixel_format, - uint64_t fb_modifier) +intel_fb_align_height(const struct drm_framebuffer *fb, + int plane, unsigned int height) { - unsigned int cpp = drm_format_plane_cpp(pixel_format, 0); - unsigned int tile_height = intel_tile_height(dev_priv, fb_modifier, cpp); + unsigned int tile_height = intel_tile_height(fb, plane); return ALIGN(height, tile_height); } @@ -2099,21 +2097,23 @@ static unsigned int intel_linear_alignment(const struct drm_i915_private *dev_pr return 0; } -static unsigned int intel_surf_alignment(const struct drm_i915_private *dev_priv, - uint64_t fb_modifier) +static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, + int plane) { - switch (fb_modifier) { + struct drm_i915_private *dev_priv = to_i915(fb->dev); + + switch (fb->modifier) { case DRM_FORMAT_MOD_NONE: return intel_linear_alignment(dev_priv); case I915_FORMAT_MOD_X_TILED: - if (INTEL_INFO(dev_priv)->gen >= 9) + if (INTEL_GEN(dev_priv) >= 9) return 256 * 1024; return 0; case I915_FORMAT_MOD_Y_TILED: case I915_FORMAT_MOD_Yf_TILED: return 1 * 1024 * 1024; default: - MISSING_CASE(fb_modifier); + MISSING_CASE(fb->modifier); return 0; } } @@ -2130,7 +2130,7 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, unsigned int rotation) WARN_ON(!mutex_is_locked(&dev->struct_mutex)); - alignment = intel_surf_alignment(dev_priv, fb->modifier); + alignment = intel_surf_alignment(fb, 0); intel_fill_fb_ggtt_view(&view, fb, rotation); @@ -2291,8 +2291,7 @@ static u32 intel_adjust_tile_offset(int *x, int *y, unsigned int pitch_tiles; tile_size = intel_tile_size(dev_priv); - intel_tile_dims(dev_priv, &tile_width, &tile_height, - fb->modifier, cpp); + intel_tile_dims(fb, plane, &tile_width, &tile_height); if (drm_rotation_90_or_270(rotation)) { pitch_tiles = pitch / tile_height; @@ -2347,8 +2346,7 @@ static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv, unsigned int tile_rows, tiles, pitch_tiles; tile_size = intel_tile_size(dev_priv); - intel_tile_dims(dev_priv, &tile_width, &tile_height, - fb_modifier, cpp); + intel_tile_dims(fb, plane, &tile_width, &tile_height); if (drm_rotation_90_or_270(rotation)) { pitch_tiles = pitch / tile_height; @@ -2394,7 +2392,7 @@ u32 intel_compute_tile_offset(int *x, int *y, if (fb->format->format == DRM_FORMAT_NV12 && plane == 1) alignment = 4096; else - alignment = intel_surf_alignment(dev_priv, fb->modifier); + alignment = intel_surf_alignment(fb, plane); return _intel_compute_tile_offset(dev_priv, x, y, fb, plane, pitch, rotation, alignment); @@ -2480,8 +2478,7 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv, unsigned int pitch_tiles; struct drm_rect r; - intel_tile_dims(dev_priv, &tile_width, &tile_height, - fb->modifier, cpp); + intel_tile_dims(fb, i, &tile_width, &tile_height); rot_info->plane[i].offset = offset; rot_info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i], tile_width * cpp); @@ -2846,7 +2843,6 @@ static int skl_max_plane_width(const struct drm_framebuffer *fb, int plane, static int skl_check_main_surface(struct intel_plane_state *plane_state) { - const struct drm_i915_private *dev_priv = to_i915(plane_state->base.plane->dev); const struct drm_framebuffer *fb = plane_state->base.fb; unsigned int rotation = plane_state->base.rotation; int x = plane_state->base.src.x1 >> 16; @@ -2865,8 +2861,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) intel_add_fb_offsets(&x, &y, plane_state, 0); offset = intel_compute_tile_offset(&x, &y, plane_state, 0); - - alignment = intel_surf_alignment(dev_priv, fb->modifier); + alignment = intel_surf_alignment(fb, 0); /* * AUX surface offset is specified as the distance from the @@ -3186,16 +3181,13 @@ static void ironlake_update_primary_plane(struct drm_plane *primary, POSTING_READ(reg); } -u32 intel_fb_stride_alignment(const struct drm_i915_private *dev_priv, - uint64_t fb_modifier, uint32_t pixel_format) +static u32 +intel_fb_stride_alignment(const struct drm_framebuffer *fb, int plane) { - if (fb_modifier == DRM_FORMAT_MOD_NONE) { + if (fb->modifier == DRM_FORMAT_MOD_NONE) return 64; - } else { - int cpp = drm_format_plane_cpp(pixel_format, 0); - - return intel_tile_width_bytes(dev_priv, fb_modifier, cpp); - } + else + return intel_tile_width_bytes(fb, plane); } static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id) @@ -3228,21 +3220,16 @@ static void skl_detach_scalers(struct intel_crtc *intel_crtc) u32 skl_plane_stride(const struct drm_framebuffer *fb, int plane, unsigned int rotation) { - const struct drm_i915_private *dev_priv = to_i915(fb->dev); u32 stride = intel_fb_pitch(fb, plane, rotation); /* * The stride is either expressed as a multiple of 64 bytes chunks for * linear buffers or in number of tiles for tiled buffers. */ - if (drm_rotation_90_or_270(rotation)) { - int cpp = fb->format->cpp[plane]; - - stride /= intel_tile_height(dev_priv, fb->modifier, cpp); - } else { - stride /= intel_fb_stride_alignment(dev_priv, fb->modifier, - fb->format->format); - } + if (drm_rotation_90_or_270(rotation)) + stride /= intel_tile_height(fb, plane); + else + stride /= intel_fb_stride_alignment(fb, plane); return stride; } @@ -7388,10 +7375,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc, val = I915_READ(DSPSTRIDE(pipe)); fb->pitches[0] = val & 0xffffffc0; - aligned_height = intel_fb_align_height(dev_priv, - fb->height, - fb->format->format, - fb->modifier); + aligned_height = intel_fb_align_height(fb, 0, fb->height); plane_config->size = fb->pitches[0] * aligned_height; @@ -8426,14 +8410,10 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, fb->width = ((val >> 0) & 0x1fff) + 1; val = I915_READ(PLANE_STRIDE(pipe, 0)); - stride_mult = intel_fb_stride_alignment(dev_priv, fb->modifier, - fb->format->format); + stride_mult = intel_fb_stride_alignment(fb, 0); fb->pitches[0] = (val & 0x3ff) * stride_mult; - aligned_height = intel_fb_align_height(dev_priv, - fb->height, - fb->format->format, - fb->modifier); + aligned_height = intel_fb_align_height(fb, 0, fb->height); plane_config->size = fb->pitches[0] * aligned_height; @@ -8529,10 +8509,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc, val = I915_READ(DSPSTRIDE(pipe)); fb->pitches[0] = val & 0xffffffc0; - aligned_height = intel_fb_align_height(dev_priv, - fb->height, - fb->format->format, - fb->modifier); + aligned_height = intel_fb_align_height(fb, 0, fb->height); plane_config->size = fb->pitches[0] * aligned_height; @@ -14368,15 +14345,6 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, goto err; } - stride_alignment = intel_fb_stride_alignment(dev_priv, - mode_cmd->modifier[0], - mode_cmd->pixel_format); - if (mode_cmd->pitches[0] & (stride_alignment - 1)) { - DRM_DEBUG("pitch (%d) must be at least %u byte aligned\n", - mode_cmd->pitches[0], stride_alignment); - goto err; - } - pitch_limit = intel_fb_pitch_limit(dev_priv, mode_cmd->modifier[0], mode_cmd->pixel_format); if (mode_cmd->pitches[0] > pitch_limit) { @@ -14457,6 +14425,14 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, drm_helper_mode_fill_fb_struct(&dev_priv->drm, &intel_fb->base, mode_cmd); + + stride_alignment = intel_fb_stride_alignment(&intel_fb->base, 0); + if (mode_cmd->pitches[0] & (stride_alignment - 1)) { + DRM_DEBUG("pitch (%d) must be at least %u byte aligned\n", + mode_cmd->pitches[0], stride_alignment); + goto err; + } + intel_fb->obj = obj; ret = intel_fill_fb_info(dev_priv, &intel_fb->base); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 3af20c1f2ba8..578f7d20501f 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1250,12 +1250,8 @@ void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, uint32_t ddi_signal_levels(struct intel_dp *intel_dp); u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder); -unsigned int intel_fb_align_height(struct drm_i915_private *dev_priv, - unsigned int height, - uint32_t pixel_format, - uint64_t fb_format_modifier); -u32 intel_fb_stride_alignment(const struct drm_i915_private *dev_priv, - uint64_t fb_modifier, uint32_t pixel_format); +unsigned int intel_fb_align_height(const struct drm_framebuffer *fb, + int plane, unsigned int height); /* intel_audio.c */ void intel_init_audio_hooks(struct drm_i915_private *dev_priv); @@ -1384,9 +1380,6 @@ int intel_plane_atomic_set_property(struct drm_plane *plane, int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state); -unsigned int intel_tile_height(const struct drm_i915_private *dev_priv, - uint64_t fb_modifier, unsigned int cpp); - void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv, enum pipe pipe); diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index f7e9a4e69595..332254a8eebe 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c @@ -619,9 +619,7 @@ static bool intel_fbdev_init_bios(struct drm_device *dev, } cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay; - cur_size = intel_fb_align_height(to_i915(dev), cur_size, - fb->base.format->format, - fb->base.modifier); + cur_size = intel_fb_align_height(&fb->base, 0, cur_size); cur_size *= fb->base.pitches[0]; DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n", pipe_name(intel_crtc->pipe), -- 2.10.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/5] drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala 2017-03-07 19:42 ` [PATCH 1/5] drm/i915: Plumb drm_framebuffer into more places ville.syrjala @ 2017-03-07 19:42 ` ville.syrjala 2017-03-07 19:42 ` [PATCH 3/5] drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane ville.syrjala ` (5 subsequent siblings) 7 siblings, 0 replies; 12+ messages in thread From: ville.syrjala @ 2017-03-07 19:42 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> Let's try to keep the alignment requirements in one place, and so towards that end let's move the AUX_DIST alignment handling into intel_surf_alignment() alongside the main surface alignment stuff. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d97f3f3554e4..f0da21327198 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2102,6 +2102,10 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, { struct drm_i915_private *dev_priv = to_i915(fb->dev); + /* AUX_DIST needs only 4K alignment */ + if (fb->format->format == DRM_FORMAT_NV12 && plane == 1) + return 4096; + switch (fb->modifier) { case DRM_FORMAT_MOD_NONE: return intel_linear_alignment(dev_priv); @@ -2386,13 +2390,7 @@ u32 intel_compute_tile_offset(int *x, int *y, const struct drm_framebuffer *fb = state->base.fb; unsigned int rotation = state->base.rotation; int pitch = intel_fb_pitch(fb, plane, rotation); - u32 alignment; - - /* AUX_DIST needs only 4K alignment */ - if (fb->format->format == DRM_FORMAT_NV12 && plane == 1) - alignment = 4096; - else - alignment = intel_surf_alignment(fb, plane); + u32 alignment = intel_surf_alignment(fb, plane); return _intel_compute_tile_offset(dev_priv, x, y, fb, plane, pitch, rotation, alignment); -- 2.10.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/5] drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala 2017-03-07 19:42 ` [PATCH 1/5] drm/i915: Plumb drm_framebuffer into more places ville.syrjala 2017-03-07 19:42 ` [PATCH 2/5] drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() ville.syrjala @ 2017-03-07 19:42 ` ville.syrjala 2017-03-07 19:42 ` [PATCH 4/5] drm/i915: Pass the correct plane index to _intel_compute_tile_offset() ville.syrjala ` (4 subsequent siblings) 7 siblings, 0 replies; 12+ messages in thread From: ville.syrjala @ 2017-03-07 19:42 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> To make life easier let's allow skl_plane_stride() to be called for the AUX surface even when there is no AUX surface. Avoids special cases in the callers. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f0da21327198..ffa1041e10b9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3218,7 +3218,12 @@ static void skl_detach_scalers(struct intel_crtc *intel_crtc) u32 skl_plane_stride(const struct drm_framebuffer *fb, int plane, unsigned int rotation) { - u32 stride = intel_fb_pitch(fb, plane, rotation); + u32 stride; + + if (plane >= fb->format->num_planes) + return 0; + + stride = intel_fb_pitch(fb, plane, rotation); /* * The stride is either expressed as a multiple of 64 bytes chunks for -- 2.10.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/5] drm/i915: Pass the correct plane index to _intel_compute_tile_offset() 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala ` (2 preceding siblings ...) 2017-03-07 19:42 ` [PATCH 3/5] drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane ville.syrjala @ 2017-03-07 19:42 ` ville.syrjala 2017-03-07 19:42 ` [PATCH v2 5/5] drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages ville.syrjala ` (3 subsequent siblings) 7 siblings, 0 replies; 12+ messages in thread From: ville.syrjala @ 2017-03-07 19:42 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> intel_fill_fb_info() should pass the correct plane index to _intel_compute_tile_offset() once we start to care about the AUX surface. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ffa1041e10b9..90e6403b0324 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2467,7 +2467,7 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv, intel_fb->normal[i].y = y; offset = _intel_compute_tile_offset(dev_priv, &x, &y, - fb, 0, fb->pitches[i], + fb, i, fb->pitches[i], DRM_ROTATE_0, tile_size); offset /= tile_size; -- 2.10.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 5/5] drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala ` (3 preceding siblings ...) 2017-03-07 19:42 ` [PATCH 4/5] drm/i915: Pass the correct plane index to _intel_compute_tile_offset() ville.syrjala @ 2017-03-07 19:42 ` ville.syrjala 2017-03-07 20:22 ` ✗ Fi.CI.BAT: warning for drm/i915: CCS prep stuff Patchwork ` (2 subsequent siblings) 7 siblings, 0 replies; 12+ messages in thread From: ville.syrjala @ 2017-03-07 19:42 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> DRM_UT_CORE generates way too much noise usually, so having the framebuffer init failures use DRM_UT_CORE is a pain when trying to find out the reason why you failed in creating a framebuffer. Let's use DRM_UT_KMS for these debug messages instead. v2: s/at less than/at most/ in the debug message (Imre) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 66 ++++++++++++++++++------------------ 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 90e6403b0324..060b6989c4da 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2454,8 +2454,8 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv, */ if (i915_gem_object_is_tiled(intel_fb->obj) && (x + width) * cpp > fb->pitches[i]) { - DRM_DEBUG("bad fb plane %d offset: 0x%x\n", - i, fb->offsets[i]); + DRM_DEBUG_KMS("bad fb plane %d offset: 0x%x\n", + i, fb->offsets[i]); return -EINVAL; } @@ -2537,9 +2537,9 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv, max_size = max(max_size, offset + size); } - if (max_size * tile_size > to_intel_framebuffer(fb)->obj->base.size) { - DRM_DEBUG("fb too big for bo (need %u bytes, have %zu bytes)\n", - max_size * tile_size, to_intel_framebuffer(fb)->obj->base.size); + if (max_size * tile_size > intel_fb->obj->base.size) { + DRM_DEBUG_KMS("fb too big for bo (need %u bytes, have %zu bytes)\n", + max_size * tile_size, intel_fb->obj->base.size); return -EINVAL; } @@ -14308,14 +14308,14 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, */ if (tiling != I915_TILING_NONE && tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { - DRM_DEBUG("tiling_mode doesn't match fb modifier\n"); + DRM_DEBUG_KMS("tiling_mode doesn't match fb modifier\n"); goto err; } } else { if (tiling == I915_TILING_X) { mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED; } else if (tiling == I915_TILING_Y) { - DRM_DEBUG("No Y tiling for legacy addfb\n"); + DRM_DEBUG_KMS("No Y tiling for legacy addfb\n"); goto err; } } @@ -14325,16 +14325,16 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, case I915_FORMAT_MOD_Y_TILED: case I915_FORMAT_MOD_Yf_TILED: if (INTEL_GEN(dev_priv) < 9) { - DRM_DEBUG("Unsupported tiling 0x%llx!\n", - mode_cmd->modifier[0]); + DRM_DEBUG_KMS("Unsupported tiling 0x%llx!\n", + mode_cmd->modifier[0]); goto err; } case DRM_FORMAT_MOD_NONE: case I915_FORMAT_MOD_X_TILED: break; default: - DRM_DEBUG("Unsupported fb modifier 0x%llx!\n", - mode_cmd->modifier[0]); + DRM_DEBUG_KMS("Unsupported fb modifier 0x%llx!\n", + mode_cmd->modifier[0]); goto err; } @@ -14344,17 +14344,17 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, */ if (INTEL_INFO(dev_priv)->gen < 4 && tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { - DRM_DEBUG("tiling_mode must match fb modifier exactly on gen2/3\n"); + DRM_DEBUG_KMS("tiling_mode must match fb modifier exactly on gen2/3\n"); goto err; } pitch_limit = intel_fb_pitch_limit(dev_priv, mode_cmd->modifier[0], mode_cmd->pixel_format); if (mode_cmd->pitches[0] > pitch_limit) { - DRM_DEBUG("%s pitch (%u) must be at less than %d\n", - mode_cmd->modifier[0] != DRM_FORMAT_MOD_NONE ? - "tiled" : "linear", - mode_cmd->pitches[0], pitch_limit); + DRM_DEBUG_KMS("%s pitch (%u) must be at most %d\n", + mode_cmd->modifier[0] != DRM_FORMAT_MOD_NONE ? + "tiled" : "linear", + mode_cmd->pitches[0], pitch_limit); goto err; } @@ -14362,9 +14362,9 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, * If there's a fence, enforce that * the fb pitch and fence stride match. */ - if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) { - DRM_DEBUG("pitch (%d) must match tiling stride (%d)\n", - mode_cmd->pitches[0], stride); + if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) { + DRM_DEBUG_KMS("pitch (%d) must match tiling stride (%d)\n", + mode_cmd->pitches[0], stride); goto err; } @@ -14377,16 +14377,16 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, break; case DRM_FORMAT_XRGB1555: if (INTEL_GEN(dev_priv) > 3) { - DRM_DEBUG("unsupported pixel format: %s\n", - drm_get_format_name(mode_cmd->pixel_format, &format_name)); + DRM_DEBUG_KMS("unsupported pixel format: %s\n", + drm_get_format_name(mode_cmd->pixel_format, &format_name)); goto err; } break; case DRM_FORMAT_ABGR8888: if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && INTEL_GEN(dev_priv) < 9) { - DRM_DEBUG("unsupported pixel format: %s\n", - drm_get_format_name(mode_cmd->pixel_format, &format_name)); + DRM_DEBUG_KMS("unsupported pixel format: %s\n", + drm_get_format_name(mode_cmd->pixel_format, &format_name)); goto err; } break; @@ -14394,15 +14394,15 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, case DRM_FORMAT_XRGB2101010: case DRM_FORMAT_XBGR2101010: if (INTEL_GEN(dev_priv) < 4) { - DRM_DEBUG("unsupported pixel format: %s\n", - drm_get_format_name(mode_cmd->pixel_format, &format_name)); + DRM_DEBUG_KMS("unsupported pixel format: %s\n", + drm_get_format_name(mode_cmd->pixel_format, &format_name)); goto err; } break; case DRM_FORMAT_ABGR2101010: if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { - DRM_DEBUG("unsupported pixel format: %s\n", - drm_get_format_name(mode_cmd->pixel_format, &format_name)); + DRM_DEBUG_KMS("unsupported pixel format: %s\n", + drm_get_format_name(mode_cmd->pixel_format, &format_name)); goto err; } break; @@ -14411,14 +14411,14 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, case DRM_FORMAT_YVYU: case DRM_FORMAT_VYUY: if (INTEL_GEN(dev_priv) < 5) { - DRM_DEBUG("unsupported pixel format: %s\n", - drm_get_format_name(mode_cmd->pixel_format, &format_name)); + DRM_DEBUG_KMS("unsupported pixel format: %s\n", + drm_get_format_name(mode_cmd->pixel_format, &format_name)); goto err; } break; default: - DRM_DEBUG("unsupported pixel format: %s\n", - drm_get_format_name(mode_cmd->pixel_format, &format_name)); + DRM_DEBUG_KMS("unsupported pixel format: %s\n", + drm_get_format_name(mode_cmd->pixel_format, &format_name)); goto err; } @@ -14431,8 +14431,8 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, stride_alignment = intel_fb_stride_alignment(&intel_fb->base, 0); if (mode_cmd->pitches[0] & (stride_alignment - 1)) { - DRM_DEBUG("pitch (%d) must be at least %u byte aligned\n", - mode_cmd->pitches[0], stride_alignment); + DRM_DEBUG_KMS("pitch (%d) must be at least %u byte aligned\n", + mode_cmd->pitches[0], stride_alignment); goto err; } -- 2.10.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: CCS prep stuff 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala ` (4 preceding siblings ...) 2017-03-07 19:42 ` [PATCH v2 5/5] drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages ville.syrjala @ 2017-03-07 20:22 ` Patchwork 2017-03-07 20:43 ` Ville Syrjälä 2017-03-08 13:52 ` ✗ Fi.CI.BAT: failure " Patchwork 2017-03-08 14:51 ` [PATCH 0/5] " Ville Syrjälä 7 siblings, 1 reply; 12+ messages in thread From: Patchwork @ 2017-03-07 20:22 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx == Series Details == Series: drm/i915: CCS prep stuff URL : https://patchwork.freedesktop.org/series/20851/ State : warning == Summary == Series 20851v1 drm/i915: CCS prep stuff https://patchwork.freedesktop.org/api/1.0/series/20851/revisions/1/mbox/ Test gem_exec_flush: Subgroup basic-batch-kernel-default-uc: fail -> PASS (fi-snb-2600) fdo#100007 Subgroup basic-wb-rw-before-default: pass -> INCOMPLETE (fi-skl-6700hq) fdo#100081 Test gem_exec_suspend: Subgroup basic-s4-devices: pass -> DMESG-WARN (fi-bxt-t5700) fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007 fdo#100081 https://bugs.freedesktop.org/show_bug.cgi?id=100081 fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 470s fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 611s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 538s fi-bxt-t5700 total:278 pass:257 dwarn:1 dfail:0 fail:0 skip:20 time: 609s fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 511s fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 499s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 437s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 435s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 440s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 495s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 494s fi-kbl-7500u total:278 pass:259 dwarn:1 dfail:0 fail:0 skip:18 time: 475s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 503s fi-skl-6700hq total:62 pass:54 dwarn:0 dfail:0 fail:0 skip:7 time: 0s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 503s fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 545s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 553s fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time: 431s dcca4ca8923adc61254f23eb66ca18a4c9e1ffd3 drm-tip: 2017y-03m-07d-18h-17m-03s UTC integration manifest e02ab59 drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages 98e01f1 drm/i915: Pass the correct plane index to _intel_compute_tile_offset() d44a4ff drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane 9f610c8 drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() 48539e6 drm/i915: Plumb drm_framebuffer into more places == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4088/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: ✗ Fi.CI.BAT: warning for drm/i915: CCS prep stuff 2017-03-07 20:22 ` ✗ Fi.CI.BAT: warning for drm/i915: CCS prep stuff Patchwork @ 2017-03-07 20:43 ` Ville Syrjälä 0 siblings, 0 replies; 12+ messages in thread From: Ville Syrjälä @ 2017-03-07 20:43 UTC (permalink / raw) To: intel-gfx On Tue, Mar 07, 2017 at 08:22:03PM -0000, Patchwork wrote: > == Series Details == > > Series: drm/i915: CCS prep stuff > URL : https://patchwork.freedesktop.org/series/20851/ > State : warning > > == Summary == > > Series 20851v1 drm/i915: CCS prep stuff > https://patchwork.freedesktop.org/api/1.0/series/20851/revisions/1/mbox/ > > Test gem_exec_flush: > Subgroup basic-batch-kernel-default-uc: > fail -> PASS (fi-snb-2600) fdo#100007 > Subgroup basic-wb-rw-before-default: > pass -> INCOMPLETE (fi-skl-6700hq) fdo#100081 > Test gem_exec_suspend: > Subgroup basic-s4-devices: > pass -> DMESG-WARN (fi-bxt-t5700) [ 380.840188] [drm] Atomic update on pipe (A) took 110 us, max time under evasion is 100 us Hmm. I wonder what we're doing in there on BXT that takes so long. Oh. I see plenty of DRM_DEBUG_KMS() calls via intel_update_pipe_config() at least. Those really need to go. [ 381.221206] WARNING: CPU: 3 PID: 0 at net/sched/sch_generic.c:316 dev_watchdog+0x225/0x230 Presumably not our problem, and not the first time this has been seen either. > > fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007 > fdo#100081 https://bugs.freedesktop.org/show_bug.cgi?id=100081 > > fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 470s > fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 611s > fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 538s > fi-bxt-t5700 total:278 pass:257 dwarn:1 dfail:0 fail:0 skip:20 time: 609s > fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 511s > fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 499s > fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 437s > fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 435s > fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 440s > fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 495s > fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 494s > fi-kbl-7500u total:278 pass:259 dwarn:1 dfail:0 fail:0 skip:18 time: 475s > fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 503s > fi-skl-6700hq total:62 pass:54 dwarn:0 dfail:0 fail:0 skip:7 time: 0s > fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 503s > fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 545s > fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 553s > fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time: 431s > > dcca4ca8923adc61254f23eb66ca18a4c9e1ffd3 drm-tip: 2017y-03m-07d-18h-17m-03s UTC integration manifest > e02ab59 drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages > 98e01f1 drm/i915: Pass the correct plane index to _intel_compute_tile_offset() > d44a4ff drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane > 9f610c8 drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() > 48539e6 drm/i915: Plumb drm_framebuffer into more places > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4088/ -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915: CCS prep stuff 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala ` (5 preceding siblings ...) 2017-03-07 20:22 ` ✗ Fi.CI.BAT: warning for drm/i915: CCS prep stuff Patchwork @ 2017-03-08 13:52 ` Patchwork 2017-03-08 14:08 ` Ville Syrjälä 2017-03-08 14:51 ` [PATCH 0/5] " Ville Syrjälä 7 siblings, 1 reply; 12+ messages in thread From: Patchwork @ 2017-03-08 13:52 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx == Series Details == Series: drm/i915: CCS prep stuff URL : https://patchwork.freedesktop.org/series/20851/ State : failure == Summary == Series 20851v1 drm/i915: CCS prep stuff https://patchwork.freedesktop.org/api/1.0/series/20851/revisions/1/mbox/ Test gem_exec_flush: Subgroup basic-uc-set-default: pass -> INCOMPLETE (fi-skl-6770hq) Test kms_force_connector_basic: Subgroup prune-stale-modes: pass -> SKIP (fi-ivb-3520m) fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 464s fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 614s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 539s fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 608s fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 504s fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 501s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 437s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 437s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 439s fi-ivb-3520m total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 504s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 475s fi-kbl-7500u total:278 pass:259 dwarn:1 dfail:0 fail:0 skip:18 time: 477s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 506s fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 599s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 500s fi-skl-6770hq total:57 pass:55 dwarn:0 dfail:0 fail:0 skip:1 time: 0s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 553s fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time: 419s 035f22af3e974f803031dc9f20e0969d5ae0a433 drm-tip: 2017y-03m-08d-11h-24m-39s UTC integration manifest 0550fc6 drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages bfff0ff drm/i915: Pass the correct plane index to _intel_compute_tile_offset() 95eb814 drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane 036d3e5 drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() ea6ee47 drm/i915: Plumb drm_framebuffer into more places == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4094/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: ✗ Fi.CI.BAT: failure for drm/i915: CCS prep stuff 2017-03-08 13:52 ` ✗ Fi.CI.BAT: failure " Patchwork @ 2017-03-08 14:08 ` Ville Syrjälä 2017-03-08 14:11 ` Chris Wilson 0 siblings, 1 reply; 12+ messages in thread From: Ville Syrjälä @ 2017-03-08 14:08 UTC (permalink / raw) To: intel-gfx On Wed, Mar 08, 2017 at 01:52:09PM -0000, Patchwork wrote: > == Series Details == > > Series: drm/i915: CCS prep stuff > URL : https://patchwork.freedesktop.org/series/20851/ > State : failure > > == Summary == > > Series 20851v1 drm/i915: CCS prep stuff > https://patchwork.freedesktop.org/api/1.0/series/20851/revisions/1/mbox/ > > Test gem_exec_flush: > Subgroup basic-uc-set-default: > pass -> INCOMPLETE (fi-skl-6770hq) Going to chuck this into the same bucket as https://bugs.freedesktop.org/show_bug.cgi?id=100112 I also see a few in the skl-600hq long term results. The common pattern seems to be skl+gem_exec_flush (the specific subtest varies between runs). > Test kms_force_connector_basic: > Subgroup prune-stale-modes: > pass -> SKIP (fi-ivb-3520m) > > fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 464s > fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 614s > fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 539s > fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 608s > fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 504s > fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 501s > fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 437s > fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 437s > fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 439s > fi-ivb-3520m total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 504s > fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 475s > fi-kbl-7500u total:278 pass:259 dwarn:1 dfail:0 fail:0 skip:18 time: 477s > fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 506s > fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 599s > fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 500s > fi-skl-6770hq total:57 pass:55 dwarn:0 dfail:0 fail:0 skip:1 time: 0s > fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 553s > fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time: 419s > > 035f22af3e974f803031dc9f20e0969d5ae0a433 drm-tip: 2017y-03m-08d-11h-24m-39s UTC integration manifest > 0550fc6 drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages > bfff0ff drm/i915: Pass the correct plane index to _intel_compute_tile_offset() > 95eb814 drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane > 036d3e5 drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() > ea6ee47 drm/i915: Plumb drm_framebuffer into more places > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4094/ -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: ✗ Fi.CI.BAT: failure for drm/i915: CCS prep stuff 2017-03-08 14:08 ` Ville Syrjälä @ 2017-03-08 14:11 ` Chris Wilson 0 siblings, 0 replies; 12+ messages in thread From: Chris Wilson @ 2017-03-08 14:11 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx On Wed, Mar 08, 2017 at 04:08:05PM +0200, Ville Syrjälä wrote: > On Wed, Mar 08, 2017 at 01:52:09PM -0000, Patchwork wrote: > > == Series Details == > > > > Series: drm/i915: CCS prep stuff > > URL : https://patchwork.freedesktop.org/series/20851/ > > State : failure > > > > == Summary == > > > > Series 20851v1 drm/i915: CCS prep stuff > > https://patchwork.freedesktop.org/api/1.0/series/20851/revisions/1/mbox/ > > > > Test gem_exec_flush: > > Subgroup basic-uc-set-default: > > pass -> INCOMPLETE (fi-skl-6770hq) > > Going to chuck this into the same bucket as > https://bugs.freedesktop.org/show_bug.cgi?id=100112 > > I also see a few in the skl-600hq long term results. The common > pattern seems to be skl+gem_exec_flush (the specific subtest > varies between runs). Afaict, it is not a i915.ko bug. It seems to be that the exit_handler in the test running is not killing off its children, and that causes piglit to wait forever. We have a workaround for that that should be hitting CI the next time it refreshes igt. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/5] drm/i915: CCS prep stuff 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala ` (6 preceding siblings ...) 2017-03-08 13:52 ` ✗ Fi.CI.BAT: failure " Patchwork @ 2017-03-08 14:51 ` Ville Syrjälä 7 siblings, 0 replies; 12+ messages in thread From: Ville Syrjälä @ 2017-03-08 14:51 UTC (permalink / raw) To: intel-gfx On Tue, Mar 07, 2017 at 09:42:05PM +0200, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Already reviewed prep stuff for CCS. Posting it separately so > that I can push it if/when CI gives the green light. > > Ville Syrjälä (5): > drm/i915: Plumb drm_framebuffer into more places > drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() > drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane > drm/i915: Pass the correct plane index to _intel_compute_tile_offset() > drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages Entire series pushed to dinq. Thanks for the review. > > drivers/gpu/drm/i915/intel_display.c | 213 ++++++++++++++++------------------- > drivers/gpu/drm/i915/intel_drv.h | 11 +- > drivers/gpu/drm/i915/intel_fbdev.c | 4 +- > 3 files changed, 99 insertions(+), 129 deletions(-) > > -- > 2.10.2 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2017-03-08 14:51 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-03-07 19:42 [PATCH 0/5] drm/i915: CCS prep stuff ville.syrjala 2017-03-07 19:42 ` [PATCH 1/5] drm/i915: Plumb drm_framebuffer into more places ville.syrjala 2017-03-07 19:42 ` [PATCH 2/5] drm/i915: Move nv12 chroma plane handling into intel_surf_alignment() ville.syrjala 2017-03-07 19:42 ` [PATCH 3/5] drm/i915: Avoid div-by-zero when computing aux_stride w/o an aux plane ville.syrjala 2017-03-07 19:42 ` [PATCH 4/5] drm/i915: Pass the correct plane index to _intel_compute_tile_offset() ville.syrjala 2017-03-07 19:42 ` [PATCH v2 5/5] drm/i915: Use DRM_DEBUG_KMS() for framebuffer failure debug messages ville.syrjala 2017-03-07 20:22 ` ✗ Fi.CI.BAT: warning for drm/i915: CCS prep stuff Patchwork 2017-03-07 20:43 ` Ville Syrjälä 2017-03-08 13:52 ` ✗ Fi.CI.BAT: failure " Patchwork 2017-03-08 14:08 ` Ville Syrjälä 2017-03-08 14:11 ` Chris Wilson 2017-03-08 14:51 ` [PATCH 0/5] " Ville Syrjälä
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.