[PATCH v2 0/3] Add EHCI support for Armada 37xx

[PATCH v2 0/3] Add EHCI support for Armada 37xx

[Gregory CLEMENT]

Hi,

The EHCI controller in the Armada 37xx SoCs is the one used on many
other mvebu SoCs such as the orion5x, the kirkwood, or the
armada. However, for Armada 37xx an extra initialization step is
needed: this is the purpose of the first patch.

The second patch allows to build the driver for the ARM64 Armada SoCs.

The last one enables the EHCI in the device tree.

This second version takes into account the review from Andrew Lunn and
Thomas Petazzoni.

Thanks,

Gregory

Changelog:
v1 -> v2:
- Fix typo in commit log of the patch 1, suggested by Andrew Lunn
- Fix wording in the device tree binding documenation, suggested by
  Andrew Lunn
- Make new define symbol name more clear by adding _SHIFT to the end,
  suggested by Andrew Lunn
- Use a full first name + last name for the Signed-off-by and the
  Authorship i oatch 1, suggested by Thomas Petazzoni.
- Improve the commit log of the patch 2, suggested by Andrew Lunn
- Fix Kconfig logic, suggested by Andrew Lunn

Gregory CLEMENT (2):
  usb: host: Allow to build ehci orion with mvebu SoCs
  ARM64: dts: marvell: armada-37xx: Add USB2 node

Hua Jing (1):
  usb: orion-echi: Add support for the Armada 3700

 .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
 arch/arm64/boot/dts/marvell/armada-3720-db.dts     |  6 ++++
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi       |  7 ++++
 drivers/usb/host/Kconfig                           |  2 +-
 drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
 5 files changed, 56 insertions(+), 2 deletions(-)

-- 
2.11.0

[PATCH v2 0/3] Add EHCI support for Armada 37xx

[Gregory CLEMENT]

Hi,

The EHCI controller in the Armada 37xx SoCs is the one used on many
other mvebu SoCs such as the orion5x, the kirkwood, or the
armada. However, for Armada 37xx an extra initialization step is
needed: this is the purpose of the first patch.

The second patch allows to build the driver for the ARM64 Armada SoCs.

The last one enables the EHCI in the device tree.

This second version takes into account the review from Andrew Lunn and
Thomas Petazzoni.

Thanks,

Gregory

Changelog:
v1 -> v2:
- Fix typo in commit log of the patch 1, suggested by Andrew Lunn
- Fix wording in the device tree binding documenation, suggested by
  Andrew Lunn
- Make new define symbol name more clear by adding _SHIFT to the end,
  suggested by Andrew Lunn
- Use a full first name + last name for the Signed-off-by and the
  Authorship i oatch 1, suggested by Thomas Petazzoni.
- Improve the commit log of the patch 2, suggested by Andrew Lunn
- Fix Kconfig logic, suggested by Andrew Lunn

Gregory CLEMENT (2):
  usb: host: Allow to build ehci orion with mvebu SoCs
  ARM64: dts: marvell: armada-37xx: Add USB2 node

Hua Jing (1):
  usb: orion-echi: Add support for the Armada 3700

 .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
 arch/arm64/boot/dts/marvell/armada-3720-db.dts     |  6 ++++
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi       |  7 ++++
 drivers/usb/host/Kconfig                           |  2 +-
 drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
 5 files changed, 56 insertions(+), 2 deletions(-)

-- 
2.11.0

[PATCH v2 0/3] Add EHCI support for Armada 37xx

[Gregory CLEMENT]

Hi,

The EHCI controller in the Armada 37xx SoCs is the one used on many
other mvebu SoCs such as the orion5x, the kirkwood, or the
armada. However, for Armada 37xx an extra initialization step is
needed: this is the purpose of the first patch.

The second patch allows to build the driver for the ARM64 Armada SoCs.

The last one enables the EHCI in the device tree.

This second version takes into account the review from Andrew Lunn and
Thomas Petazzoni.

Thanks,

Gregory

Changelog:
v1 -> v2:
- Fix typo in commit log of the patch 1, suggested by Andrew Lunn
- Fix wording in the device tree binding documenation, suggested by
  Andrew Lunn
- Make new define symbol name more clear by adding _SHIFT to the end,
  suggested by Andrew Lunn
- Use a full first name + last name for the Signed-off-by and the
  Authorship i oatch 1, suggested by Thomas Petazzoni.
- Improve the commit log of the patch 2, suggested by Andrew Lunn
- Fix Kconfig logic, suggested by Andrew Lunn

Gregory CLEMENT (2):
  usb: host: Allow to build ehci orion with mvebu SoCs
  ARM64: dts: marvell: armada-37xx: Add USB2 node

Hua Jing (1):
  usb: orion-echi: Add support for the Armada 3700

 .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
 arch/arm64/boot/dts/marvell/armada-3720-db.dts     |  6 ++++
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi       |  7 ++++
 drivers/usb/host/Kconfig                           |  2 +-
 drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
 5 files changed, 56 insertions(+), 2 deletions(-)

-- 
2.11.0

[PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Gregory CLEMENT]

From: Hua Jing <jinghua@marvell.com>

- Add a new compatible string for the Armada 3700 SoCs

- add sbuscfg support for orion usb controller driver. For the SoCs
  without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
  register to guarantee the AHB master's burst would not overrun or
  underrun the FIFO.

- the sbuscfg register has to be set after the usb controller reset,
  otherwise the value would be overridden to 0. In order to do this, the
  reset callback is registered.

[gregory.clement@free-electrons.com: - reword commit and comments
				     - fix checkpatch warning]
Signed-off-by: Hua Jing <jinghua@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
 drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
 2 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt
index 17c3bc858b86..2855bae79fda 100644
--- a/Documentation/devicetree/bindings/usb/ehci-orion.txt
+++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt
@@ -1,7 +1,9 @@
 * EHCI controller, Orion Marvell variants
 
 Required properties:
-- compatible: must be "marvell,orion-ehci"
+- compatible: must be one of the following
+	"marvell,orion-ehci"
+	"marvell,armada-3700-ehci"
 - reg: physical base address of the controller and length of memory mapped
   region.
 - interrupts: The EHCI interrupt
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index ee8d5faa0194..762bba41e06d 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -47,6 +47,21 @@
 #define USB_PHY_IVREF_CTRL	0x440
 #define USB_PHY_TST_GRP_CTRL	0x450
 
+#define USB_SBUSCFG		0x90
+#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
+#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
+#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0
+
+/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
+#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
+#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
+/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
+#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)
+
+#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
+			     | USB_SBUSCFG_BARD_ALIGN_128B	\
+			     | USB_SBUSCFG_AHBBRST_INCR16)
+
 #define DRIVER_DESC "EHCI orion driver"
 
 #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
@@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
 	}
 }
 
+static int ehci_orion_drv_reset(struct usb_hcd *hcd)
+{
+	struct device *dev = hcd->self.controller;
+	int retval;
+
+	retval = ehci_setup(hcd);
+	if (retval)
+		dev_err(dev, "ehci_setup failed %d\n", retval);
+
+	/*
+	 * For SoC without hlock, need to program sbuscfg value to guarantee
+	 * AHB master's burst would not overrun or underrun FIFO.
+	 *
+	 * sbuscfg reg has to be set after usb controller reset, otherwise
+	 * the value would be override to 0.
+	 */
+	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
+		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
+
+	return retval;
+}
+
 static const struct ehci_driver_overrides orion_overrides __initconst = {
 	.extra_priv_size =	sizeof(struct orion_ehci_hcd),
+	.reset = ehci_orion_drv_reset,
 };
 
 static int ehci_orion_drv_probe(struct platform_device *pdev)
@@ -310,6 +348,7 @@ static int ehci_orion_drv_remove(struct platform_device *pdev)
 
 static const struct of_device_id ehci_orion_dt_ids[] = {
 	{ .compatible = "marvell,orion-ehci", },
+	{ .compatible = "marvell,armada-3700-ehci", },
 	{},
 };
 MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
-- 
2.11.0

[PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Gregory CLEMENT]

From: Hua Jing <jinghua@marvell.com>

- Add a new compatible string for the Armada 3700 SoCs

- add sbuscfg support for orion usb controller driver. For the SoCs
  without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
  register to guarantee the AHB master's burst would not overrun or
  underrun the FIFO.

- the sbuscfg register has to be set after the usb controller reset,
  otherwise the value would be overridden to 0. In order to do this, the
  reset callback is registered.

[gregory.clement@free-electrons.com: - reword commit and comments
				     - fix checkpatch warning]
Signed-off-by: Hua Jing <jinghua@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
 drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
 2 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt
index 17c3bc858b86..2855bae79fda 100644
--- a/Documentation/devicetree/bindings/usb/ehci-orion.txt
+++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt
@@ -1,7 +1,9 @@
 * EHCI controller, Orion Marvell variants
 
 Required properties:
-- compatible: must be "marvell,orion-ehci"
+- compatible: must be one of the following
+	"marvell,orion-ehci"
+	"marvell,armada-3700-ehci"
 - reg: physical base address of the controller and length of memory mapped
   region.
 - interrupts: The EHCI interrupt
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index ee8d5faa0194..762bba41e06d 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -47,6 +47,21 @@
 #define USB_PHY_IVREF_CTRL	0x440
 #define USB_PHY_TST_GRP_CTRL	0x450
 
+#define USB_SBUSCFG		0x90
+#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
+#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
+#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0
+
+/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
+#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
+#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
+/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
+#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)
+
+#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
+			     | USB_SBUSCFG_BARD_ALIGN_128B	\
+			     | USB_SBUSCFG_AHBBRST_INCR16)
+
 #define DRIVER_DESC "EHCI orion driver"
 
 #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
@@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
 	}
 }
 
+static int ehci_orion_drv_reset(struct usb_hcd *hcd)
+{
+	struct device *dev = hcd->self.controller;
+	int retval;
+
+	retval = ehci_setup(hcd);
+	if (retval)
+		dev_err(dev, "ehci_setup failed %d\n", retval);
+
+	/*
+	 * For SoC without hlock, need to program sbuscfg value to guarantee
+	 * AHB master's burst would not overrun or underrun FIFO.
+	 *
+	 * sbuscfg reg has to be set after usb controller reset, otherwise
+	 * the value would be override to 0.
+	 */
+	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
+		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
+
+	return retval;
+}
+
 static const struct ehci_driver_overrides orion_overrides __initconst = {
 	.extra_priv_size =	sizeof(struct orion_ehci_hcd),
+	.reset = ehci_orion_drv_reset,
 };
 
 static int ehci_orion_drv_probe(struct platform_device *pdev)
@@ -310,6 +348,7 @@ static int ehci_orion_drv_remove(struct platform_device *pdev)
 
 static const struct of_device_id ehci_orion_dt_ids[] = {
 	{ .compatible = "marvell,orion-ehci", },
+	{ .compatible = "marvell,armada-3700-ehci", },
 	{},
 };
 MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
-- 
2.11.0

[PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Gregory CLEMENT]

From: Hua Jing <jinghua@marvell.com>

- Add a new compatible string for the Armada 3700 SoCs

- add sbuscfg support for orion usb controller driver. For the SoCs
  without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
  register to guarantee the AHB master's burst would not overrun or
  underrun the FIFO.

- the sbuscfg register has to be set after the usb controller reset,
  otherwise the value would be overridden to 0. In order to do this, the
  reset callback is registered.

[gregory.clement at free-electrons.com: - reword commit and comments
				     - fix checkpatch warning]
Signed-off-by: Hua Jing <jinghua@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
 drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
 2 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt
index 17c3bc858b86..2855bae79fda 100644
--- a/Documentation/devicetree/bindings/usb/ehci-orion.txt
+++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt
@@ -1,7 +1,9 @@
 * EHCI controller, Orion Marvell variants
 
 Required properties:
-- compatible: must be "marvell,orion-ehci"
+- compatible: must be one of the following
+	"marvell,orion-ehci"
+	"marvell,armada-3700-ehci"
 - reg: physical base address of the controller and length of memory mapped
   region.
 - interrupts: The EHCI interrupt
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index ee8d5faa0194..762bba41e06d 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -47,6 +47,21 @@
 #define USB_PHY_IVREF_CTRL	0x440
 #define USB_PHY_TST_GRP_CTRL	0x450
 
+#define USB_SBUSCFG		0x90
+#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
+#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
+#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0
+
+/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
+#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
+#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
+/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
+#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)
+
+#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
+			     | USB_SBUSCFG_BARD_ALIGN_128B	\
+			     | USB_SBUSCFG_AHBBRST_INCR16)
+
 #define DRIVER_DESC "EHCI orion driver"
 
 #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
@@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
 	}
 }
 
+static int ehci_orion_drv_reset(struct usb_hcd *hcd)
+{
+	struct device *dev = hcd->self.controller;
+	int retval;
+
+	retval = ehci_setup(hcd);
+	if (retval)
+		dev_err(dev, "ehci_setup failed %d\n", retval);
+
+	/*
+	 * For SoC without hlock, need to program sbuscfg value to guarantee
+	 * AHB master's burst would not overrun or underrun FIFO.
+	 *
+	 * sbuscfg reg has to be set after usb controller reset, otherwise
+	 * the value would be override to 0.
+	 */
+	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
+		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
+
+	return retval;
+}
+
 static const struct ehci_driver_overrides orion_overrides __initconst = {
 	.extra_priv_size =	sizeof(struct orion_ehci_hcd),
+	.reset = ehci_orion_drv_reset,
 };
 
 static int ehci_orion_drv_probe(struct platform_device *pdev)
@@ -310,6 +348,7 @@ static int ehci_orion_drv_remove(struct platform_device *pdev)
 
 static const struct of_device_id ehci_orion_dt_ids[] = {
 	{ .compatible = "marvell,orion-ehci", },
+	{ .compatible = "marvell,armada-3700-ehci", },
 	{},
 };
 MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
-- 
2.11.0

[PATCH v2 2/3] usb: host: Allow to build ehci orion with mvebu SoCs

[Gregory CLEMENT]

The mvebu ARM64 SoCs no longer select PLAT_ORION. However Armada 37xx use
the Orion EHCI controller. This patch allows the Orion EHCI driver to be
built when ARCH_MVEBU is selected.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 drivers/usb/host/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 407d947b34ea..54bdd76c7f03 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -188,7 +188,7 @@ config USB_EHCI_HCD_OMAP
 
 config USB_EHCI_HCD_ORION
 	tristate  "Support for Marvell EBU on-chip EHCI USB controller"
-	depends on USB_EHCI_HCD && PLAT_ORION
+	depends on USB_EHCI_HCD && (PLAT_ORION || ARCH_MVEBU)
 	default y
 	---help---
 	  Enables support for the on-chip EHCI controller on Marvell's
-- 
2.11.0

[PATCH v2 2/3] usb: host: Allow to build ehci orion with mvebu SoCs

[Gregory CLEMENT]

The mvebu ARM64 SoCs no longer select PLAT_ORION. However Armada 37xx use
the Orion EHCI controller. This patch allows the Orion EHCI driver to be
built when ARCH_MVEBU is selected.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 drivers/usb/host/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 407d947b34ea..54bdd76c7f03 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -188,7 +188,7 @@ config USB_EHCI_HCD_OMAP
 
 config USB_EHCI_HCD_ORION
 	tristate  "Support for Marvell EBU on-chip EHCI USB controller"
-	depends on USB_EHCI_HCD && PLAT_ORION
+	depends on USB_EHCI_HCD && (PLAT_ORION || ARCH_MVEBU)
 	default y
 	---help---
 	  Enables support for the on-chip EHCI controller on Marvell's
-- 
2.11.0

[PATCH v2 2/3] usb: host: Allow to build ehci orion with mvebu SoCs

[Gregory CLEMENT]

The mvebu ARM64 SoCs no longer select PLAT_ORION. However Armada 37xx use
the Orion EHCI controller. This patch allows the Orion EHCI driver to be
built when ARCH_MVEBU is selected.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 drivers/usb/host/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 407d947b34ea..54bdd76c7f03 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -188,7 +188,7 @@ config USB_EHCI_HCD_OMAP
 
 config USB_EHCI_HCD_ORION
 	tristate  "Support for Marvell EBU on-chip EHCI USB controller"
-	depends on USB_EHCI_HCD && PLAT_ORION
+	depends on USB_EHCI_HCD && (PLAT_ORION || ARCH_MVEBU)
 	default y
 	---help---
 	  Enables support for the on-chip EHCI controller on Marvell's
-- 
2.11.0

[PATCH v2 3/3] ARM64: dts: marvell: armada-37xx: Add USB2 node

[Gregory CLEMENT]

Armada 37xx SoC embedded an EHCI controller. This patch adds the device
tree node enabling its support.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-3720-db.dts | 6 ++++++
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi   | 7 +++++++
 2 files changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 864936acc316..aa39339b6582 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -134,6 +134,12 @@
 	status = "okay";
 };
 
+/* CON27 */
+&usb2 {
+	status = "okay";
+};
+
+
 &mdio {
 	status = "okay";
 	phy0: ethernet-phy@0 {
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index cf0c2f9ebd7d..7639518d8ee1 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -204,6 +204,13 @@
 				status = "disabled";
 			};
 
+			usb2: usb@5e000 {
+				compatible = "marvell,armada-3700-ehci";
+				reg = <0x5e000 0x2000>;
+				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
 			xor@60900 {
 				compatible = "marvell,armada-3700-xor";
 				reg = <0x60900 0x100
-- 
2.11.0

[PATCH v2 3/3] ARM64: dts: marvell: armada-37xx: Add USB2 node

[Gregory CLEMENT]

Armada 37xx SoC embedded an EHCI controller. This patch adds the device
tree node enabling its support.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-3720-db.dts | 6 ++++++
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi   | 7 +++++++
 2 files changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 864936acc316..aa39339b6582 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -134,6 +134,12 @@
 	status = "okay";
 };
 
+/* CON27 */
+&usb2 {
+	status = "okay";
+};
+
+
 &mdio {
 	status = "okay";
 	phy0: ethernet-phy@0 {
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index cf0c2f9ebd7d..7639518d8ee1 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -204,6 +204,13 @@
 				status = "disabled";
 			};
 
+			usb2: usb@5e000 {
+				compatible = "marvell,armada-3700-ehci";
+				reg = <0x5e000 0x2000>;
+				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
 			xor@60900 {
 				compatible = "marvell,armada-3700-xor";
 				reg = <0x60900 0x100
-- 
2.11.0

[PATCH v2 3/3] ARM64: dts: marvell: armada-37xx: Add USB2 node

[Gregory CLEMENT]

Armada 37xx SoC embedded an EHCI controller. This patch adds the device
tree node enabling its support.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-3720-db.dts | 6 ++++++
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi   | 7 +++++++
 2 files changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 864936acc316..aa39339b6582 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -134,6 +134,12 @@
 	status = "okay";
 };
 
+/* CON27 */
+&usb2 {
+	status = "okay";
+};
+
+
 &mdio {
 	status = "okay";
 	phy0: ethernet-phy at 0 {
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index cf0c2f9ebd7d..7639518d8ee1 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -204,6 +204,13 @@
 				status = "disabled";
 			};
 
+			usb2: usb at 5e000 {
+				compatible = "marvell,armada-3700-ehci";
+				reg = <0x5e000 0x2000>;
+				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
 			xor at 60900 {
 				compatible = "marvell,armada-3700-xor";
 				reg = <0x60900 0x100
-- 
2.11.0

Re: [PATCH v2 0/3] Add EHCI support for Armada 37xx

[Andrew Lunn]

On Thu, Mar 09, 2017 at 12:04:21PM +0100, Gregory CLEMENT wrote:
> Hi,
> 
> The EHCI controller in the Armada 37xx SoCs is the one used on many
> other mvebu SoCs such as the orion5x, the kirkwood, or the
> armada. However, for Armada 37xx an extra initialization step is
> needed: this is the purpose of the first patch.
> 
> The second patch allows to build the driver for the ARM64 Armada SoCs.
> 
> The last one enables the EHCI in the device tree.
> 
> This second version takes into account the review from Andrew Lunn and
> Thomas Petazzoni.

Hi Gregory

Thanks for making the changes.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v2 0/3] Add EHCI support for Armada 37xx

[Andrew Lunn]

On Thu, Mar 09, 2017 at 12:04:21PM +0100, Gregory CLEMENT wrote:
> Hi,
> 
> The EHCI controller in the Armada 37xx SoCs is the one used on many
> other mvebu SoCs such as the orion5x, the kirkwood, or the
> armada. However, for Armada 37xx an extra initialization step is
> needed: this is the purpose of the first patch.
> 
> The second patch allows to build the driver for the ARM64 Armada SoCs.
> 
> The last one enables the EHCI in the device tree.
> 
> This second version takes into account the review from Andrew Lunn and
> Thomas Petazzoni.

Hi Gregory

Thanks for making the changes.

Reviewed-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>

    Andrew
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 0/3] Add EHCI support for Armada 37xx

[Andrew Lunn]

On Thu, Mar 09, 2017 at 12:04:21PM +0100, Gregory CLEMENT wrote:
> Hi,
> 
> The EHCI controller in the Armada 37xx SoCs is the one used on many
> other mvebu SoCs such as the orion5x, the kirkwood, or the
> armada. However, for Armada 37xx an extra initialization step is
> needed: this is the purpose of the first patch.
> 
> The second patch allows to build the driver for the ARM64 Armada SoCs.
> 
> The last one enables the EHCI in the device tree.
> 
> This second version takes into account the review from Andrew Lunn and
> Thomas Petazzoni.

Hi Gregory

Thanks for making the changes.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Alan Stern]

On Thu, 9 Mar 2017, Gregory CLEMENT wrote:

> From: Hua Jing <jinghua@marvell.com>
> 
> - Add a new compatible string for the Armada 3700 SoCs
> 
> - add sbuscfg support for orion usb controller driver. For the SoCs
>   without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
>   register to guarantee the AHB master's burst would not overrun or
>   underrun the FIFO.
> 
> - the sbuscfg register has to be set after the usb controller reset,
>   otherwise the value would be overridden to 0. In order to do this, the
>   reset callback is registered.
> 
> [gregory.clement@free-electrons.com: - reword commit and comments
> 				     - fix checkpatch warning]
> Signed-off-by: Hua Jing <jinghua@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
>  .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
>  drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
>  2 files changed, 42 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt
> index 17c3bc858b86..2855bae79fda 100644
> --- a/Documentation/devicetree/bindings/usb/ehci-orion.txt
> +++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt
> @@ -1,7 +1,9 @@
>  * EHCI controller, Orion Marvell variants
>  
>  Required properties:
> -- compatible: must be "marvell,orion-ehci"
> +- compatible: must be one of the following
> +	"marvell,orion-ehci"
> +	"marvell,armada-3700-ehci"
>  - reg: physical base address of the controller and length of memory mapped
>    region.
>  - interrupts: The EHCI interrupt
> diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
> index ee8d5faa0194..762bba41e06d 100644
> --- a/drivers/usb/host/ehci-orion.c
> +++ b/drivers/usb/host/ehci-orion.c
> @@ -47,6 +47,21 @@
>  #define USB_PHY_IVREF_CTRL	0x440
>  #define USB_PHY_TST_GRP_CTRL	0x450
>  
> +#define USB_SBUSCFG		0x90
> +#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
> +#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
> +#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0

Shift amounts are just regular numbers.  Giving them in hex is 
confusing because it leads people to think the bit pattern has some 
particular significance, which it doesn't.  Which would you rather see: 
(0x24 << 0x12) or (0x24 << 18)?

> +
> +/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
> +#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
> +#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
> +/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
> +#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)

Besides, since these shift amounts are each used only once, it would be
simpler (and easier to read!) to do:

+#define USB_SBUSCFG_BAWR_ALIGN_128B  (0x3 << 6)
+#define USB_SBUSCFG_BARD_ALIGN_128B  (0x3 << 3)
+/* AHBBRST = 3          : Align AHB Burst to INCR16 (64 bytes) */
+#define USB_SBUSCFG_AHBBRST_INCR16   (0x3 << 0)


> +
> +#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
> +			     | USB_SBUSCFG_BARD_ALIGN_128B	\
> +			     | USB_SBUSCFG_AHBBRST_INCR16)
> +
>  #define DRIVER_DESC "EHCI orion driver"
>  
>  #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
> @@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
>  	}
>  }
>  
> +static int ehci_orion_drv_reset(struct usb_hcd *hcd)
> +{
> +	struct device *dev = hcd->self.controller;
> +	int retval;
> +
> +	retval = ehci_setup(hcd);
> +	if (retval)
> +		dev_err(dev, "ehci_setup failed %d\n", retval);

Was lack of this error message in the original driver a source of 
problems?  If not, I submit that there's no good reason to add it.

> +
> +	/*
> +	 * For SoC without hlock, need to program sbuscfg value to guarantee
> +	 * AHB master's burst would not overrun or underrun FIFO.
> +	 *
> +	 * sbuscfg reg has to be set after usb controller reset, otherwise
> +	 * the value would be override to 0.
> +	 */
> +	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
> +		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);

Do you want to do this even when retval != 0?

Alan Stern

> +
> +	return retval;
> +}
> +
>  static const struct ehci_driver_overrides orion_overrides __initconst = {
>  	.extra_priv_size =	sizeof(struct orion_ehci_hcd),
> +	.reset = ehci_orion_drv_reset,
>  };
>  
>  static int ehci_orion_drv_probe(struct platform_device *pdev)
> @@ -310,6 +348,7 @@ static int ehci_orion_drv_remove(struct platform_device *pdev)
>  
>  static const struct of_device_id ehci_orion_dt_ids[] = {
>  	{ .compatible = "marvell,orion-ehci", },
> +	{ .compatible = "marvell,armada-3700-ehci", },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
> 

Re: [PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Alan Stern]

On Thu, 9 Mar 2017, Gregory CLEMENT wrote:

> From: Hua Jing <jinghua@marvell.com>
> 
> - Add a new compatible string for the Armada 3700 SoCs
> 
> - add sbuscfg support for orion usb controller driver. For the SoCs
>   without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
>   register to guarantee the AHB master's burst would not overrun or
>   underrun the FIFO.
> 
> - the sbuscfg register has to be set after the usb controller reset,
>   otherwise the value would be overridden to 0. In order to do this, the
>   reset callback is registered.
> 
> [gregory.clement@free-electrons.com: - reword commit and comments
> 				     - fix checkpatch warning]
> Signed-off-by: Hua Jing <jinghua@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
>  .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
>  drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
>  2 files changed, 42 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt
> index 17c3bc858b86..2855bae79fda 100644
> --- a/Documentation/devicetree/bindings/usb/ehci-orion.txt
> +++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt
> @@ -1,7 +1,9 @@
>  * EHCI controller, Orion Marvell variants
>  
>  Required properties:
> -- compatible: must be "marvell,orion-ehci"
> +- compatible: must be one of the following
> +	"marvell,orion-ehci"
> +	"marvell,armada-3700-ehci"
>  - reg: physical base address of the controller and length of memory mapped
>    region.
>  - interrupts: The EHCI interrupt
> diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
> index ee8d5faa0194..762bba41e06d 100644
> --- a/drivers/usb/host/ehci-orion.c
> +++ b/drivers/usb/host/ehci-orion.c
> @@ -47,6 +47,21 @@
>  #define USB_PHY_IVREF_CTRL	0x440
>  #define USB_PHY_TST_GRP_CTRL	0x450
>  
> +#define USB_SBUSCFG		0x90
> +#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
> +#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
> +#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0

Shift amounts are just regular numbers.  Giving them in hex is 
confusing because it leads people to think the bit pattern has some 
particular significance, which it doesn't.  Which would you rather see: 
(0x24 << 0x12) or (0x24 << 18)?

> +
> +/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
> +#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
> +#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
> +/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
> +#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)

Besides, since these shift amounts are each used only once, it would be
simpler (and easier to read!) to do:

+#define USB_SBUSCFG_BAWR_ALIGN_128B  (0x3 << 6)
+#define USB_SBUSCFG_BARD_ALIGN_128B  (0x3 << 3)
+/* AHBBRST = 3          : Align AHB Burst to INCR16 (64 bytes) */
+#define USB_SBUSCFG_AHBBRST_INCR16   (0x3 << 0)


> +
> +#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
> +			     | USB_SBUSCFG_BARD_ALIGN_128B	\
> +			     | USB_SBUSCFG_AHBBRST_INCR16)
> +
>  #define DRIVER_DESC "EHCI orion driver"
>  
>  #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
> @@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
>  	}
>  }
>  
> +static int ehci_orion_drv_reset(struct usb_hcd *hcd)
> +{
> +	struct device *dev = hcd->self.controller;
> +	int retval;
> +
> +	retval = ehci_setup(hcd);
> +	if (retval)
> +		dev_err(dev, "ehci_setup failed %d\n", retval);

Was lack of this error message in the original driver a source of 
problems?  If not, I submit that there's no good reason to add it.

> +
> +	/*
> +	 * For SoC without hlock, need to program sbuscfg value to guarantee
> +	 * AHB master's burst would not overrun or underrun FIFO.
> +	 *
> +	 * sbuscfg reg has to be set after usb controller reset, otherwise
> +	 * the value would be override to 0.
> +	 */
> +	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
> +		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);

Do you want to do this even when retval != 0?

Alan Stern

> +
> +	return retval;
> +}
> +
>  static const struct ehci_driver_overrides orion_overrides __initconst = {
>  	.extra_priv_size =	sizeof(struct orion_ehci_hcd),
> +	.reset = ehci_orion_drv_reset,
>  };
>  
>  static int ehci_orion_drv_probe(struct platform_device *pdev)
> @@ -310,6 +348,7 @@ static int ehci_orion_drv_remove(struct platform_device *pdev)
>  
>  static const struct of_device_id ehci_orion_dt_ids[] = {
>  	{ .compatible = "marvell,orion-ehci", },
> +	{ .compatible = "marvell,armada-3700-ehci", },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
> 

[PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Alan Stern]

On Thu, 9 Mar 2017, Gregory CLEMENT wrote:

> From: Hua Jing <jinghua@marvell.com>
> 
> - Add a new compatible string for the Armada 3700 SoCs
> 
> - add sbuscfg support for orion usb controller driver. For the SoCs
>   without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
>   register to guarantee the AHB master's burst would not overrun or
>   underrun the FIFO.
> 
> - the sbuscfg register has to be set after the usb controller reset,
>   otherwise the value would be overridden to 0. In order to do this, the
>   reset callback is registered.
> 
> [gregory.clement at free-electrons.com: - reword commit and comments
> 				     - fix checkpatch warning]
> Signed-off-by: Hua Jing <jinghua@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
>  .../devicetree/bindings/usb/ehci-orion.txt         |  4 ++-
>  drivers/usb/host/ehci-orion.c                      | 39 ++++++++++++++++++++++
>  2 files changed, 42 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt
> index 17c3bc858b86..2855bae79fda 100644
> --- a/Documentation/devicetree/bindings/usb/ehci-orion.txt
> +++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt
> @@ -1,7 +1,9 @@
>  * EHCI controller, Orion Marvell variants
>  
>  Required properties:
> -- compatible: must be "marvell,orion-ehci"
> +- compatible: must be one of the following
> +	"marvell,orion-ehci"
> +	"marvell,armada-3700-ehci"
>  - reg: physical base address of the controller and length of memory mapped
>    region.
>  - interrupts: The EHCI interrupt
> diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
> index ee8d5faa0194..762bba41e06d 100644
> --- a/drivers/usb/host/ehci-orion.c
> +++ b/drivers/usb/host/ehci-orion.c
> @@ -47,6 +47,21 @@
>  #define USB_PHY_IVREF_CTRL	0x440
>  #define USB_PHY_TST_GRP_CTRL	0x450
>  
> +#define USB_SBUSCFG		0x90
> +#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
> +#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
> +#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0

Shift amounts are just regular numbers.  Giving them in hex is 
confusing because it leads people to think the bit pattern has some 
particular significance, which it doesn't.  Which would you rather see: 
(0x24 << 0x12) or (0x24 << 18)?

> +
> +/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
> +#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
> +#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
> +/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
> +#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)

Besides, since these shift amounts are each used only once, it would be
simpler (and easier to read!) to do:

+#define USB_SBUSCFG_BAWR_ALIGN_128B  (0x3 << 6)
+#define USB_SBUSCFG_BARD_ALIGN_128B  (0x3 << 3)
+/* AHBBRST = 3          : Align AHB Burst to INCR16 (64 bytes) */
+#define USB_SBUSCFG_AHBBRST_INCR16   (0x3 << 0)


> +
> +#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
> +			     | USB_SBUSCFG_BARD_ALIGN_128B	\
> +			     | USB_SBUSCFG_AHBBRST_INCR16)
> +
>  #define DRIVER_DESC "EHCI orion driver"
>  
>  #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
> @@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
>  	}
>  }
>  
> +static int ehci_orion_drv_reset(struct usb_hcd *hcd)
> +{
> +	struct device *dev = hcd->self.controller;
> +	int retval;
> +
> +	retval = ehci_setup(hcd);
> +	if (retval)
> +		dev_err(dev, "ehci_setup failed %d\n", retval);

Was lack of this error message in the original driver a source of 
problems?  If not, I submit that there's no good reason to add it.

> +
> +	/*
> +	 * For SoC without hlock, need to program sbuscfg value to guarantee
> +	 * AHB master's burst would not overrun or underrun FIFO.
> +	 *
> +	 * sbuscfg reg has to be set after usb controller reset, otherwise
> +	 * the value would be override to 0.
> +	 */
> +	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
> +		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);

Do you want to do this even when retval != 0?

Alan Stern

> +
> +	return retval;
> +}
> +
>  static const struct ehci_driver_overrides orion_overrides __initconst = {
>  	.extra_priv_size =	sizeof(struct orion_ehci_hcd),
> +	.reset = ehci_orion_drv_reset,
>  };
>  
>  static int ehci_orion_drv_probe(struct platform_device *pdev)
> @@ -310,6 +348,7 @@ static int ehci_orion_drv_remove(struct platform_device *pdev)
>  
>  static const struct of_device_id ehci_orion_dt_ids[] = {
>  	{ .compatible = "marvell,orion-ehci", },
> +	{ .compatible = "marvell,armada-3700-ehci", },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
> 

Re: [PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Gregory CLEMENT]

Hi Alan,
 
 On jeu., mars 09 2017, Alan Stern <stern@rowland.harvard.edu> wrote:

>> @@ -47,6 +47,21 @@
>>  #define USB_PHY_IVREF_CTRL	0x440
>>  #define USB_PHY_TST_GRP_CTRL	0x450
>>  
>> +#define USB_SBUSCFG		0x90
>> +#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
>> +#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
>> +#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0
>
> Shift amounts are just regular numbers.  Giving them in hex is 
> confusing because it leads people to think the bit pattern has some 
> particular significance, which it doesn't.  Which would you rather see: 
> (0x24 << 0x12) or (0x24 << 18)?

Right

>
>> +
>> +/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
>> +#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
>> +#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
>> +/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
>> +#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)
>
> Besides, since these shift amounts are each used only once, it would be
> simpler (and easier to read!) to do:
>
> +#define USB_SBUSCFG_BAWR_ALIGN_128B  (0x3 << 6)
> +#define USB_SBUSCFG_BARD_ALIGN_128B  (0x3 << 3)
> +/* AHBBRST = 3          : Align AHB Burst to INCR16 (64 bytes) */
> +#define USB_SBUSCFG_AHBBRST_INCR16   (0x3 << 0)
>

I think the intent was to document the register layout. But I have no
problem following your advice.

>
>> +
>> +#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
>> +			     | USB_SBUSCFG_BARD_ALIGN_128B	\
>> +			     | USB_SBUSCFG_AHBBRST_INCR16)
>> +
>>  #define DRIVER_DESC "EHCI orion driver"
>>  
>>  #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
>> @@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
>>  	}
>>  }
>>  
>> +static int ehci_orion_drv_reset(struct usb_hcd *hcd)
>> +{
>> +	struct device *dev = hcd->self.controller;
>> +	int retval;
>> +
>> +	retval = ehci_setup(hcd);
>> +	if (retval)
>> +		dev_err(dev, "ehci_setup failed %d\n", retval);
>
> Was lack of this error message in the original driver a source of 
> problems?  If not, I submit that there's no good reason to add it.
>

I will remove the message and replace it by "return retval;" as
suggested below.

Thanks,

Gregory

>> +
>> +	/*
>> +	 * For SoC without hlock, need to program sbuscfg value to guarantee
>> +	 * AHB master's burst would not overrun or underrun FIFO.
>> +	 *
>> +	 * sbuscfg reg has to be set after usb controller reset, otherwise
>> +	 * the value would be override to 0.
>> +	 */
>> +	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
>> +		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
>
> Do you want to do this even when retval != 0?
>
> Alan Stern

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Gregory CLEMENT]

Hi Alan,
 
 On jeu., mars 09 2017, Alan Stern <stern-nwvwT67g6+6dFdvTe/nMLpVzexx5G7lz@public.gmane.org> wrote:

>> @@ -47,6 +47,21 @@
>>  #define USB_PHY_IVREF_CTRL	0x440
>>  #define USB_PHY_TST_GRP_CTRL	0x450
>>  
>> +#define USB_SBUSCFG		0x90
>> +#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
>> +#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
>> +#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0
>
> Shift amounts are just regular numbers.  Giving them in hex is 
> confusing because it leads people to think the bit pattern has some 
> particular significance, which it doesn't.  Which would you rather see: 
> (0x24 << 0x12) or (0x24 << 18)?

Right

>
>> +
>> +/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
>> +#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
>> +#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
>> +/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
>> +#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)
>
> Besides, since these shift amounts are each used only once, it would be
> simpler (and easier to read!) to do:
>
> +#define USB_SBUSCFG_BAWR_ALIGN_128B  (0x3 << 6)
> +#define USB_SBUSCFG_BARD_ALIGN_128B  (0x3 << 3)
> +/* AHBBRST = 3          : Align AHB Burst to INCR16 (64 bytes) */
> +#define USB_SBUSCFG_AHBBRST_INCR16   (0x3 << 0)
>

I think the intent was to document the register layout. But I have no
problem following your advice.

>
>> +
>> +#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
>> +			     | USB_SBUSCFG_BARD_ALIGN_128B	\
>> +			     | USB_SBUSCFG_AHBBRST_INCR16)
>> +
>>  #define DRIVER_DESC "EHCI orion driver"
>>  
>>  #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
>> @@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
>>  	}
>>  }
>>  
>> +static int ehci_orion_drv_reset(struct usb_hcd *hcd)
>> +{
>> +	struct device *dev = hcd->self.controller;
>> +	int retval;
>> +
>> +	retval = ehci_setup(hcd);
>> +	if (retval)
>> +		dev_err(dev, "ehci_setup failed %d\n", retval);
>
> Was lack of this error message in the original driver a source of 
> problems?  If not, I submit that there's no good reason to add it.
>

I will remove the message and replace it by "return retval;" as
suggested below.

Thanks,

Gregory

>> +
>> +	/*
>> +	 * For SoC without hlock, need to program sbuscfg value to guarantee
>> +	 * AHB master's burst would not overrun or underrun FIFO.
>> +	 *
>> +	 * sbuscfg reg has to be set after usb controller reset, otherwise
>> +	 * the value would be override to 0.
>> +	 */
>> +	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
>> +		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
>
> Do you want to do this even when retval != 0?
>
> Alan Stern

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 1/3] usb: orion-echi: Add support for the Armada 3700

[Gregory CLEMENT]

Hi Alan,
 
 On jeu., mars 09 2017, Alan Stern <stern@rowland.harvard.edu> wrote:

>> @@ -47,6 +47,21 @@
>>  #define USB_PHY_IVREF_CTRL	0x440
>>  #define USB_PHY_TST_GRP_CTRL	0x450
>>  
>> +#define USB_SBUSCFG		0x90
>> +#define	    USB_SBUSCFG_BAWR_SHIFT	    0x6
>> +#define	    USB_SBUSCFG_BARD_SHIFT	    0x3
>> +#define	    USB_SBUSCFG_AHBBRST_SHIFT	    0x0
>
> Shift amounts are just regular numbers.  Giving them in hex is 
> confusing because it leads people to think the bit pattern has some 
> particular significance, which it doesn't.  Which would you rather see: 
> (0x24 << 0x12) or (0x24 << 18)?

Right

>
>> +
>> +/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
>> +#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << USB_SBUSCFG_BAWR_SHIFT)
>> +#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << USB_SBUSCFG_BARD_SHIFT)
>> +/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
>> +#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << USB_SBUSCFG_AHBBRST_SHIFT)
>
> Besides, since these shift amounts are each used only once, it would be
> simpler (and easier to read!) to do:
>
> +#define USB_SBUSCFG_BAWR_ALIGN_128B  (0x3 << 6)
> +#define USB_SBUSCFG_BARD_ALIGN_128B  (0x3 << 3)
> +/* AHBBRST = 3          : Align AHB Burst to INCR16 (64 bytes) */
> +#define USB_SBUSCFG_AHBBRST_INCR16   (0x3 << 0)
>

I think the intent was to document the register layout. But I have no
problem following your advice.

>
>> +
>> +#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
>> +			     | USB_SBUSCFG_BARD_ALIGN_128B	\
>> +			     | USB_SBUSCFG_AHBBRST_INCR16)
>> +
>>  #define DRIVER_DESC "EHCI orion driver"
>>  
>>  #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
>> @@ -151,8 +166,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
>>  	}
>>  }
>>  
>> +static int ehci_orion_drv_reset(struct usb_hcd *hcd)
>> +{
>> +	struct device *dev = hcd->self.controller;
>> +	int retval;
>> +
>> +	retval = ehci_setup(hcd);
>> +	if (retval)
>> +		dev_err(dev, "ehci_setup failed %d\n", retval);
>
> Was lack of this error message in the original driver a source of 
> problems?  If not, I submit that there's no good reason to add it.
>

I will remove the message and replace it by "return retval;" as
suggested below.

Thanks,

Gregory

>> +
>> +	/*
>> +	 * For SoC without hlock, need to program sbuscfg value to guarantee
>> +	 * AHB master's burst would not overrun or underrun FIFO.
>> +	 *
>> +	 * sbuscfg reg has to be set after usb controller reset, otherwise
>> +	 * the value would be override to 0.
>> +	 */
>> +	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
>> +		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
>
> Do you want to do this even when retval != 0?
>
> Alan Stern

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com