* [PATCH] ahci: qoriq: correct the sata ecc setting error
@ 2017-03-09 9:13 ` Yuantian Tang
0 siblings, 0 replies; 5+ messages in thread
From: Yuantian Tang @ 2017-03-09 9:13 UTC (permalink / raw)
To: tj; +Cc: linux-ide, Yuantian Tang, linux-kernel, linux-arm-kernel
Sata ecc is controlled by only 1 bit which is 24bit in big-endian
in ecc register. So only setting 24bit to disable sata ecc prevents
other bits from being overwritten in ecc register.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
---
drivers/ata/ahci_qoriq.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index 85d8332..4c96f3a 100644
--- a/drivers/ata/ahci_qoriq.c
+++ b/drivers/ata/ahci_qoriq.c
@@ -177,7 +177,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
case AHCI_LS1043A:
if (!qpriv->ecc_addr)
return -EINVAL;
- writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
+ writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
if (qpriv->is_dmacoherent)
@@ -194,7 +195,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
case AHCI_LS1046A:
if (!qpriv->ecc_addr)
return -EINVAL;
- writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
+ writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
if (qpriv->is_dmacoherent)
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] ahci: qoriq: correct the sata ecc setting error
@ 2017-03-09 9:13 ` Yuantian Tang
0 siblings, 0 replies; 5+ messages in thread
From: Yuantian Tang @ 2017-03-09 9:13 UTC (permalink / raw)
To: tj; +Cc: linux-ide, linux-kernel, linux-arm-kernel, Yuantian Tang
Sata ecc is controlled by only 1 bit which is 24bit in big-endian
in ecc register. So only setting 24bit to disable sata ecc prevents
other bits from being overwritten in ecc register.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
---
drivers/ata/ahci_qoriq.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index 85d8332..4c96f3a 100644
--- a/drivers/ata/ahci_qoriq.c
+++ b/drivers/ata/ahci_qoriq.c
@@ -177,7 +177,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
case AHCI_LS1043A:
if (!qpriv->ecc_addr)
return -EINVAL;
- writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
+ writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
if (qpriv->is_dmacoherent)
@@ -194,7 +195,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
case AHCI_LS1046A:
if (!qpriv->ecc_addr)
return -EINVAL;
- writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
+ writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
if (qpriv->is_dmacoherent)
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] ahci: qoriq: correct the sata ecc setting error
@ 2017-03-09 9:13 ` Yuantian Tang
0 siblings, 0 replies; 5+ messages in thread
From: Yuantian Tang @ 2017-03-09 9:13 UTC (permalink / raw)
To: linux-arm-kernel
Sata ecc is controlled by only 1 bit which is 24bit in big-endian
in ecc register. So only setting 24bit to disable sata ecc prevents
other bits from being overwritten in ecc register.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
---
drivers/ata/ahci_qoriq.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index 85d8332..4c96f3a 100644
--- a/drivers/ata/ahci_qoriq.c
+++ b/drivers/ata/ahci_qoriq.c
@@ -177,7 +177,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
case AHCI_LS1043A:
if (!qpriv->ecc_addr)
return -EINVAL;
- writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
+ writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
if (qpriv->is_dmacoherent)
@@ -194,7 +195,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
case AHCI_LS1046A:
if (!qpriv->ecc_addr)
return -EINVAL;
- writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
+ writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
if (qpriv->is_dmacoherent)
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] ahci: qoriq: correct the sata ecc setting error
2017-03-09 9:13 ` Yuantian Tang
@ 2017-03-09 16:56 ` Tejun Heo
-1 siblings, 0 replies; 5+ messages in thread
From: Tejun Heo @ 2017-03-09 16:56 UTC (permalink / raw)
To: Yuantian Tang; +Cc: linux-ide, linux-kernel, linux-arm-kernel
On Thu, Mar 09, 2017 at 05:13:29PM +0800, Yuantian Tang wrote:
> Sata ecc is controlled by only 1 bit which is 24bit in big-endian
> in ecc register. So only setting 24bit to disable sata ecc prevents
> other bits from being overwritten in ecc register.
>
> Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Applied to libata/for-4.11-fixes.
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] ahci: qoriq: correct the sata ecc setting error
@ 2017-03-09 16:56 ` Tejun Heo
0 siblings, 0 replies; 5+ messages in thread
From: Tejun Heo @ 2017-03-09 16:56 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Mar 09, 2017 at 05:13:29PM +0800, Yuantian Tang wrote:
> Sata ecc is controlled by only 1 bit which is 24bit in big-endian
> in ecc register. So only setting 24bit to disable sata ecc prevents
> other bits from being overwritten in ecc register.
>
> Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Applied to libata/for-4.11-fixes.
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-03-09 16:56 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-03-09 9:13 [PATCH] ahci: qoriq: correct the sata ecc setting error Yuantian Tang
2017-03-09 9:13 ` Yuantian Tang
2017-03-09 9:13 ` Yuantian Tang
2017-03-09 16:56 ` Tejun Heo
2017-03-09 16:56 ` Tejun Heo
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