From: Christoffer Dall <cdall@linaro.org> To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier <marc.zyngier@arm.com>, Andre Przywara <andre.przywara@arm.com>, kvm@vger.kernel.org Subject: [PATCH 5/9] KVM: arm/arm64: vgic: Get rid of unnecessary save_maint_int_state Date: Mon, 20 Mar 2017 11:58:14 +0100 [thread overview] Message-ID: <20170320105818.20481-6-cdall@linaro.org> (raw) In-Reply-To: <20170320105818.20481-1-cdall@linaro.org> From: Christoffer Dall <christoffer.dall@linaro.org> Now when we don't look at the MISR and EISR values anymore, we can get rid of the logic to save them in the GIC save/restore code. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> --- virt/kvm/arm/hyp/vgic-v2-sr.c | 40 ---------------------------------------- virt/kvm/arm/hyp/vgic-v3-sr.c | 29 ----------------------------- 2 files changed, 69 deletions(-) diff --git a/virt/kvm/arm/hyp/vgic-v2-sr.c b/virt/kvm/arm/hyp/vgic-v2-sr.c index 34b37ce..a4c3bb0 100644 --- a/virt/kvm/arm/hyp/vgic-v2-sr.c +++ b/virt/kvm/arm/hyp/vgic-v2-sr.c @@ -22,45 +22,6 @@ #include <asm/kvm_emulate.h> #include <asm/kvm_hyp.h> -static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu, - void __iomem *base) -{ - struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; - u32 eisr0, eisr1; - int i; - bool expect_mi; - - expect_mi = !!(cpu_if->vgic_hcr & GICH_HCR_UIE); - - for (i = 0; i < used_lrs && !expect_mi; i++) - expect_mi |= (!(cpu_if->vgic_lr[i] & GICH_LR_HW) && - (cpu_if->vgic_lr[i] & GICH_LR_EOI)); - - if (expect_mi) { - cpu_if->vgic_misr = readl_relaxed(base + GICH_MISR); - - if (cpu_if->vgic_misr & GICH_MISR_EOI) { - eisr0 = readl_relaxed(base + GICH_EISR0); - if (unlikely(used_lrs > 32)) - eisr1 = readl_relaxed(base + GICH_EISR1); - else - eisr1 = 0; - } else { - eisr0 = eisr1 = 0; - } - } else { - cpu_if->vgic_misr = 0; - eisr0 = eisr1 = 0; - } - -#ifdef CONFIG_CPU_BIG_ENDIAN - cpu_if->vgic_eisr = ((u64)eisr0 << 32) | eisr1; -#else - cpu_if->vgic_eisr = ((u64)eisr1 << 32) | eisr0; -#endif -} - static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; @@ -111,7 +72,6 @@ void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu) if (used_lrs) { cpu_if->vgic_apr = readl_relaxed(base + GICH_APR); - save_maint_int_state(vcpu, base); save_elrsr(vcpu, base); save_lrs(vcpu, base); diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c index b3c36b6..41bbbb0 100644 --- a/virt/kvm/arm/hyp/vgic-v3-sr.c +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c @@ -118,33 +118,6 @@ static void __hyp_text __gic_v3_set_lr(u64 val, int lr) } } -static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu) -{ - struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; - int i; - bool expect_mi; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; - - expect_mi = !!(cpu_if->vgic_hcr & ICH_HCR_UIE); - - for (i = 0; i < used_lrs; i++) { - expect_mi |= (!(cpu_if->vgic_lr[i] & ICH_LR_HW) && - (cpu_if->vgic_lr[i] & ICH_LR_EOI)); - } - - if (expect_mi) { - cpu_if->vgic_misr = read_gicreg(ICH_MISR_EL2); - - if (cpu_if->vgic_misr & ICH_MISR_EOI) - cpu_if->vgic_eisr = read_gicreg(ICH_EISR_EL2); - else - cpu_if->vgic_eisr = 0; - } else { - cpu_if->vgic_misr = 0; - cpu_if->vgic_eisr = 0; - } -} - void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu) { struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; @@ -168,8 +141,6 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu) val = read_gicreg(ICH_VTR_EL2); nr_pri_bits = vtr_to_nr_pri_bits(val); - save_maint_int_state(vcpu); - for (i = 0; i <= used_lrs; i++) { if (cpu_if->vgic_elrsr & (1 << i)) cpu_if->vgic_lr[i] &= ~ICH_LR_STATE; -- 2.9.0
WARNING: multiple messages have this Message-ID (diff)
From: cdall@linaro.org (Christoffer Dall) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/9] KVM: arm/arm64: vgic: Get rid of unnecessary save_maint_int_state Date: Mon, 20 Mar 2017 11:58:14 +0100 [thread overview] Message-ID: <20170320105818.20481-6-cdall@linaro.org> (raw) In-Reply-To: <20170320105818.20481-1-cdall@linaro.org> From: Christoffer Dall <christoffer.dall@linaro.org> Now when we don't look at the MISR and EISR values anymore, we can get rid of the logic to save them in the GIC save/restore code. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> --- virt/kvm/arm/hyp/vgic-v2-sr.c | 40 ---------------------------------------- virt/kvm/arm/hyp/vgic-v3-sr.c | 29 ----------------------------- 2 files changed, 69 deletions(-) diff --git a/virt/kvm/arm/hyp/vgic-v2-sr.c b/virt/kvm/arm/hyp/vgic-v2-sr.c index 34b37ce..a4c3bb0 100644 --- a/virt/kvm/arm/hyp/vgic-v2-sr.c +++ b/virt/kvm/arm/hyp/vgic-v2-sr.c @@ -22,45 +22,6 @@ #include <asm/kvm_emulate.h> #include <asm/kvm_hyp.h> -static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu, - void __iomem *base) -{ - struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; - u32 eisr0, eisr1; - int i; - bool expect_mi; - - expect_mi = !!(cpu_if->vgic_hcr & GICH_HCR_UIE); - - for (i = 0; i < used_lrs && !expect_mi; i++) - expect_mi |= (!(cpu_if->vgic_lr[i] & GICH_LR_HW) && - (cpu_if->vgic_lr[i] & GICH_LR_EOI)); - - if (expect_mi) { - cpu_if->vgic_misr = readl_relaxed(base + GICH_MISR); - - if (cpu_if->vgic_misr & GICH_MISR_EOI) { - eisr0 = readl_relaxed(base + GICH_EISR0); - if (unlikely(used_lrs > 32)) - eisr1 = readl_relaxed(base + GICH_EISR1); - else - eisr1 = 0; - } else { - eisr0 = eisr1 = 0; - } - } else { - cpu_if->vgic_misr = 0; - eisr0 = eisr1 = 0; - } - -#ifdef CONFIG_CPU_BIG_ENDIAN - cpu_if->vgic_eisr = ((u64)eisr0 << 32) | eisr1; -#else - cpu_if->vgic_eisr = ((u64)eisr1 << 32) | eisr0; -#endif -} - static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; @@ -111,7 +72,6 @@ void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu) if (used_lrs) { cpu_if->vgic_apr = readl_relaxed(base + GICH_APR); - save_maint_int_state(vcpu, base); save_elrsr(vcpu, base); save_lrs(vcpu, base); diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c index b3c36b6..41bbbb0 100644 --- a/virt/kvm/arm/hyp/vgic-v3-sr.c +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c @@ -118,33 +118,6 @@ static void __hyp_text __gic_v3_set_lr(u64 val, int lr) } } -static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu) -{ - struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; - int i; - bool expect_mi; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; - - expect_mi = !!(cpu_if->vgic_hcr & ICH_HCR_UIE); - - for (i = 0; i < used_lrs; i++) { - expect_mi |= (!(cpu_if->vgic_lr[i] & ICH_LR_HW) && - (cpu_if->vgic_lr[i] & ICH_LR_EOI)); - } - - if (expect_mi) { - cpu_if->vgic_misr = read_gicreg(ICH_MISR_EL2); - - if (cpu_if->vgic_misr & ICH_MISR_EOI) - cpu_if->vgic_eisr = read_gicreg(ICH_EISR_EL2); - else - cpu_if->vgic_eisr = 0; - } else { - cpu_if->vgic_misr = 0; - cpu_if->vgic_eisr = 0; - } -} - void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu) { struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; @@ -168,8 +141,6 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu) val = read_gicreg(ICH_VTR_EL2); nr_pri_bits = vtr_to_nr_pri_bits(val); - save_maint_int_state(vcpu); - for (i = 0; i <= used_lrs; i++) { if (cpu_if->vgic_elrsr & (1 << i)) cpu_if->vgic_lr[i] &= ~ICH_LR_STATE; -- 2.9.0
next prev parent reply other threads:[~2017-03-20 10:58 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-20 10:58 [PATCH 0/9] KVM: arm/arm64: vgic: Improvements and optimizations Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-20 10:58 ` [PATCH 1/9] KVM: arm/arm64: vgic: Defer touching GICH_VMCR to vcpu_load/put Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-21 10:29 ` Marc Zyngier 2017-03-21 10:29 ` Marc Zyngier 2017-03-21 11:16 ` Christoffer Dall 2017-03-21 11:16 ` Christoffer Dall 2017-03-20 10:58 ` [PATCH 2/9] KVM: arm/arm64: vgic: Avoid flushing vgic state when there's no pending IRQ Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-21 10:57 ` Marc Zyngier 2017-03-21 10:57 ` Marc Zyngier 2017-03-21 11:17 ` Christoffer Dall 2017-03-21 11:17 ` Christoffer Dall 2017-03-20 10:58 ` [PATCH 3/9] KVM: arm/arm64: vgic: Get rid of live_lrs Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-21 11:06 ` Marc Zyngier 2017-03-21 11:06 ` Marc Zyngier 2017-03-20 10:58 ` [PATCH 4/9] KVM: arm/arm64: vgic: Get rid of unnecessary process_maintenance operation Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-21 11:36 ` Marc Zyngier 2017-03-21 11:36 ` Marc Zyngier 2017-03-21 12:26 ` [PATCH 4/9] KVM: arm/arm64: vgic: Get rid of unnecessary process_maintenance operationjjjj Christoffer Dall 2017-03-21 12:26 ` Christoffer Dall 2017-03-21 13:26 ` Marc Zyngier 2017-03-21 13:26 ` Marc Zyngier 2017-03-21 14:10 ` Christoffer Dall 2017-03-21 14:10 ` Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall [this message] 2017-03-20 10:58 ` [PATCH 5/9] KVM: arm/arm64: vgic: Get rid of unnecessary save_maint_int_state Christoffer Dall 2017-03-21 11:44 ` Marc Zyngier 2017-03-21 11:44 ` Marc Zyngier 2017-03-20 10:58 ` [PATCH 6/9] KVM: arm/arm64: vgic: Get rid of MISR and EISR fields Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-21 11:45 ` Marc Zyngier 2017-03-21 11:45 ` Marc Zyngier 2017-03-20 10:58 ` [PATCH 7/9] KVM: arm/arm64: vgic: Implement early VGIC init functionality Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-21 12:05 ` Marc Zyngier 2017-03-21 12:05 ` Marc Zyngier 2017-03-21 12:29 ` Christoffer Dall 2017-03-21 12:29 ` Christoffer Dall 2017-03-21 13:30 ` Marc Zyngier 2017-03-21 13:30 ` Marc Zyngier 2017-03-20 10:58 ` [PATCH 8/9] KVM: arm/arm64: vgic: Don't check vgic_initialized in flush_hwstate Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-21 12:08 ` Marc Zyngier 2017-03-21 12:08 ` Marc Zyngier 2017-03-21 12:30 ` Christoffer Dall 2017-03-21 12:30 ` Christoffer Dall 2017-03-20 10:58 ` [PATCH 9/9] KVM: arm/arm64: vgic: Improve sync_hwstate performance Christoffer Dall 2017-03-20 10:58 ` Christoffer Dall 2017-03-21 13:29 ` Marc Zyngier 2017-03-21 13:29 ` Marc Zyngier 2017-03-21 14:13 ` Christoffer Dall 2017-03-21 14:13 ` Christoffer Dall
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