From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Simon Horman <horms@verge.net.au>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org
Cc: Magnus Damm <magnus.damm@gmail.com>,
Russell King <linux@armlinux.org.uk>,
linux-arm-kernel@lists.infradead.org,
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Subject: [PATCH 2/2] ARM: dts: r8a7792: add IMR-L[S]X3 support
Date: Tue, 21 Mar 2017 23:04:45 +0300 [thread overview]
Message-ID: <20170321200448.051326718@cogentembedded.com> (raw)
[-- Attachment #1: ARM-dts-r8a7792-add-IMR-L-S-X3-support.patch --]
[-- Type: text/plain, Size: 2747 bytes --]
Describe the IMR-LX3 and 6 IMR-LSX3 devices in the R8A7792 device tree.
Based on the original patch by Roman Meshkevich
<roman.meshkevich@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi | 63 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi
+++ renesas/arch/arm/boot/dts/r8a7792.dtsi
@@ -734,6 +734,69 @@
status = "disabled";
};
+ imr-lsx3@fe840000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe840000 0 0x2000>;
+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_0>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3@fe850000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe850000 0 0x2000>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_1>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3@fe860000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe860000 0 0x2000>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_2>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3@fe870000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe870000 0 0x2000>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_3>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3@fe880000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe880000 0 0x2000>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_4>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3@fe890000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe890000 0 0x2000>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_5>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lx3@fead0000 {
+ compatible = "renesas,r8a7792-imr-lx3",
+ "renesas,imr-lx3";
+ reg = <0 0xfead0000 0 0x2000>;
+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LX3>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
vsp1@fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
WARNING: multiple messages have this Message-ID (diff)
From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] ARM: dts: r8a7792: add IMR-L[S]X3 support
Date: Tue, 21 Mar 2017 23:04:45 +0300 [thread overview]
Message-ID: <20170321200448.051326718@cogentembedded.com> (raw)
Describe the IMR-LX3 and 6 IMR-LSX3 devices in the R8A7792 device tree.
Based on the original patch by Roman Meshkevich
<roman.meshkevich@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi | 63 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi
+++ renesas/arch/arm/boot/dts/r8a7792.dtsi
@@ -734,6 +734,69 @@
status = "disabled";
};
+ imr-lsx3 at fe840000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe840000 0 0x2000>;
+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_0>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3 at fe850000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe850000 0 0x2000>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_1>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3 at fe860000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe860000 0 0x2000>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_2>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3 at fe870000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe870000 0 0x2000>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_3>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3 at fe880000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe880000 0 0x2000>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_4>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lsx3 at fe890000 {
+ compatible = "renesas,r8a7792-imr-lsx3",
+ "renesas,imr-lsx3";
+ reg = <0 0xfe890000 0 0x2000>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LSX3_5>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ imr-lx3 at fead0000 {
+ compatible = "renesas,r8a7792-imr-lx3",
+ "renesas,imr-lx3";
+ reg = <0 0xfead0000 0 0x2000>;
+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7792_CLK_IMR_LX3>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
vsp1 at fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
next reply other threads:[~2017-03-21 20:04 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-21 20:04 Sergei Shtylyov [this message]
2017-03-21 20:04 ` [PATCH 2/2] ARM: dts: r8a7792: add IMR-L[S]X3 support Sergei Shtylyov
-- strict thread matches above, loose matches on Subject: below --
2017-03-21 19:49 Sergei Shtylyov
1970-01-01 0:00 ` Sergei Shtylyov
2017-03-22 9:38 ` Geert Uytterhoeven
2017-03-22 9:38 ` Geert Uytterhoeven
2017-03-22 9:38 ` Geert Uytterhoeven
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170321200448.051326718@cogentembedded.com \
--to=sergei.shtylyov@cogentembedded.com \
--cc=devicetree@vger.kernel.org \
--cc=horms@verge.net.au \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=magnus.damm@gmail.com \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.