* [PATCH 01/31] ARM: dts: r7s72100: update sdhi clock bindings
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Chris Brandt, Simon Horman
From: Chris Brandt <chris.brandt@renesas.com>
The SDHI controller in the RZ/A1 has 2 clock sources per channel and both
need to be enabled/disabled for proper operation. This fixes the fact that
the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and
that all 4 clock sources need to be defined an used.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100.dtsi | 17 ++++++++++++-----
include/dt-bindings/clock/r7s72100-clock.h | 6 ++++--
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index b8aa256bd515..614ba79a9774 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -162,9 +162,12 @@
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe0444 4>;
- clocks = <&p1_clk>, <&p1_clk>;
- clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>;
- clock-output-names = "sdhi1", "sdhi0";
+ clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
+ clock-indices = <
+ R7S72100_CLK_SDHI00 R7S72100_CLK_SDHI01
+ R7S72100_CLK_SDHI10 R7S72100_CLK_SDHI11
+ >;
+ clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11";
};
};
@@ -488,7 +491,9 @@
GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&mstp12_clks R7S72100_CLK_SDHI0>;
+ clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
+ <&mstp12_clks R7S72100_CLK_SDHI01>;
+ clock-names = "core", "cd";
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
@@ -501,7 +506,9 @@
GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&mstp12_clks R7S72100_CLK_SDHI1>;
+ clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
+ <&mstp12_clks R7S72100_CLK_SDHI11>;
+ clock-names = "core", "cd";
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
index ce09915c298f..cd2ed5194255 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -49,7 +49,9 @@
#define R7S72100_CLK_SPI4 3
/* MSTP12 */
-#define R7S72100_CLK_SDHI0 3
-#define R7S72100_CLK_SDHI1 2
+#define R7S72100_CLK_SDHI00 3
+#define R7S72100_CLK_SDHI01 2
+#define R7S72100_CLK_SDHI10 1
+#define R7S72100_CLK_SDHI11 0
#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 01/31] ARM: dts: r7s72100: update sdhi clock bindings
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Chris Brandt <chris.brandt@renesas.com>
The SDHI controller in the RZ/A1 has 2 clock sources per channel and both
need to be enabled/disabled for proper operation. This fixes the fact that
the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and
that all 4 clock sources need to be defined an used.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100.dtsi | 17 ++++++++++++-----
include/dt-bindings/clock/r7s72100-clock.h | 6 ++++--
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index b8aa256bd515..614ba79a9774 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -162,9 +162,12 @@
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe0444 4>;
- clocks = <&p1_clk>, <&p1_clk>;
- clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>;
- clock-output-names = "sdhi1", "sdhi0";
+ clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
+ clock-indices = <
+ R7S72100_CLK_SDHI00 R7S72100_CLK_SDHI01
+ R7S72100_CLK_SDHI10 R7S72100_CLK_SDHI11
+ >;
+ clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11";
};
};
@@ -488,7 +491,9 @@
GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&mstp12_clks R7S72100_CLK_SDHI0>;
+ clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
+ <&mstp12_clks R7S72100_CLK_SDHI01>;
+ clock-names = "core", "cd";
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
@@ -501,7 +506,9 @@
GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&mstp12_clks R7S72100_CLK_SDHI1>;
+ clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
+ <&mstp12_clks R7S72100_CLK_SDHI11>;
+ clock-names = "core", "cd";
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
index ce09915c298f..cd2ed5194255 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -49,7 +49,9 @@
#define R7S72100_CLK_SPI4 3
/* MSTP12 */
-#define R7S72100_CLK_SDHI0 3
-#define R7S72100_CLK_SDHI1 2
+#define R7S72100_CLK_SDHI00 3
+#define R7S72100_CLK_SDHI01 2
+#define R7S72100_CLK_SDHI10 1
+#define R7S72100_CLK_SDHI11 0
#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 02/31] ARM: dts: r8a7743: Fix SCIFB0 dmas indentation
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: 809c013426914694 ("ARM: dts: r8a7743: add [H]SCIF{A|B} support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7743.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index d8393b97768b..c166be2f18e0 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -277,7 +277,7 @@
clocks = <&cpg CPG_MOD 206>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
status = "disabled";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 02/31] ARM: dts: r8a7743: Fix SCIFB0 dmas indentation
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: 809c013426914694 ("ARM: dts: r8a7743: add [H]SCIF{A|B} support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7743.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index d8393b97768b..c166be2f18e0 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -277,7 +277,7 @@
clocks = <&cpg CPG_MOD 206>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
status = "disabled";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 03/31] ARM: dts: r8a7745: Fix SCIFB0 dmas indentation
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: e0d2da54c4d01ba2 ("ARM: dts: r8a7745: add [H]SCIF{|A|B} support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 1f65ff68a469..25175a74b6b7 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -277,7 +277,7 @@
clocks = <&cpg CPG_MOD 206>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
status = "disabled";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 03/31] ARM: dts: r8a7745: Fix SCIFB0 dmas indentation
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: e0d2da54c4d01ba2 ("ARM: dts: r8a7745: add [H]SCIF{|A|B} support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 1f65ff68a469..25175a74b6b7 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -277,7 +277,7 @@
clocks = <&cpg CPG_MOD 206>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
status = "disabled";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 04/31] ARM: dts: renesas: Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Commit 9b5ba0df4ea4 ("ARM: shmobile: Introduce ARCH_RENESAS") started
the migration from ARCH_SHMOBILE_MULTI to ARCH_RENESAS.
Update the Makefile to build DTBs for Renesas platforms to use the new
symbol, and move the Renesas section to preserve sort order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/Makefile | 38 +++++++++++++++++++-------------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 011808490fed..96bd5ef79ec3 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -673,6 +673,25 @@ dtb-$(CONFIG_ARCH_REALVIEW) += \
arm-realview-eb-a9mp-bbrevd.dtb \
arm-realview-pba8.dtb \
arm-realview-pbx-a9.dtb
+dtb-$(CONFIG_ARCH_RENESAS) += \
+ emev2-kzm9d.dtb \
+ r7s72100-genmai.dtb \
+ r7s72100-rskrza1.dtb \
+ r8a73a4-ape6evm.dtb \
+ r8a7740-armadillo800eva.dtb \
+ r8a7743-sk-rzg1m.dtb \
+ r8a7745-sk-rzg1e.dtb \
+ r8a7778-bockw.dtb \
+ r8a7779-marzen.dtb \
+ r8a7790-lager.dtb \
+ r8a7791-koelsch.dtb \
+ r8a7791-porter.dtb \
+ r8a7792-blanche.dtb \
+ r8a7792-wheat.dtb \
+ r8a7793-gose.dtb \
+ r8a7794-alt.dtb \
+ r8a7794-silk.dtb \
+ sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk1108-evb.dtb \
rk3036-evb.dtb \
@@ -713,25 +732,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
s5pv210-smdkc110.dtb \
s5pv210-smdkv210.dtb \
s5pv210-torbreck.dtb
-dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
- emev2-kzm9d.dtb \
- r7s72100-genmai.dtb \
- r7s72100-rskrza1.dtb \
- r8a73a4-ape6evm.dtb \
- r8a7740-armadillo800eva.dtb \
- r8a7743-sk-rzg1m.dtb \
- r8a7745-sk-rzg1e.dtb \
- r8a7778-bockw.dtb \
- r8a7779-marzen.dtb \
- r8a7790-lager.dtb \
- r8a7791-koelsch.dtb \
- r8a7791-porter.dtb \
- r8a7792-blanche.dtb \
- r8a7792-wheat.dtb \
- r8a7793-gose.dtb \
- r8a7794-alt.dtb \
- r8a7794-silk.dtb \
- sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_arria10_socdk_nand.dtb \
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 04/31] ARM: dts: renesas: Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Commit 9b5ba0df4ea4 ("ARM: shmobile: Introduce ARCH_RENESAS") started
the migration from ARCH_SHMOBILE_MULTI to ARCH_RENESAS.
Update the Makefile to build DTBs for Renesas platforms to use the new
symbol, and move the Renesas section to preserve sort order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/Makefile | 38 +++++++++++++++++++-------------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 011808490fed..96bd5ef79ec3 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -673,6 +673,25 @@ dtb-$(CONFIG_ARCH_REALVIEW) += \
arm-realview-eb-a9mp-bbrevd.dtb \
arm-realview-pba8.dtb \
arm-realview-pbx-a9.dtb
+dtb-$(CONFIG_ARCH_RENESAS) += \
+ emev2-kzm9d.dtb \
+ r7s72100-genmai.dtb \
+ r7s72100-rskrza1.dtb \
+ r8a73a4-ape6evm.dtb \
+ r8a7740-armadillo800eva.dtb \
+ r8a7743-sk-rzg1m.dtb \
+ r8a7745-sk-rzg1e.dtb \
+ r8a7778-bockw.dtb \
+ r8a7779-marzen.dtb \
+ r8a7790-lager.dtb \
+ r8a7791-koelsch.dtb \
+ r8a7791-porter.dtb \
+ r8a7792-blanche.dtb \
+ r8a7792-wheat.dtb \
+ r8a7793-gose.dtb \
+ r8a7794-alt.dtb \
+ r8a7794-silk.dtb \
+ sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk1108-evb.dtb \
rk3036-evb.dtb \
@@ -713,25 +732,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
s5pv210-smdkc110.dtb \
s5pv210-smdkv210.dtb \
s5pv210-torbreck.dtb
-dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
- emev2-kzm9d.dtb \
- r7s72100-genmai.dtb \
- r7s72100-rskrza1.dtb \
- r8a73a4-ape6evm.dtb \
- r8a7740-armadillo800eva.dtb \
- r8a7743-sk-rzg1m.dtb \
- r8a7745-sk-rzg1e.dtb \
- r8a7778-bockw.dtb \
- r8a7779-marzen.dtb \
- r8a7790-lager.dtb \
- r8a7791-koelsch.dtb \
- r8a7791-porter.dtb \
- r8a7792-blanche.dtb \
- r8a7792-wheat.dtb \
- r8a7793-gose.dtb \
- r8a7794-alt.dtb \
- r8a7794-silk.dtb \
- sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_arria10_socdk_nand.dtb \
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 05/31] ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated caches
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.
Fixes: b0da45c60d2f7b08 ("ARM: dts: r8a73a4: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a73a4.dtsi | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 00eb9a7114dc..6fb7eaba9126 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -32,18 +32,16 @@
next-level-cache = <&L2_CA15>;
};
- L2_CA15: cache-controller@0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
clocks = <&cpg_clocks R8A73A4_CLK_Z>;
power-domains = <&pd_a3sm>;
cache-unified;
cache-level = <2>;
};
- L2_CA7: cache-controller@100 {
+ L2_CA7: cache-controller-1 {
compatible = "cache";
- reg = <0x100>;
clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
power-domains = <&pd_a3km>;
cache-unified;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 05/31] ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated caches
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.
Fixes: b0da45c60d2f7b08 ("ARM: dts: r8a73a4: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a73a4.dtsi | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 00eb9a7114dc..6fb7eaba9126 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -32,18 +32,16 @@
next-level-cache = <&L2_CA15>;
};
- L2_CA15: cache-controller at 0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
clocks = <&cpg_clocks R8A73A4_CLK_Z>;
power-domains = <&pd_a3sm>;
cache-unified;
cache-level = <2>;
};
- L2_CA7: cache-controller at 100 {
+ L2_CA7: cache-controller-1 {
compatible = "cache";
- reg = <0x100>;
clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
power-domains = <&pd_a3km>;
cache-unified;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 06/31] ARM: dts: r8a7743: Remove unit-address and reg from integrated cache
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 34e8d993a68ae459 ("ARM: dts: r8a7743: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7743.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index c166be2f18e0..cd908796fb3b 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -32,9 +32,8 @@
next-level-cache = <&L2_CA15>;
};
- L2_CA15: cache-controller@0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
cache-unified;
cache-level = <2>;
power-domains = <&sysc R8A7743_PD_CA15_SCU>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 06/31] ARM: dts: r8a7743: Remove unit-address and reg from integrated cache
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 34e8d993a68ae459 ("ARM: dts: r8a7743: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7743.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index c166be2f18e0..cd908796fb3b 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -32,9 +32,8 @@
next-level-cache = <&L2_CA15>;
};
- L2_CA15: cache-controller at 0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
cache-unified;
cache-level = <2>;
power-domains = <&sysc R8A7743_PD_CA15_SCU>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 07/31] ARM: dts: r8a7745: Remove unit-address and reg from integrated cache
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.
Fixes: c95360247bdd67d3 ("ARM: dts: r8a7745: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 25175a74b6b7..bca88715fada 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -32,9 +32,8 @@
next-level-cache = <&L2_CA7>;
};
- L2_CA7: cache-controller@0 {
+ L2_CA7: cache-controller-0 {
compatible = "cache";
- reg = <0>;
cache-unified;
cache-level = <2>;
power-domains = <&sysc R8A7745_PD_CA7_SCU>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 07/31] ARM: dts: r8a7745: Remove unit-address and reg from integrated cache
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.
Fixes: c95360247bdd67d3 ("ARM: dts: r8a7745: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7745.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 25175a74b6b7..bca88715fada 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -32,9 +32,8 @@
next-level-cache = <&L2_CA7>;
};
- L2_CA7: cache-controller at 0 {
+ L2_CA7: cache-controller-0 {
compatible = "cache";
- reg = <0>;
cache-unified;
cache-level = <2>;
power-domains = <&sysc R8A7745_PD_CA7_SCU>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 08/31] ARM: dts: r8a7790: Remove unit-addresses and regs from integrated caches
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.
Fixes: 2c3de36700d4f3a5 ("ARM: dts: r8a7790: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 6d10450de6d7..20cf191e0852 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -129,17 +129,15 @@
next-level-cache = <&L2_CA7>;
};
- L2_CA15: cache-controller@0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc R8A7790_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
- L2_CA7: cache-controller@100 {
+ L2_CA7: cache-controller-1 {
compatible = "cache";
- reg = <0x100>;
power-domains = <&sysc R8A7790_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 08/31] ARM: dts: r8a7790: Remove unit-addresses and regs from integrated caches
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.
Fixes: 2c3de36700d4f3a5 ("ARM: dts: r8a7790: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 6d10450de6d7..20cf191e0852 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -129,17 +129,15 @@
next-level-cache = <&L2_CA7>;
};
- L2_CA15: cache-controller at 0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc R8A7790_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
- L2_CA7: cache-controller at 100 {
+ L2_CA7: cache-controller-1 {
compatible = "cache";
- reg = <0x100>;
power-domains = <&sysc R8A7790_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 09/31] ARM: dts: r8a7791: Remove unit-address and reg from integrated cache
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 6f9314ce258c8504 ("ARM: dts: r8a7791: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 9f9e48511836..7cad65a28f25 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -74,9 +74,8 @@
next-level-cache = <&L2_CA15>;
};
- L2_CA15: cache-controller@0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc R8A7791_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 09/31] ARM: dts: r8a7791: Remove unit-address and reg from integrated cache
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 6f9314ce258c8504 ("ARM: dts: r8a7791: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 9f9e48511836..7cad65a28f25 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -74,9 +74,8 @@
next-level-cache = <&L2_CA15>;
};
- L2_CA15: cache-controller at 0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc R8A7791_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 10/31] ARM: dts: r8a7792: Remove unit-address and reg from integrated cache
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7792.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 8ecfda7a004e..c762f44f7732 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -60,9 +60,8 @@
next-level-cache = <&L2_CA15>;
};
- L2_CA15: cache-controller@0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
cache-unified;
cache-level = <2>;
power-domains = <&sysc R8A7792_PD_CA15_SCU>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 10/31] ARM: dts: r8a7792: Remove unit-address and reg from integrated cache
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7792.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 8ecfda7a004e..c762f44f7732 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -60,9 +60,8 @@
next-level-cache = <&L2_CA15>;
};
- L2_CA15: cache-controller at 0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
cache-unified;
cache-level = <2>;
power-domains = <&sysc R8A7792_PD_CA15_SCU>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 11/31] ARM: dts: r8a7793: Remove unit-address and reg from integrated cache
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: ad53f5f00b095a0d ("ARM: dts: r8a7793: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 48ce21c5e8db..38506f563b2b 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -65,9 +65,8 @@
power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
};
- L2_CA15: cache-controller@0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc R8A7793_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 11/31] ARM: dts: r8a7793: Remove unit-address and reg from integrated cache
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: ad53f5f00b095a0d ("ARM: dts: r8a7793: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 48ce21c5e8db..38506f563b2b 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -65,9 +65,8 @@
power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
};
- L2_CA15: cache-controller at 0 {
+ L2_CA15: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc R8A7793_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 12/31] ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.
Fixes: 34ea4b4a827b4ee7 ("ARM: dts: r8a7794: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 319c1069b7ee..cb31cd2232f9 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -56,9 +56,8 @@
next-level-cache = <&L2_CA7>;
};
- L2_CA7: cache-controller@0 {
+ L2_CA7: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc R8A7794_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 12/31] ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.
Fixes: 34ea4b4a827b4ee7 ("ARM: dts: r8a7794: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 319c1069b7ee..cb31cd2232f9 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -56,9 +56,8 @@
next-level-cache = <&L2_CA7>;
};
- L2_CA7: cache-controller at 0 {
+ L2_CA7: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc R8A7794_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 13/31] ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Kuninori Morimoto, Simon Horman
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 20cf191e0852..495c583054a8 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1738,11 +1738,11 @@
rcar_sound,dvc {
dvc0: dvc-0 {
- dmas = <&audma0 0xbc>;
+ dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
- dmas = <&audma0 0xbe>;
+ dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 13/31] ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 20cf191e0852..495c583054a8 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1738,11 +1738,11 @@
rcar_sound,dvc {
dvc0: dvc-0 {
- dmas = <&audma0 0xbc>;
+ dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
- dmas = <&audma0 0xbe>;
+ dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 14/31] ARM: dts: r7s72100: Add watchdog timer
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Chris Brandt, Simon Horman
From: Chris Brandt <chris.brandt@renesas.com>
Add watchdog timer support for RZ/A1.
For the RZ/A1, the only way to do a reset is to overflow the WDT, so this
is useful even if you don't need the watchdog functionality.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 614ba79a9774..9b12d73e67dc 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -371,6 +371,13 @@
<0xe8202000 0x1000>;
};
+ wdt: watchdog@fcfe0000 {
+ compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
+ reg = <0xfcfe0000 0x6>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&p0_clk>;
+ };
+
i2c0: i2c@fcfee000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 14/31] ARM: dts: r7s72100: Add watchdog timer
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Chris Brandt <chris.brandt@renesas.com>
Add watchdog timer support for RZ/A1.
For the RZ/A1, the only way to do a reset is to overflow the WDT, so this
is useful even if you don't need the watchdog functionality.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 614ba79a9774..9b12d73e67dc 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -371,6 +371,13 @@
<0xe8202000 0x1000>;
};
+ wdt: watchdog at fcfe0000 {
+ compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
+ reg = <0xfcfe0000 0x6>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&p0_clk>;
+ };
+
i2c0: i2c at fcfee000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 15/31] ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
so it can be power managed using that clock in the future.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a73a4.dtsi | 13 +++++++++----
include/dt-bindings/clock/r8a73a4-clock.h | 1 +
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 6fb7eaba9126..1f5c9f6dddba 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -467,6 +467,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A73A4_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&pd_c4>;
};
bsc: bus@fec10000 {
@@ -725,16 +728,18 @@
mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&main_div2_clk>, <&main_div2_clk>,
+ clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>,
+ <&main_div2_clk>,
<&cpg_clocks R8A73A4_CLK_HP>,
<&cpg_clocks R8A73A4_CLK_HP>;
#clock-cells = <1>;
clock-indices = <
- R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5
- R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3
+ R8A73A4_CLK_IRQC R8A73A4_CLK_INTC_SYS
+ R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4
+ R8A73A4_CLK_IIC3
>;
clock-output-names =
- "irqc", "iic5", "iic4", "iic3";
+ "irqc", "intc-sys", "iic5", "iic4", "iic3";
};
mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a73a4-clock.h b/include/dt-bindings/clock/r8a73a4-clock.h
index dd11ecdf837e..4b3668157257 100644
--- a/include/dt-bindings/clock/r8a73a4-clock.h
+++ b/include/dt-bindings/clock/r8a73a4-clock.h
@@ -54,6 +54,7 @@
#define R8A73A4_CLK_IIC3 11
#define R8A73A4_CLK_IIC4 10
#define R8A73A4_CLK_IIC5 9
+#define R8A73A4_CLK_INTC_SYS 8
#define R8A73A4_CLK_IRQC 7
/* MSTP5 */
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 15/31] ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
so it can be power managed using that clock in the future.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a73a4.dtsi | 13 +++++++++----
include/dt-bindings/clock/r8a73a4-clock.h | 1 +
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 6fb7eaba9126..1f5c9f6dddba 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -467,6 +467,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A73A4_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&pd_c4>;
};
bsc: bus at fec10000 {
@@ -725,16 +728,18 @@
mstp4_clks: mstp4_clks at e6150140 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&main_div2_clk>, <&main_div2_clk>,
+ clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>,
+ <&main_div2_clk>,
<&cpg_clocks R8A73A4_CLK_HP>,
<&cpg_clocks R8A73A4_CLK_HP>;
#clock-cells = <1>;
clock-indices = <
- R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5
- R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3
+ R8A73A4_CLK_IRQC R8A73A4_CLK_INTC_SYS
+ R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4
+ R8A73A4_CLK_IIC3
>;
clock-output-names =
- "irqc", "iic5", "iic4", "iic3";
+ "irqc", "intc-sys", "iic5", "iic4", "iic3";
};
mstp5_clks: mstp5_clks at e6150144 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a73a4-clock.h b/include/dt-bindings/clock/r8a73a4-clock.h
index dd11ecdf837e..4b3668157257 100644
--- a/include/dt-bindings/clock/r8a73a4-clock.h
+++ b/include/dt-bindings/clock/r8a73a4-clock.h
@@ -54,6 +54,7 @@
#define R8A73A4_CLK_IIC3 11
#define R8A73A4_CLK_IIC4 10
#define R8A73A4_CLK_IIC5 9
+#define R8A73A4_CLK_INTC_SYS 8
#define R8A73A4_CLK_IRQC 7
/* MSTP5 */
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 16/31] ARM: dts: r8a7790: Add INTC-SYS clock to device tree
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 9 ++++++---
include/dt-bindings/clock/r8a7790-clock.h | 1 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 495c583054a8..534525665bb3 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -185,6 +185,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
gpio0: gpio@e6050000 {
@@ -1364,10 +1367,10 @@
mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7790_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>;
+ clock-output-names = "irqc", "intc-sys";
};
mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index fa5e8da809f2..20641fa68e73 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -82,6 +82,7 @@
/* MSTP4 */
#define R8A7790_CLK_IRQC 7
+#define R8A7790_CLK_INTC_SYS 8
/* MSTP5 */
#define R8A7790_CLK_AUDIO_DMAC1 1
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 16/31] ARM: dts: r8a7790: Add INTC-SYS clock to device tree
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 9 ++++++---
include/dt-bindings/clock/r8a7790-clock.h | 1 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 495c583054a8..534525665bb3 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -185,6 +185,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
gpio0: gpio at e6050000 {
@@ -1364,10 +1367,10 @@
mstp4_clks: mstp4_clks at e6150140 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7790_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>;
+ clock-output-names = "irqc", "intc-sys";
};
mstp5_clks: mstp5_clks at e6150144 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index fa5e8da809f2..20641fa68e73 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -82,6 +82,7 @@
/* MSTP4 */
#define R8A7790_CLK_IRQC 7
+#define R8A7790_CLK_INTC_SYS 8
/* MSTP5 */
#define R8A7790_CLK_AUDIO_DMAC1 1
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 17/31] ARM: dts: r8a7791: Add INTC-SYS clock to device tree
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 9 ++++++---
include/dt-bindings/clock/r8a7791-clock.h | 1 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 7cad65a28f25..525377df16ee 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -117,6 +117,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7791_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio0: gpio@e6050000 {
@@ -1365,10 +1368,10 @@
mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7791_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <R8A7791_CLK_IRQC R8A7791_CLK_INTC_SYS>;
+ clock-output-names = "irqc", "intc-sys";
};
mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index ffa11379b3f0..adc50dc31ab3 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -72,6 +72,7 @@
/* MSTP4 */
#define R8A7791_CLK_IRQC 7
+#define R8A7791_CLK_INTC_SYS 8
/* MSTP5 */
#define R8A7791_CLK_AUDIO_DMAC1 1
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 17/31] ARM: dts: r8a7791: Add INTC-SYS clock to device tree
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 9 ++++++---
include/dt-bindings/clock/r8a7791-clock.h | 1 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 7cad65a28f25..525377df16ee 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -117,6 +117,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7791_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio0: gpio at e6050000 {
@@ -1365,10 +1368,10 @@
mstp4_clks: mstp4_clks at e6150140 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7791_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <R8A7791_CLK_IRQC R8A7791_CLK_INTC_SYS>;
+ clock-output-names = "irqc", "intc-sys";
};
mstp5_clks: mstp5_clks at e6150144 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index ffa11379b3f0..adc50dc31ab3 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -72,6 +72,7 @@
/* MSTP4 */
#define R8A7791_CLK_IRQC 7
+#define R8A7791_CLK_INTC_SYS 8
/* MSTP5 */
#define R8A7791_CLK_AUDIO_DMAC1 1
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 18/31] ARM: dts: r8a7792: Add INTC-SYS clock to device tree
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7792.dtsi | 11 ++++++++---
include/dt-bindings/clock/r8a7792-clock.h | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index c762f44f7732..6c0797ebc08f 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -92,6 +92,9 @@
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7792_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
};
irqc: interrupt-controller@e61c0000 {
@@ -895,10 +898,12 @@
compatible = "renesas,r8a7792-mstp-clocks",
"renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7792_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <
+ R8A7792_CLK_IRQC R8A7792_CLK_INTC_SYS
+ >;
+ clock-output-names = "irqc", "intc-sys";
};
mstp7_clks: mstp7_clks@e615014c {
compatible = "renesas,r8a7792-mstp-clocks",
diff --git a/include/dt-bindings/clock/r8a7792-clock.h b/include/dt-bindings/clock/r8a7792-clock.h
index 9a8b392ceb00..94dd16a1e6e6 100644
--- a/include/dt-bindings/clock/r8a7792-clock.h
+++ b/include/dt-bindings/clock/r8a7792-clock.h
@@ -45,6 +45,7 @@
/* MSTP4 */
#define R8A7792_CLK_IRQC 7
+#define R8A7792_CLK_INTC_SYS 8
/* MSTP5 */
#define R8A7792_CLK_AUDIO_DMAC0 2
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 18/31] ARM: dts: r8a7792: Add INTC-SYS clock to device tree
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7792.dtsi | 11 ++++++++---
include/dt-bindings/clock/r8a7792-clock.h | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index c762f44f7732..6c0797ebc08f 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -92,6 +92,9 @@
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7792_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
};
irqc: interrupt-controller at e61c0000 {
@@ -895,10 +898,12 @@
compatible = "renesas,r8a7792-mstp-clocks",
"renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7792_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <
+ R8A7792_CLK_IRQC R8A7792_CLK_INTC_SYS
+ >;
+ clock-output-names = "irqc", "intc-sys";
};
mstp7_clks: mstp7_clks at e615014c {
compatible = "renesas,r8a7792-mstp-clocks",
diff --git a/include/dt-bindings/clock/r8a7792-clock.h b/include/dt-bindings/clock/r8a7792-clock.h
index 9a8b392ceb00..94dd16a1e6e6 100644
--- a/include/dt-bindings/clock/r8a7792-clock.h
+++ b/include/dt-bindings/clock/r8a7792-clock.h
@@ -45,6 +45,7 @@
/* MSTP4 */
#define R8A7792_CLK_IRQC 7
+#define R8A7792_CLK_INTC_SYS 8
/* MSTP5 */
#define R8A7792_CLK_AUDIO_DMAC0 2
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 19/31] ARM: dts: r8a7794: Add INTC-SYS clock to device tree
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794.dtsi | 9 ++++++---
include/dt-bindings/clock/r8a7794-clock.h | 1 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index cb31cd2232f9..38bf9ed8e739 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -74,6 +74,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7794_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
gpio0: gpio@e6050000 {
@@ -1247,10 +1250,10 @@
mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7794_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <R8A7794_CLK_IRQC R8A7794_CLK_INTC_SYS>;
+ clock-output-names = "irqc", "intc-sys";
};
mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h
index 88e64846cf37..a26776f7dedd 100644
--- a/include/dt-bindings/clock/r8a7794-clock.h
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -64,6 +64,7 @@
/* MSTP4 */
#define R8A7794_CLK_IRQC 7
+#define R8A7794_CLK_INTC_SYS 8
/* MSTP5 */
#define R8A7794_CLK_AUDIO_DMAC0 2
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 19/31] ARM: dts: r8a7794: Add INTC-SYS clock to device tree
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794.dtsi | 9 ++++++---
include/dt-bindings/clock/r8a7794-clock.h | 1 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index cb31cd2232f9..38bf9ed8e739 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -74,6 +74,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7794_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
gpio0: gpio at e6050000 {
@@ -1247,10 +1250,10 @@
mstp4_clks: mstp4_clks at e6150140 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7794_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <R8A7794_CLK_IRQC R8A7794_CLK_INTC_SYS>;
+ clock-output-names = "irqc", "intc-sys";
};
mstp5_clks: mstp5_clks at e6150144 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h
index 88e64846cf37..a26776f7dedd 100644
--- a/include/dt-bindings/clock/r8a7794-clock.h
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -64,6 +64,7 @@
/* MSTP4 */
#define R8A7794_CLK_IRQC 7
+#define R8A7794_CLK_INTC_SYS 8
/* MSTP5 */
#define R8A7794_CLK_AUDIO_DMAC0 2
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 20/31] ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:57 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Kuninori Morimoto, Simon Horman
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on audio data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 525377df16ee..b319ef4d57b0 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1779,11 +1779,11 @@
rcar_sound,dvc {
dvc0: dvc-0 {
- dmas = <&audma0 0xbc>;
+ dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
- dmas = <&audma0 0xbe>;
+ dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 20/31] ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
@ 2017-03-20 8:57 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on audio data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 525377df16ee..b319ef4d57b0 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1779,11 +1779,11 @@
rcar_sound,dvc {
dvc0: dvc-0 {
- dmas = <&audma0 0xbc>;
+ dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
- dmas = <&audma0 0xbe>;
+ dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 21/31] ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Kuninori Morimoto, Simon Horman
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on audio data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 38506f563b2b..53c89b47eaf0 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -1425,11 +1425,11 @@
rcar_sound,dvc {
dvc0: dvc-0 {
- dmas = <&audma0 0xbc>;
+ dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
- dmas = <&audma0 0xbe>;
+ dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 21/31] ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on audio data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 38506f563b2b..53c89b47eaf0 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -1425,11 +1425,11 @@
rcar_sound,dvc {
dvc0: dvc-0 {
- dmas = <&audma0 0xbc>;
+ dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
- dmas = <&audma0 0xbe>;
+ dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 22/31] ARM: dts: r8a7793: Add INTC-SYS clock to device tree
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793.dtsi | 11 ++++++++---
include/dt-bindings/clock/r8a7793-clock.h | 5 +++--
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 53c89b47eaf0..9fcf3a9ca084 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -108,6 +108,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7793_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio0: gpio@e6050000 {
@@ -1178,10 +1181,12 @@
mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7793_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <
+ R8A7793_CLK_IRQC R8A7793_CLK_INTC_SYS
+ >;
+ clock-output-names = "irqc", "intc-sys";
};
mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7793-clock.h b/include/dt-bindings/clock/r8a7793-clock.h
index efcbc594fe82..7318d45d4e7e 100644
--- a/include/dt-bindings/clock/r8a7793-clock.h
+++ b/include/dt-bindings/clock/r8a7793-clock.h
@@ -77,10 +77,11 @@
/* MSTP4 */
#define R8A7793_CLK_IRQC 7
+#define R8A7793_CLK_INTC_SYS 8
/* MSTP5 */
-#define R8A7793_CLK_AUDIO_DMAC1 1
-#define R8A7793_CLK_AUDIO_DMAC0 2
+#define R8A7793_CLK_AUDIO_DMAC1 1
+#define R8A7793_CLK_AUDIO_DMAC0 2
#define R8A7793_CLK_ADSP_MOD 6
#define R8A7793_CLK_THERMAL 22
#define R8A7793_CLK_PWM 23
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 22/31] ARM: dts: r8a7793: Add INTC-SYS clock to device tree
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793.dtsi | 11 ++++++++---
include/dt-bindings/clock/r8a7793-clock.h | 5 +++--
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 53c89b47eaf0..9fcf3a9ca084 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -108,6 +108,9 @@
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&mstp4_clks R8A7793_CLK_INTC_SYS>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio0: gpio at e6050000 {
@@ -1178,10 +1181,12 @@
mstp4_clks: mstp4_clks at e6150140 {
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
- clocks = <&cp_clk>;
+ clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = <R8A7793_CLK_IRQC>;
- clock-output-names = "irqc";
+ clock-indices = <
+ R8A7793_CLK_IRQC R8A7793_CLK_INTC_SYS
+ >;
+ clock-output-names = "irqc", "intc-sys";
};
mstp5_clks: mstp5_clks at e6150144 {
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7793-clock.h b/include/dt-bindings/clock/r8a7793-clock.h
index efcbc594fe82..7318d45d4e7e 100644
--- a/include/dt-bindings/clock/r8a7793-clock.h
+++ b/include/dt-bindings/clock/r8a7793-clock.h
@@ -77,10 +77,11 @@
/* MSTP4 */
#define R8A7793_CLK_IRQC 7
+#define R8A7793_CLK_INTC_SYS 8
/* MSTP5 */
-#define R8A7793_CLK_AUDIO_DMAC1 1
-#define R8A7793_CLK_AUDIO_DMAC0 2
+#define R8A7793_CLK_AUDIO_DMAC1 1
+#define R8A7793_CLK_AUDIO_DMAC0 2
#define R8A7793_CLK_ADSP_MOD 6
#define R8A7793_CLK_THERMAL 22
#define R8A7793_CLK_PWM 23
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 23/31] ARM: dts: porter: Always use status "okay" to enable devices
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
While status "ok" does work, the canonical form is "okay", so update the
few places that used the former.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-porter.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index 6761d11d3f9e..d9aa2cd6d625 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -226,7 +226,7 @@
phy-handle = <&phy1>;
renesas,ether-link-active-low;
- status = "ok";
+ status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
@@ -359,7 +359,7 @@
/* composite video input */
&vin0 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&vin0_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 23/31] ARM: dts: porter: Always use status "okay" to enable devices
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
While status "ok" does work, the canonical form is "okay", so update the
few places that used the former.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-porter.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index 6761d11d3f9e..d9aa2cd6d625 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -226,7 +226,7 @@
phy-handle = <&phy1>;
renesas,ether-link-active-low;
- status = "ok";
+ status = "okay";
phy1: ethernet-phy at 1 {
reg = <1>;
@@ -359,7 +359,7 @@
/* composite video input */
&vin0 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&vin0_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 24/31] ARM: dts: bockw: Drop superfluous status update for frequency override
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7778.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7778-bockw.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts
index 211d239d9041..c79d55eb43c5 100644
--- a/arch/arm/boot/dts/r8a7778-bockw.dts
+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
@@ -229,5 +229,4 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 24/31] ARM: dts: bockw: Drop superfluous status update for frequency override
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7778.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7778-bockw.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts
index 211d239d9041..c79d55eb43c5 100644
--- a/arch/arm/boot/dts/r8a7778-bockw.dts
+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
@@ -229,5 +229,4 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 25/31] ARM: dts: marzen: Drop superfluous status update for frequency override
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7779.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7779-marzen.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
index 89c5b24a3d03..9412a86f9b30 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -236,7 +236,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&sdhi0 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 25/31] ARM: dts: marzen: Drop superfluous status update for frequency override
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7779.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7779-marzen.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
index 89c5b24a3d03..9412a86f9b30 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -236,7 +236,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&sdhi0 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 26/31] ARM: dts: lager: Drop superfluous status update for frequency override
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7790.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790-lager.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index bd512c86e852..ba100a6f67ca 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -581,7 +581,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&msiof1 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 26/31] ARM: dts: lager: Drop superfluous status update for frequency override
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7790.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790-lager.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index bd512c86e852..ba100a6f67ca 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -581,7 +581,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&msiof1 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 27/31] ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk and pcie_bus_clk device nodes are already enabled in
r8a7791.dtsi, so there is no need to update their statuses again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 5405d337d744..59beb8402a36 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -516,7 +516,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&sdhi0 {
@@ -767,7 +766,6 @@
&pcie_bus_clk {
clock-frequency = <100000000>;
- status = "okay";
};
&pciec {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 27/31] ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk and pcie_bus_clk device nodes are already enabled in
r8a7791.dtsi, so there is no need to update their statuses again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 5405d337d744..59beb8402a36 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -516,7 +516,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&sdhi0 {
@@ -767,7 +766,6 @@
&pcie_bus_clk {
clock-frequency = <100000000>;
- status = "okay";
};
&pciec {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 28/31] ARM: dts: porter: Drop superfluous status update for frequency override
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The pcie_bus_clk device node is already enabled in r8a7791.dtsi, so
there is no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-porter.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index d9aa2cd6d625..95da5cb9d37a 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -401,7 +401,6 @@
&pcie_bus_clk {
clock-frequency = <100000000>;
- status = "okay";
};
&pciec {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 28/31] ARM: dts: porter: Drop superfluous status update for frequency override
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The pcie_bus_clk device node is already enabled in r8a7791.dtsi, so
there is no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-porter.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index d9aa2cd6d625..95da5cb9d37a 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -401,7 +401,6 @@
&pcie_bus_clk {
clock-frequency = <100000000>;
- status = "okay";
};
&pciec {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [GIT PULL] Renesas ARM Based SoC DT Updates for v4.12
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: arm
Cc: linux-renesas-soc, Olof Johansson, Kevin Hilman, Arnd Bergmann,
linux-arm-kernel, Magnus Damm, Simon Horman
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC DT updates for v4.12.
* Conflicts
"Add watchdog timer to r7s72100 SoC", which is part of this patch-set,
has a minor conflict with "ARM: 8661/1: dts: r7s72100: add l2 cache",
which I believe Russell King has in his tree.
The resolution is to take both.
The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.12
for you to fetch changes up to d01ff18992218f3a13f45f45a886b3bf8f250f14:
ARM: dts: silk: Drop superfluous status update for frequency override (2017-03-13 10:19:35 +0100)
----------------------------------------------------------------
Renesas ARM Based SoC DT Updates for v4.12
Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs
Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC
----------------------------------------------------------------
Chris Brandt (2):
ARM: dts: r7s72100: update sdhi clock bindings
ARM: dts: r7s72100: Add watchdog timer
Geert Uytterhoeven (26):
ARM: dts: r8a7743: Fix SCIFB0 dmas indentation
ARM: dts: r8a7745: Fix SCIFB0 dmas indentation
ARM: dts: renesas: Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated caches
ARM: dts: r8a7743: Remove unit-address and reg from integrated cache
ARM: dts: r8a7745: Remove unit-address and reg from integrated cache
ARM: dts: r8a7790: Remove unit-addresses and regs from integrated caches
ARM: dts: r8a7791: Remove unit-address and reg from integrated cache
ARM: dts: r8a7792: Remove unit-address and reg from integrated cache
ARM: dts: r8a7793: Remove unit-address and reg from integrated cache
ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
ARM: dts: r8a7790: Add INTC-SYS clock to device tree
ARM: dts: r8a7791: Add INTC-SYS clock to device tree
ARM: dts: r8a7792: Add INTC-SYS clock to device tree
ARM: dts: r8a7794: Add INTC-SYS clock to device tree
ARM: dts: r8a7793: Add INTC-SYS clock to device tree
ARM: dts: porter: Always use status "okay" to enable devices
ARM: dts: bockw: Drop superfluous status update for frequency override
ARM: dts: marzen: Drop superfluous status update for frequency override
ARM: dts: lager: Drop superfluous status update for frequency override
ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
ARM: dts: porter: Drop superfluous status update for frequency override
ARM: dts: gose: Drop superfluous status update for frequency override
ARM: dts: alt: Drop superfluous status update for frequency override
ARM: dts: silk: Drop superfluous status update for frequency override
Kuninori Morimoto (3):
ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
arch/arm/boot/dts/Makefile | 38 +++++++++++++++---------------
arch/arm/boot/dts/r7s72100.dtsi | 24 +++++++++++++++----
arch/arm/boot/dts/r8a73a4.dtsi | 19 ++++++++-------
arch/arm/boot/dts/r8a7743.dtsi | 5 ++--
arch/arm/boot/dts/r8a7745.dtsi | 5 ++--
arch/arm/boot/dts/r8a7778-bockw.dts | 1 -
arch/arm/boot/dts/r8a7779-marzen.dts | 1 -
arch/arm/boot/dts/r8a7790-lager.dts | 1 -
arch/arm/boot/dts/r8a7790.dtsi | 19 ++++++++-------
arch/arm/boot/dts/r8a7791-koelsch.dts | 2 --
arch/arm/boot/dts/r8a7791-porter.dts | 5 ++--
arch/arm/boot/dts/r8a7791.dtsi | 16 +++++++------
arch/arm/boot/dts/r8a7792.dtsi | 14 +++++++----
arch/arm/boot/dts/r8a7793-gose.dts | 1 -
arch/arm/boot/dts/r8a7793.dtsi | 18 ++++++++------
arch/arm/boot/dts/r8a7794-alt.dts | 1 -
arch/arm/boot/dts/r8a7794-silk.dts | 1 -
arch/arm/boot/dts/r8a7794.dtsi | 12 ++++++----
include/dt-bindings/clock/r7s72100-clock.h | 6 +++--
include/dt-bindings/clock/r8a73a4-clock.h | 1 +
include/dt-bindings/clock/r8a7790-clock.h | 1 +
include/dt-bindings/clock/r8a7791-clock.h | 1 +
include/dt-bindings/clock/r8a7792-clock.h | 1 +
include/dt-bindings/clock/r8a7793-clock.h | 5 ++--
include/dt-bindings/clock/r8a7794-clock.h | 1 +
25 files changed, 113 insertions(+), 86 deletions(-)
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH 29/31] ARM: dts: gose: Drop superfluous status update for frequency override
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7793.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793-gose.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 92fff07c5e2b..806c93f6ae8b 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -412,7 +412,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&sdhi0 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [GIT PULL] Renesas ARM Based SoC DT Updates for v4.12
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC DT updates for v4.12.
* Conflicts
"Add watchdog timer to r7s72100 SoC", which is part of this patch-set,
has a minor conflict with "ARM: 8661/1: dts: r7s72100: add l2 cache",
which I believe Russell King has in his tree.
The resolution is to take both.
The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.12
for you to fetch changes up to d01ff18992218f3a13f45f45a886b3bf8f250f14:
ARM: dts: silk: Drop superfluous status update for frequency override (2017-03-13 10:19:35 +0100)
----------------------------------------------------------------
Renesas ARM Based SoC DT Updates for v4.12
Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs
Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC
----------------------------------------------------------------
Chris Brandt (2):
ARM: dts: r7s72100: update sdhi clock bindings
ARM: dts: r7s72100: Add watchdog timer
Geert Uytterhoeven (26):
ARM: dts: r8a7743: Fix SCIFB0 dmas indentation
ARM: dts: r8a7745: Fix SCIFB0 dmas indentation
ARM: dts: renesas: Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated caches
ARM: dts: r8a7743: Remove unit-address and reg from integrated cache
ARM: dts: r8a7745: Remove unit-address and reg from integrated cache
ARM: dts: r8a7790: Remove unit-addresses and regs from integrated caches
ARM: dts: r8a7791: Remove unit-address and reg from integrated cache
ARM: dts: r8a7792: Remove unit-address and reg from integrated cache
ARM: dts: r8a7793: Remove unit-address and reg from integrated cache
ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
ARM: dts: r8a7790: Add INTC-SYS clock to device tree
ARM: dts: r8a7791: Add INTC-SYS clock to device tree
ARM: dts: r8a7792: Add INTC-SYS clock to device tree
ARM: dts: r8a7794: Add INTC-SYS clock to device tree
ARM: dts: r8a7793: Add INTC-SYS clock to device tree
ARM: dts: porter: Always use status "okay" to enable devices
ARM: dts: bockw: Drop superfluous status update for frequency override
ARM: dts: marzen: Drop superfluous status update for frequency override
ARM: dts: lager: Drop superfluous status update for frequency override
ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
ARM: dts: porter: Drop superfluous status update for frequency override
ARM: dts: gose: Drop superfluous status update for frequency override
ARM: dts: alt: Drop superfluous status update for frequency override
ARM: dts: silk: Drop superfluous status update for frequency override
Kuninori Morimoto (3):
ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
arch/arm/boot/dts/Makefile | 38 +++++++++++++++---------------
arch/arm/boot/dts/r7s72100.dtsi | 24 +++++++++++++++----
arch/arm/boot/dts/r8a73a4.dtsi | 19 ++++++++-------
arch/arm/boot/dts/r8a7743.dtsi | 5 ++--
arch/arm/boot/dts/r8a7745.dtsi | 5 ++--
arch/arm/boot/dts/r8a7778-bockw.dts | 1 -
arch/arm/boot/dts/r8a7779-marzen.dts | 1 -
arch/arm/boot/dts/r8a7790-lager.dts | 1 -
arch/arm/boot/dts/r8a7790.dtsi | 19 ++++++++-------
arch/arm/boot/dts/r8a7791-koelsch.dts | 2 --
arch/arm/boot/dts/r8a7791-porter.dts | 5 ++--
arch/arm/boot/dts/r8a7791.dtsi | 16 +++++++------
arch/arm/boot/dts/r8a7792.dtsi | 14 +++++++----
arch/arm/boot/dts/r8a7793-gose.dts | 1 -
arch/arm/boot/dts/r8a7793.dtsi | 18 ++++++++------
arch/arm/boot/dts/r8a7794-alt.dts | 1 -
arch/arm/boot/dts/r8a7794-silk.dts | 1 -
arch/arm/boot/dts/r8a7794.dtsi | 12 ++++++----
include/dt-bindings/clock/r7s72100-clock.h | 6 +++--
include/dt-bindings/clock/r8a73a4-clock.h | 1 +
include/dt-bindings/clock/r8a7790-clock.h | 1 +
include/dt-bindings/clock/r8a7791-clock.h | 1 +
include/dt-bindings/clock/r8a7792-clock.h | 1 +
include/dt-bindings/clock/r8a7793-clock.h | 5 ++--
include/dt-bindings/clock/r8a7794-clock.h | 1 +
25 files changed, 113 insertions(+), 86 deletions(-)
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH 29/31] ARM: dts: gose: Drop superfluous status update for frequency override
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7793.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7793-gose.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 92fff07c5e2b..806c93f6ae8b 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -412,7 +412,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&sdhi0 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 30/31] ARM: dts: alt: Drop superfluous status update for frequency override
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7794.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794-alt.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index 569e3f0e97a5..3fcf76b8e923 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -375,7 +375,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&qspi {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 30/31] ARM: dts: alt: Drop superfluous status update for frequency override
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7794.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794-alt.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index 569e3f0e97a5..3fcf76b8e923 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -375,7 +375,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
&qspi {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 31/31] ARM: dts: silk: Drop superfluous status update for frequency override
2017-03-20 8:58 ` Simon Horman
@ 2017-03-20 8:58 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7794.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794-silk.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index cf880ac06f4b..c742d80d6dca 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -248,7 +248,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
ðer {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 31/31] ARM: dts: silk: Drop superfluous status update for frequency override
@ 2017-03-20 8:58 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-03-20 8:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The scif_clk device node is already enabled in r8a7794.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794-silk.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index cf880ac06f4b..c742d80d6dca 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -248,7 +248,6 @@
&scif_clk {
clock-frequency = <14745600>;
- status = "okay";
};
ðer {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 66+ messages in thread
* Re: [GIT PULL] Renesas ARM Based SoC DT Updates for v4.12
2017-03-20 8:58 ` Simon Horman
@ 2017-03-22 0:35 ` Olof Johansson
-1 siblings, 0 replies; 66+ messages in thread
From: Olof Johansson @ 2017-03-22 0:35 UTC (permalink / raw)
To: Simon Horman
Cc: arm, linux-renesas-soc, Kevin Hilman, Arnd Bergmann,
linux-arm-kernel, Magnus Damm
On Mon, Mar 20, 2017 at 09:58:08AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC DT updates for v4.12.
>
> * Conflicts
>
> "Add watchdog timer to r7s72100 SoC", which is part of this patch-set,
> has a minor conflict with "ARM: 8661/1: dts: r7s72100: add l2 cache",
> which I believe Russell King has in his tree.
>
> The resolution is to take both.
>
>
> The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
>
> Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.12
>
> for you to fetch changes up to d01ff18992218f3a13f45f45a886b3bf8f250f14:
>
> ARM: dts: silk: Drop superfluous status update for frequency override (2017-03-13 10:19:35 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC DT Updates for v4.12
>
> Cleanup:
> * Drop superfluous status update for frequency override on various boards
> * Always use status "okay" to enable devices on porger board
> * Add INTC-SYS clock to device tree of various SoCs
> * Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
> * Remove unit-address and reg from integrated cache on various SoCs
> * Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
> * Fix SCIFB0 dmas indentation on r8a774[35] SoCs
>
> Enhancements:
> * Add watchdog timer to r7s72100 SoC
> * Update sdhi clock bindings on r7s72100 SoC
>
Merged, thanks.
-Olof
^ permalink raw reply [flat|nested] 66+ messages in thread
* [GIT PULL] Renesas ARM Based SoC DT Updates for v4.12
@ 2017-03-22 0:35 ` Olof Johansson
0 siblings, 0 replies; 66+ messages in thread
From: Olof Johansson @ 2017-03-22 0:35 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Mar 20, 2017 at 09:58:08AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC DT updates for v4.12.
>
> * Conflicts
>
> "Add watchdog timer to r7s72100 SoC", which is part of this patch-set,
> has a minor conflict with "ARM: 8661/1: dts: r7s72100: add l2 cache",
> which I believe Russell King has in his tree.
>
> The resolution is to take both.
>
>
> The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
>
> Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.12
>
> for you to fetch changes up to d01ff18992218f3a13f45f45a886b3bf8f250f14:
>
> ARM: dts: silk: Drop superfluous status update for frequency override (2017-03-13 10:19:35 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC DT Updates for v4.12
>
> Cleanup:
> * Drop superfluous status update for frequency override on various boards
> * Always use status "okay" to enable devices on porger board
> * Add INTC-SYS clock to device tree of various SoCs
> * Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
> * Remove unit-address and reg from integrated cache on various SoCs
> * Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
> * Fix SCIFB0 dmas indentation on r8a774[35] SoCs
>
> Enhancements:
> * Add watchdog timer to r7s72100 SoC
> * Update sdhi clock bindings on r7s72100 SoC
>
Merged, thanks.
-Olof
^ permalink raw reply [flat|nested] 66+ messages in thread
end of thread, other threads:[~2017-03-22 0:40 UTC | newest]
Thread overview: 66+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-03-20 8:58 [GIT PULL] Renesas ARM Based SoC DT Updates for v4.12 Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:57 ` [PATCH 01/31] ARM: dts: r7s72100: update sdhi clock bindings Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 02/31] ARM: dts: r8a7743: Fix SCIFB0 dmas indentation Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 03/31] ARM: dts: r8a7745: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 04/31] ARM: dts: renesas: Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 05/31] ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated caches Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 06/31] ARM: dts: r8a7743: Remove unit-address and reg from integrated cache Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 07/31] ARM: dts: r8a7745: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 08/31] ARM: dts: r8a7790: Remove unit-addresses and regs from integrated caches Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 09/31] ARM: dts: r8a7791: Remove unit-address and reg from integrated cache Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 10/31] ARM: dts: r8a7792: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 11/31] ARM: dts: r8a7793: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 12/31] ARM: dts: r8a7794: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 13/31] ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 14/31] ARM: dts: r7s72100: Add watchdog timer Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 15/31] ARM: dts: r8a73a4: Add INTC-SYS clock to device tree Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 16/31] ARM: dts: r8a7790: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 17/31] ARM: dts: r8a7791: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 18/31] ARM: dts: r8a7792: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 19/31] ARM: dts: r8a7794: " Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:57 ` [PATCH 20/31] ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC Simon Horman
2017-03-20 8:57 ` Simon Horman
2017-03-20 8:58 ` [PATCH 21/31] ARM: dts: r8a7793: " Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 22/31] ARM: dts: r8a7793: Add INTC-SYS clock to device tree Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 23/31] ARM: dts: porter: Always use status "okay" to enable devices Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 24/31] ARM: dts: bockw: Drop superfluous status update for frequency override Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 25/31] ARM: dts: marzen: " Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 26/31] ARM: dts: lager: " Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 27/31] ARM: dts: koelsch: Drop superfluous status updates for frequency overrides Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 28/31] ARM: dts: porter: Drop superfluous status update for frequency override Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 29/31] ARM: dts: gose: " Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 30/31] ARM: dts: alt: " Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-20 8:58 ` [PATCH 31/31] ARM: dts: silk: " Simon Horman
2017-03-20 8:58 ` Simon Horman
2017-03-22 0:35 ` [GIT PULL] Renesas ARM Based SoC DT Updates for v4.12 Olof Johansson
2017-03-22 0:35 ` Olof Johansson
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