* [U-Boot] ti: ARM: svc: Question about switching to am57xx HYP mode.
@ 2017-03-22 14:25 Lukasz Majewski
2017-03-23 4:03 ` Keerthy
0 siblings, 1 reply; 2+ messages in thread
From: Lukasz Majewski @ 2017-03-22 14:25 UTC (permalink / raw)
To: u-boot
Dear All,
I do have a question regarding switching from SVC to HYP mode on AM57xx
SoC.
Just after going out of reset (room bootloader):
------------------------------------------------
Breakpoint 1, _start () at arch/arm/lib/vectors.S:54
54 b reset
(gdb) mo info
Core number : 0
Core state : debug mode (ARM)
Debug entry cause : Breakpoint
Current PC : 0x40300000
Current CPSR : 0x400000d3 (Supervisor)
Current SPSR : 0x00000000
(gdb)
Here the A bit in CPSR is cleared - the "Imprecise Data Abort mask" is
disabled.
Then we enter the HYP mode (due to LPAE u-boot support):
Breakpoint 39, switch_to_hypervisor () at
arch/arm/cpu/armv7/omap-common/lowlevel_init.S:35
After end of this ASM procedure we got following CPSR for HYP mode:
Breakpoint 41, switch_to_hypervisor_ret () at
arch/arm/cpu/armv7/start.S:57 57 and r1, r0,
#0x1f @ mask mode bits (gdb) mo info
Core number : 0
Core state : debug mode (ARM)
Debug entry cause : Breakpoint
Current PC : 0x4030005c
Current CPSR : 0x000001da (Hyp)
Current SPSR : 0x00000010
(gdb)
And here the A bit "Imprecise Abort Bit" [8] is masked.
Why such operation is performed in the SMC call (which switches to HYP)?
I could try to disable it by hand (cpsie A), but I'm not sure if this
has no "side effects".
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
^ permalink raw reply [flat|nested] 2+ messages in thread
* [U-Boot] ti: ARM: svc: Question about switching to am57xx HYP mode.
2017-03-22 14:25 [U-Boot] ti: ARM: svc: Question about switching to am57xx HYP mode Lukasz Majewski
@ 2017-03-23 4:03 ` Keerthy
0 siblings, 0 replies; 2+ messages in thread
From: Keerthy @ 2017-03-23 4:03 UTC (permalink / raw)
To: u-boot
On Wednesday 22 March 2017 07:55 PM, Lukasz Majewski wrote:
> Dear All,
>
> I do have a question regarding switching from SVC to HYP mode on AM57xx
> SoC.
>
> Just after going out of reset (room bootloader):
> ------------------------------------------------
>
> Breakpoint 1, _start () at arch/arm/lib/vectors.S:54
> 54 b reset
> (gdb) mo info
> Core number : 0
> Core state : debug mode (ARM)
> Debug entry cause : Breakpoint
> Current PC : 0x40300000
> Current CPSR : 0x400000d3 (Supervisor)
> Current SPSR : 0x00000000
> (gdb)
>
> Here the A bit in CPSR is cleared - the "Imprecise Data Abort mask" is
> disabled.
>
> Then we enter the HYP mode (due to LPAE u-boot support):
> Breakpoint 39, switch_to_hypervisor () at
> arch/arm/cpu/armv7/omap-common/lowlevel_init.S:35
>
> After end of this ASM procedure we got following CPSR for HYP mode:
>
> Breakpoint 41, switch_to_hypervisor_ret () at
> arch/arm/cpu/armv7/start.S:57 57 and r1, r0,
> #0x1f @ mask mode bits (gdb) mo info
> Core number : 0
> Core state : debug mode (ARM)
> Debug entry cause : Breakpoint
> Current PC : 0x4030005c
> Current CPSR : 0x000001da (Hyp)
> Current SPSR : 0x00000010
> (gdb)
>
> And here the A bit "Imprecise Abort Bit" [8] is masked.
>
> Why such operation is performed in the SMC call (which switches to HYP)?
>
> I could try to disable it by hand (cpsie A), but I'm not sure if this
> has no "side effects".
Hi Lukasz,
This seems to be the default behavior in the ROM Code when we do an SMC
call which switches to HYP mode.
A, bit[8] Asynchronous abort mask bit.
I, bit[7]
IRQ mask bit.
F, bit[6] FIQ mask bit.
Are set which means they are masked.
From the interaction i had with the ROM code team you can unmask the A
bit/bit[8] if needed.
Regards,
Keerthy
>
>
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2017-03-22 14:25 [U-Boot] ti: ARM: svc: Question about switching to am57xx HYP mode Lukasz Majewski
2017-03-23 4:03 ` Keerthy
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