Only 1 CPU on Jetson TX1

Only 1 CPU on Jetson TX1

[Martin Michlmayr]

Vagrant Cascadian observed that only 1 CPU is activated on the Jetson
TX1 development kit.

I can confirm this with mainline Linux and u-boot from mainline (2016.11)
or L4T (2016.03-00633-g3ef9cdb from R23.2).

I see the following in dmesg:

[    0.000000] /cpus/cpu@1: missing enable-method property
[    0.000000] /cpus/cpu@2: missing enable-method property
[    0.000000] /cpus/cpu@3: missing enable-method property

[    0.052643] Tegra Revision: A02 SKU: 23 CPU Process: 0 SoC Process: -22
[    0.053149] EFI services will not be available.
[    0.053316] Brought up 1 CPUs
[    0.053325] SMP: Total of 1 processors activated.
[    0.053341] CPU: All CPU(s) started at EL2

-- 
Martin Michlmayr
http://www.cyrius.com/

Re: Only 1 CPU on Jetson TX1

[Mikko Perttunen]

It appears you need to have

   fdt_copy_node_names=/cpus:/psci
   fdt_copy_src_addr=0x83080000

in your U-Boot configuration. This is documented somewhere in the middle 
of http://elinux.org/Jetson/TX1_Upstream_Kernel.

On 03/23/2017 02:11 AM, Martin Michlmayr wrote:
> Vagrant Cascadian observed that only 1 CPU is activated on the Jetson
> TX1 development kit.
>
> I can confirm this with mainline Linux and u-boot from mainline (2016.11)
> or L4T (2016.03-00633-g3ef9cdb from R23.2).
>
> I see the following in dmesg:
>
> [    0.000000] /cpus/cpu@1: missing enable-method property
> [    0.000000] /cpus/cpu@2: missing enable-method property
> [    0.000000] /cpus/cpu@3: missing enable-method property
>
> [    0.052643] Tegra Revision: A02 SKU: 23 CPU Process: 0 SoC Process: -22
> [    0.053149] EFI services will not be available.
> [    0.053316] Brought up 1 CPUs
> [    0.053325] SMP: Total of 1 processors activated.
> [    0.053341] CPU: All CPU(s) started at EL2
>

Re: Only 1 CPU on Jetson TX1

[Martin Michlmayr]

* Mikko Perttunen <cyndis-/1wQRMveznE@public.gmane.org> [2017-03-25 10:32]:
> It appears you need to have
> 
>   fdt_copy_node_names=/cpus:/psci
>   fdt_copy_src_addr=0x83080000
> 
> in your U-Boot configuration. This is documented somewhere in the middle of
> http://elinux.org/Jetson/TX1_Upstream_Kernel.

I can confirm that this works with u-boot from L4T R24.2.1.

However, it doesn't work with mainling u-boot (grepping for fdt_copy_
doesn't show anything in the source code).

Does anyone know how to get all 4 CPUs working with mainline u-boot?
-- 
Martin Michlmayr
http://www.cyrius.com/

Re: Only 1 CPU on Jetson TX1

[Stephen Warren]

On 03/26/2017 04:49 PM, Martin Michlmayr wrote:
> * Mikko Perttunen <cyndis-/1wQRMveznE@public.gmane.org> [2017-03-25 10:32]:
>> It appears you need to have
>>
>>   fdt_copy_node_names=/cpus:/psci
>>   fdt_copy_src_addr=0x83080000
>>
>> in your U-Boot configuration. This is documented somewhere in the middle of
>> http://elinux.org/Jetson/TX1_Upstream_Kernel.
>
> I can confirm that this works with u-boot from L4T R24.2.1.
>
> However, it doesn't work with mainling u-boot (grepping for fdt_copy_
> doesn't show anything in the source code).
>
> Does anyone know how to get all 4 CPUs working with mainline u-boot?

Thierry, Jon, do you know?

The "fdt_copy" feature of U-Boot isn't upstreamed since I thought it was 
only required to boot the L4T kernel, not mainline. We're also reworking 
L4T so this feature won't be needed there either, so I don't expect to 
upstream "fdt_copy".

Re: Only 1 CPU on Jetson TX1

[Jon Hunter]

On 27/03/17 16:39, Stephen Warren wrote:
> On 03/26/2017 04:49 PM, Martin Michlmayr wrote:
>> * Mikko Perttunen <cyndis-/1wQRMveznE@public.gmane.org> [2017-03-25 10:32]:
>>> It appears you need to have
>>>
>>>   fdt_copy_node_names=/cpus:/psci
>>>   fdt_copy_src_addr=0x83080000
>>>
>>> in your U-Boot configuration. This is documented somewhere in the
>>> middle of
>>> http://elinux.org/Jetson/TX1_Upstream_Kernel.
>>
>> I can confirm that this works with u-boot from L4T R24.2.1.
>>
>> However, it doesn't work with mainling u-boot (grepping for fdt_copy_
>> doesn't show anything in the source code).
>>
>> Does anyone know how to get all 4 CPUs working with mainline u-boot?
> 
> Thierry, Jon, do you know?
> 
> The "fdt_copy" feature of U-Boot isn't upstreamed since I thought it was
> only required to boot the L4T kernel, not mainline. We're also reworking
> L4T so this feature won't be needed there either, so I don't expect to
> upstream "fdt_copy".

Yes I would not expect that to go upstream, I see the same problem
reported, I will take a look.

Cheers
Jon

-- 
nvpublic

Re: Only 1 CPU on Jetson TX1

[Thierry Reding]

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On Mon, Mar 27, 2017 at 09:39:43AM -0600, Stephen Warren wrote:
> On 03/26/2017 04:49 PM, Martin Michlmayr wrote:
> > * Mikko Perttunen <cyndis-/1wQRMveznE@public.gmane.org> [2017-03-25 10:32]:
> > > It appears you need to have
> > > 
> > >   fdt_copy_node_names=/cpus:/psci
> > >   fdt_copy_src_addr=0x83080000
> > > 
> > > in your U-Boot configuration. This is documented somewhere in the middle of
> > > http://elinux.org/Jetson/TX1_Upstream_Kernel.
> > 
> > I can confirm that this works with u-boot from L4T R24.2.1.
> > 
> > However, it doesn't work with mainling u-boot (grepping for fdt_copy_
> > doesn't show anything in the source code).
> > 
> > Does anyone know how to get all 4 CPUs working with mainline u-boot?
> 
> Thierry, Jon, do you know?
> 
> The "fdt_copy" feature of U-Boot isn't upstreamed since I thought it was
> only required to boot the L4T kernel, not mainline. We're also reworking L4T
> so this feature won't be needed there either, so I don't expect to upstream
> "fdt_copy".

I vaguely remember that we had discussed this a while ago and I think we
decided that we should hardcode the /psci and /cpus nodes within the DTS
file on the basis that firmware would be considered part of the hardware
as far as the device tree description of it is concerned.

Technically, hard-coding isn't quite correct because someone might end
up not using the firmware that ships with L4T and therefore not have a
working PSCI implementation, but I think it's fairly unlikely that
someone will do that.

Thierry

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Re: Only 1 CPU on Jetson TX1

[Stephen Warren]

On 03/27/2017 10:58 AM, Thierry Reding wrote:
> On Mon, Mar 27, 2017 at 09:39:43AM -0600, Stephen Warren wrote:
>> On 03/26/2017 04:49 PM, Martin Michlmayr wrote:
>>> * Mikko Perttunen <cyndis-/1wQRMveznE@public.gmane.org> [2017-03-25 10:32]:
>>>> It appears you need to have
>>>>
>>>>   fdt_copy_node_names=/cpus:/psci
>>>>   fdt_copy_src_addr=0x83080000
>>>>
>>>> in your U-Boot configuration. This is documented somewhere in the middle of
>>>> http://elinux.org/Jetson/TX1_Upstream_Kernel.
>>>
>>> I can confirm that this works with u-boot from L4T R24.2.1.
>>>
>>> However, it doesn't work with mainling u-boot (grepping for fdt_copy_
>>> doesn't show anything in the source code).
>>>
>>> Does anyone know how to get all 4 CPUs working with mainline u-boot?
>>
>> Thierry, Jon, do you know?
>>
>> The "fdt_copy" feature of U-Boot isn't upstreamed since I thought it was
>> only required to boot the L4T kernel, not mainline. We're also reworking L4T
>> so this feature won't be needed there either, so I don't expect to upstream
>> "fdt_copy".
>
> I vaguely remember that we had discussed this a while ago and I think we
> decided that we should hardcode the /psci and /cpus nodes within the DTS
> file on the basis that firmware would be considered part of the hardware
> as far as the device tree description of it is concerned.
>
> Technically, hard-coding isn't quite correct because someone might end
> up not using the firmware that ships with L4T and therefore not have a
> working PSCI implementation, but I think it's fairly unlikely that
> someone will do that.

It seems reasonable to expect PSCI, so hard-coding seems fine to me. If 
someone does something unusual (like bringing up a new FW) they can 
always temporarily adjust the default DT to suit their needs.

Equally, relying on copying the /psci and /cpus nodes from the 
nvtboot-supplied DT likely doesn't avoid this assumption, since IIRC 
those nodes are simply hard-coded into the DT that nvtboot uses anyway.