[U-Boot] [PATCH 1/4] board: advantech: dms-ba16: Add the configuration options for display initialization

[U-Boot] [PATCH 1/4] board: advantech: dms-ba16: Add the configuration options for display initialization

[Ken Lin]

Add the configuration options for display initialization in case we need to
do the display initialization in kernel to support different timing settings

Signed-off-by: Ken Lin <yungching0725@gmail.com>
---
 board/advantech/dms-ba16/dms-ba16.c  | 3 +++
 include/configs/advantech_dms-ba16.h | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c
index 20750fb0ce..a67752f1ca 100644
--- a/board/advantech/dms-ba16/dms-ba16.c
+++ b/board/advantech/dms-ba16/dms-ba16.c
@@ -539,6 +539,8 @@ int board_late_init(void)
 #ifdef CONFIG_CMD_BMODE
 	add_board_boot_modes(board_boot_modes);
 #endif
+
+#if defined(CONFIG_VIDEO_IPUV3)
 	/*
 	 * We need at least 200ms between power on and backlight on
 	 * as per specifications from CHI MEI
@@ -555,6 +557,7 @@ int board_late_init(void)
 	gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
 
 	pwm_enable(0);
+#endif
 
 #ifdef CONFIG_CMD_SATA
 	setup_ba16_sata();
diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h
index 14e9c06fac..53a45b21a4 100644
--- a/include/configs/advantech_dms-ba16.h
+++ b/include/configs/advantech_dms-ba16.h
@@ -262,6 +262,7 @@
 #define CONFIG_SYS_FSL_USDHC_NUM        3
 
 /* Framebuffer */
+#ifdef CONFIG_VIDEO
 #define CONFIG_VIDEO_IPUV3
 #define CONFIG_VIDEO_BMP_RLE8
 #define CONFIG_SPLASH_SCREEN
@@ -272,6 +273,7 @@
 #define CONFIG_IPUV3_CLK                260000000
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
+#endif
 
 #define CONFIG_PWM_IMX
 #define CONFIG_IMX6_PWM_PER_CLK         66000000
-- 
2.11.0

[U-Boot] [PATCH 2/4] board: advantech: dms-ba16: add the PMIC configuration support

[Ken Lin]

Change the PMIC bulk configuration from auto mode to sync mode to avoid the voltage shutdown issue

Signed-off-by: Ken Lin <yungching0725@gmail.com>
---
 board/advantech/dms-ba16/dms-ba16.c | 51 +++++++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c
index a67752f1ca..8aa7ff1659 100644
--- a/board/advantech/dms-ba16/dms-ba16.c
+++ b/board/advantech/dms-ba16/dms-ba16.c
@@ -534,6 +534,54 @@ static const struct boot_mode board_boot_modes[] = {
 };
 #endif
 
+void pmic_init(void)
+{
+
+#define DA9063_ADDR 0x58
+#define BCORE2_CONF 0x9D
+#define BCORE1_CONF 0x9E
+#define BPRO_CONF 0x9F
+#define BIO_CONF 0xA0
+#define BMEM_CONF 0xA1
+#define BPERI_CONF 0xA2
+#define MODE_BIT_H 7
+#define MODE_BIT_L 6
+
+        uchar val;
+        i2c_set_bus_num(2);
+
+        i2c_read(DA9063_ADDR, BCORE2_CONF, 1, &val, 1);
+        val |= (1 << MODE_BIT_H);
+        val &= ~(1 << MODE_BIT_L);
+        i2c_write(DA9063_ADDR, BCORE2_CONF , 1, &val, 1);
+
+        i2c_read(DA9063_ADDR, BCORE1_CONF, 1, &val, 1);
+        val |= (1 << MODE_BIT_H);
+        val &= ~(1 << MODE_BIT_L);
+        i2c_write(DA9063_ADDR, BCORE1_CONF , 1, &val, 1);
+
+        i2c_read(DA9063_ADDR, BPRO_CONF, 1, &val, 1);
+        val |= (1 << MODE_BIT_H);
+        val &= ~(1 << MODE_BIT_L);
+        i2c_write(DA9063_ADDR, BPRO_CONF , 1, &val, 1);
+
+        i2c_read(DA9063_ADDR, BIO_CONF, 1, &val, 1);
+        val |= (1 << MODE_BIT_H);
+        val &= ~(1 << MODE_BIT_L);
+        i2c_write(DA9063_ADDR, BIO_CONF , 1, &val, 1);
+
+        i2c_read(DA9063_ADDR, BMEM_CONF, 1, &val, 1);
+        val |= (1 << MODE_BIT_H);
+        val &= ~(1 << MODE_BIT_L);
+        i2c_write(DA9063_ADDR, BMEM_CONF , 1, &val, 1);
+
+        i2c_read(DA9063_ADDR, BPERI_CONF, 1, &val, 1);
+        val |= (1 << MODE_BIT_H);
+        val &= ~(1 << MODE_BIT_L);
+        i2c_write(DA9063_ADDR, BPERI_CONF , 1, &val, 1);
+
+}
+
 int board_late_init(void)
 {
 #ifdef CONFIG_CMD_BMODE
@@ -563,6 +611,9 @@ int board_late_init(void)
 	setup_ba16_sata();
 #endif
 
+        /* board specific pmic init */
+        pmic_init();
+
 	return 0;
 }
 
-- 
2.11.0

[U-Boot] [PATCH 3/4] board: advantech: dms-ba16: fix AR8033 reset timing issue

[Ken Lin]

Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet

Signed-off-by: Ken Lin <yungching0725@gmail.com>
---
 board/advantech/dms-ba16/dms-ba16.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c
index 8aa7ff1659..75b0bbc2cc 100644
--- a/board/advantech/dms-ba16/dms-ba16.c
+++ b/board/advantech/dms-ba16/dms-ba16.c
@@ -103,8 +103,9 @@ static void setup_iomux_enet(void)
 
 	/* Reset AR8033 PHY */
 	gpio_direction_output(IMX_GPIO_NR(1, 28), 0);
-	udelay(500);
+	mdelay(10);
 	gpio_set_value(IMX_GPIO_NR(1, 28), 1);
+	mdelay(1);
 }
 
 static iomux_v3_cfg_t const usdhc2_pads[] = {
-- 
2.11.0

[U-Boot] [PATCH 4/4] board: advantech: dms-ba16: apply the proper register setting to fix the voltage peak issue

[Ken Lin]

Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register
to avoid the voltage peak issue while we do the IEEE PHY comformance test

Signed-off-by: Ken Lin <yungching0725@gmail.com>
---
 board/advantech/dms-ba16/dms-ba16.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c
index 75b0bbc2cc..91e96ab096 100644
--- a/board/advantech/dms-ba16/dms-ba16.c
+++ b/board/advantech/dms-ba16/dms-ba16.c
@@ -304,7 +304,8 @@ static int mx6_rgmii_rework(struct phy_device *phydev)
 	/* set debug port address: SerDes Test and System Mode Control */
 	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
 	/* enable rgmii tx clock delay */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+	/* set the reserved bits to avoid board specific voltage peak issue*/
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
 
 	return 0;
 }
-- 
2.11.0

[U-Boot] [PATCH 1/4] board: advantech: dms-ba16: Add the configuration options for display initialization

[Akshay Bhat]

On 03/28/2017 01:51 PM, Ken Lin wrote:
> Add the configuration options for display initialization in case we need to
> do the display initialization in kernel to support different timing settings
> 
> Signed-off-by: Ken Lin <yungching0725@gmail.com>
> ---

Acked-by: Akshay Bhat <akshay.bhat@timesys.com>

[U-Boot] [PATCH 2/4] board: advantech: dms-ba16: add the PMIC configuration support

[Akshay Bhat]

On 03/28/2017 01:51 PM, Ken Lin wrote:
> Change the PMIC bulk configuration from auto mode to sync mode to avoid the voltage shutdown issue
> 
> Signed-off-by: Ken Lin <yungching0725@gmail.com>
> ---

Acked-by: Akshay Bhat <akshay.bhat@timesys.com>

[U-Boot] [PATCH 3/4] board: advantech: dms-ba16: fix AR8033 reset timing issue

[Akshay Bhat]

On 03/28/2017 01:51 PM, Ken Lin wrote:
> Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet
> 
> Signed-off-by: Ken Lin <yungching0725@gmail.com>
> ---

Acked-by: Akshay Bhat <akshay.bhat@timesys.com>

[U-Boot] [PATCH 4/4] board: advantech: dms-ba16: apply the proper register setting to fix the voltage peak issue

[Akshay Bhat]

On 03/28/2017 01:51 PM, Ken Lin wrote:
> Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register
> to avoid the voltage peak issue while we do the IEEE PHY comformance test
> 
> Signed-off-by: Ken Lin <yungching0725@gmail.com>
> ---

Acked-by: Akshay Bhat <akshay.bhat@timesys.com>

[U-Boot] [PATCH 1/4] board: advantech: dms-ba16: Add the configuration options for display initialization

[Stefano Babic]

On 28/03/2017 19:51, Ken Lin wrote:
> Add the configuration options for display initialization in case we need to
> do the display initialization in kernel to support different timing settings
> 
> Signed-off-by: Ken Lin <yungching0725@gmail.com>
> ---

Whole series applied to u-boot-imx, thanks!

Best regards,
Stefano Babic

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