From: Marc Zyngier <marc.zyngier@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Will Deacon <will.deacon@arm.com>, Scott Wood <oss@buserror.net>, Hanjun Guo <hanjun.guo@linaro.org>, Ding Tianhong <dingtianhong@huawei.com>, dann frazier <dann.frazier@canonical.com>, Thomas Gleixner <tglx@linutronix.de> Subject: [PATCH v3 12/18] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Date: Tue, 4 Apr 2017 18:18:20 +0100 [thread overview] Message-ID: <20170404171826.25030-13-marc.zyngier@arm.com> (raw) In-Reply-To: <20170404171826.25030-1-marc.zyngier@arm.com> Instead of applying a CPU-specific workaround to all CPUs in the system, allow it to only affect a subset of them (typical big-little case). This is done by turning the erratum pointer into a per-CPU variable. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- arch/arm64/include/asm/arch_timer.h | 31 ++++++++++++++++---------- drivers/clocksource/arm_arch_timer.c | 42 +++++++++++++++++++++++++----------- 2 files changed, 50 insertions(+), 23 deletions(-) diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h index 01917b4c65ca..6bd1a9a1573a 100644 --- a/arch/arm64/include/asm/arch_timer.h +++ b/arch/arm64/include/asm/arch_timer.h @@ -25,6 +25,7 @@ #include <linux/bug.h> #include <linux/init.h> #include <linux/jump_label.h> +#include <linux/smp.h> #include <linux/types.h> #include <clocksource/arm_arch_timer.h> @@ -55,17 +56,25 @@ struct arch_timer_erratum_workaround { int (*set_next_event_virt)(unsigned long, struct clock_event_device *); }; -extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround; - -#define arch_timer_reg_read_stable(reg) \ -({ \ - u64 _val; \ - if (needs_unstable_timer_counter_workaround() && \ - timer_unstable_counter_workaround->read_##reg) \ - _val = timer_unstable_counter_workaround->read_##reg(); \ - else \ - _val = read_sysreg(reg); \ - _val; \ +DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *, + timer_unstable_counter_workaround); + +#define arch_timer_reg_read_stable(reg) \ +({ \ + u64 _val; \ + if (needs_unstable_timer_counter_workaround()) { \ + const struct arch_timer_erratum_workaround *wa; \ + preempt_disable(); \ + wa = __this_cpu_read(timer_unstable_counter_workaround); \ + if (wa && wa->read_##reg) \ + _val = wa->read_##reg(); \ + else \ + _val = read_sysreg(reg); \ + preempt_enable(); \ + } else { \ + _val = read_sysreg(reg); \ + } \ + _val; \ }) /* diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index a0c9ee80147e..4551587bcb44 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -235,7 +235,8 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void) #endif #ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND -const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround = NULL; +DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, + timer_unstable_counter_workaround); EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround); DEFINE_STATIC_KEY_FALSE(arch_timer_read_ool_enabled); @@ -338,9 +339,18 @@ arch_timer_iterate_errata(enum arch_timer_erratum_match_type type, } static -void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa) +void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa, + bool local) { - timer_unstable_counter_workaround = wa; + int i; + + if (local) { + __this_cpu_write(timer_unstable_counter_workaround, wa); + } else { + for_each_possible_cpu(i) + per_cpu(timer_unstable_counter_workaround, i) = wa; + } + static_branch_enable(&arch_timer_read_ool_enabled); } @@ -369,14 +379,17 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t return; if (needs_unstable_timer_counter_workaround()) { - if (wa != timer_unstable_counter_workaround) + const struct arch_timer_erratum_workaround *__wa; + __wa = __this_cpu_read(timer_unstable_counter_workaround); + if (__wa && wa != __wa) pr_warn("Can't enable workaround for %s (clashes with %s\n)", - wa->desc, - timer_unstable_counter_workaround->desc); - return; + wa->desc, __wa->desc); + + if (__wa) + return; } - arch_timer_enable_workaround(wa); + arch_timer_enable_workaround(wa, local); pr_info("Enabling %s workaround for %s\n", local ? "local" : "global", wa->desc); } @@ -384,10 +397,15 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t #define erratum_handler(fn, r, ...) \ ({ \ bool __val; \ - if (needs_unstable_timer_counter_workaround() && \ - timer_unstable_counter_workaround->fn) { \ - r = timer_unstable_counter_workaround->fn(__VA_ARGS__); \ - __val = true; \ + if (needs_unstable_timer_counter_workaround()) { \ + const struct arch_timer_erratum_workaround *__wa; \ + __wa = __this_cpu_read(timer_unstable_counter_workaround); \ + if (__wa && __wa->fn) { \ + r = __wa->fn(__VA_ARGS__); \ + __val = true; \ + } else { \ + __val = false; \ + } \ } else { \ __val = false; \ } \ -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 12/18] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Date: Tue, 4 Apr 2017 18:18:20 +0100 [thread overview] Message-ID: <20170404171826.25030-13-marc.zyngier@arm.com> (raw) In-Reply-To: <20170404171826.25030-1-marc.zyngier@arm.com> Instead of applying a CPU-specific workaround to all CPUs in the system, allow it to only affect a subset of them (typical big-little case). This is done by turning the erratum pointer into a per-CPU variable. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- arch/arm64/include/asm/arch_timer.h | 31 ++++++++++++++++---------- drivers/clocksource/arm_arch_timer.c | 42 +++++++++++++++++++++++++----------- 2 files changed, 50 insertions(+), 23 deletions(-) diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h index 01917b4c65ca..6bd1a9a1573a 100644 --- a/arch/arm64/include/asm/arch_timer.h +++ b/arch/arm64/include/asm/arch_timer.h @@ -25,6 +25,7 @@ #include <linux/bug.h> #include <linux/init.h> #include <linux/jump_label.h> +#include <linux/smp.h> #include <linux/types.h> #include <clocksource/arm_arch_timer.h> @@ -55,17 +56,25 @@ struct arch_timer_erratum_workaround { int (*set_next_event_virt)(unsigned long, struct clock_event_device *); }; -extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround; - -#define arch_timer_reg_read_stable(reg) \ -({ \ - u64 _val; \ - if (needs_unstable_timer_counter_workaround() && \ - timer_unstable_counter_workaround->read_##reg) \ - _val = timer_unstable_counter_workaround->read_##reg(); \ - else \ - _val = read_sysreg(reg); \ - _val; \ +DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *, + timer_unstable_counter_workaround); + +#define arch_timer_reg_read_stable(reg) \ +({ \ + u64 _val; \ + if (needs_unstable_timer_counter_workaround()) { \ + const struct arch_timer_erratum_workaround *wa; \ + preempt_disable(); \ + wa = __this_cpu_read(timer_unstable_counter_workaround); \ + if (wa && wa->read_##reg) \ + _val = wa->read_##reg(); \ + else \ + _val = read_sysreg(reg); \ + preempt_enable(); \ + } else { \ + _val = read_sysreg(reg); \ + } \ + _val; \ }) /* diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index a0c9ee80147e..4551587bcb44 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -235,7 +235,8 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void) #endif #ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND -const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround = NULL; +DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, + timer_unstable_counter_workaround); EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround); DEFINE_STATIC_KEY_FALSE(arch_timer_read_ool_enabled); @@ -338,9 +339,18 @@ arch_timer_iterate_errata(enum arch_timer_erratum_match_type type, } static -void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa) +void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa, + bool local) { - timer_unstable_counter_workaround = wa; + int i; + + if (local) { + __this_cpu_write(timer_unstable_counter_workaround, wa); + } else { + for_each_possible_cpu(i) + per_cpu(timer_unstable_counter_workaround, i) = wa; + } + static_branch_enable(&arch_timer_read_ool_enabled); } @@ -369,14 +379,17 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t return; if (needs_unstable_timer_counter_workaround()) { - if (wa != timer_unstable_counter_workaround) + const struct arch_timer_erratum_workaround *__wa; + __wa = __this_cpu_read(timer_unstable_counter_workaround); + if (__wa && wa != __wa) pr_warn("Can't enable workaround for %s (clashes with %s\n)", - wa->desc, - timer_unstable_counter_workaround->desc); - return; + wa->desc, __wa->desc); + + if (__wa) + return; } - arch_timer_enable_workaround(wa); + arch_timer_enable_workaround(wa, local); pr_info("Enabling %s workaround for %s\n", local ? "local" : "global", wa->desc); } @@ -384,10 +397,15 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t #define erratum_handler(fn, r, ...) \ ({ \ bool __val; \ - if (needs_unstable_timer_counter_workaround() && \ - timer_unstable_counter_workaround->fn) { \ - r = timer_unstable_counter_workaround->fn(__VA_ARGS__); \ - __val = true; \ + if (needs_unstable_timer_counter_workaround()) { \ + const struct arch_timer_erratum_workaround *__wa; \ + __wa = __this_cpu_read(timer_unstable_counter_workaround); \ + if (__wa && __wa->fn) { \ + r = __wa->fn(__VA_ARGS__); \ + __val = true; \ + } else { \ + __val = false; \ + } \ } else { \ __val = false; \ } \ -- 2.11.0
next prev parent reply other threads:[~2017-04-04 17:19 UTC|newest] Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-04 17:18 [PATCH v3 00/18] clocksource/arch_timer: Errata workaround infrastructure rework Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 01/18] arm64: Allow checking of a CPU-local erratum Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 02/18] arm64: Add CNTVCT_EL0 trap handler Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 03/18] arm64: Define Cortex-A73 MIDR Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 04/18] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 05/18] arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 06/18] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 07/18] arm64: arch_timer: Add erratum handler for CPU-specific capability Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 08/18] arm64: arch_timer: Move arch_timer_reg_read/write around Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 09/18] arm64: arch_timer: Get rid of erratum_workaround_set_sne Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 10/18] arm64: arch_timer: Rework the set_next_event workarounds Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 11/18] arm64: arch_timer: Make workaround methods optional Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier [this message] 2017-04-04 17:18 ` [PATCH v3 12/18] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 13/18] arm64: arch_timer: Move clocksource_counter and co around Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 14/18] arm64: arch_timer: Save cntkctl_el1 as a per-cpu variable Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 15/18] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier [not found] ` <58FDB05B.6020108@huawei.com> 2017-04-24 8:13 ` Marc Zyngier 2017-04-24 8:13 ` Marc Zyngier 2017-04-24 8:18 ` Lixiaoping (Timmy) 2017-04-24 8:18 ` Lixiaoping (Timmy) 2017-04-24 8:25 ` Lixiaoping (Timmy) 2017-04-24 8:25 ` Lixiaoping (Timmy) 2017-04-24 8:40 ` Marc Zyngier 2017-04-24 8:40 ` Marc Zyngier 2017-04-24 9:14 ` Hanjun Guo 2017-04-24 9:14 ` Hanjun Guo 2017-04-24 9:18 ` Daniel Lezcano 2017-04-24 9:18 ` Daniel Lezcano 2017-04-24 9:33 ` Marc Zyngier 2017-04-24 9:33 ` Marc Zyngier 2017-04-24 11:26 ` Catalin Marinas 2017-04-24 11:26 ` Catalin Marinas 2017-04-04 17:18 ` [PATCH v3 16/18] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 17/18] arm64: arch_timer: Allow erratum matching with ACPI OEM information Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-04 17:18 ` [PATCH v3 18/18] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Marc Zyngier 2017-04-04 17:18 ` Marc Zyngier 2017-04-06 16:27 ` [PATCH v3 00/18] clocksource/arch_timer: Errata workaround infrastructure rework Catalin Marinas 2017-04-06 16:27 ` Catalin Marinas 2017-04-06 21:15 ` Daniel Lezcano 2017-04-07 8:15 ` Thomas Gleixner 2017-04-07 8:15 ` Thomas Gleixner
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20170404171826.25030-13-marc.zyngier@arm.com \ --to=marc.zyngier@arm.com \ --cc=catalin.marinas@arm.com \ --cc=daniel.lezcano@linaro.org \ --cc=dann.frazier@canonical.com \ --cc=dingtianhong@huawei.com \ --cc=hanjun.guo@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=mark.rutland@arm.com \ --cc=oss@buserror.net \ --cc=tglx@linutronix.de \ --cc=will.deacon@arm.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.