* [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset
@ 2017-04-05 5:34 Sagar Arun Kamble
2017-04-05 5:48 ` ✓ Fi.CI.BAT: success for series starting with [1/1] " Patchwork
2017-04-05 9:00 ` [PATCH 1/1] " Chris Wilson
0 siblings, 2 replies; 4+ messages in thread
From: Sagar Arun Kamble @ 2017-04-05 5:34 UTC (permalink / raw)
To: intel-gfx
During S3/S4 suspend, i915 sends HOST2GUC with ENTER_S_STATE action
for suspending GuC. GuC stops scheduling at this point. i915 is
currently doing explicit GPU reset during suspend ensuring GEM is idle.
Suspend GuC prior to triggering GPU Reset to ensure GuC stays idle too.
Cc: Jeff McGee <jeff.mcgee@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 --
drivers/gpu/drm/i915/i915_gem.c | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c616b4e..7b4fa84 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1469,8 +1469,6 @@ static int i915_drm_suspend(struct drm_device *dev)
goto out;
}
- intel_guc_suspend(dev_priv);
-
intel_display_suspend(dev);
intel_dp_mst_suspend(dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index bbc6f1c..9234334 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4456,6 +4456,8 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
i915_gem_context_lost(dev_priv);
mutex_unlock(&dev->struct_mutex);
+ intel_guc_suspend(dev_priv);
+
cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work);
cancel_delayed_work_sync(&dev_priv->gt.retire_work);
--
1.9.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset
2017-04-05 5:34 [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset Sagar Arun Kamble
@ 2017-04-05 5:48 ` Patchwork
2017-04-05 9:00 ` [PATCH 1/1] " Chris Wilson
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2017-04-05 5:48 UTC (permalink / raw)
To: sagar.a.kamble; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset
URL : https://patchwork.freedesktop.org/series/22488/
State : success
== Summary ==
Series 22488v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/22488/revisions/1/mbox/
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass -> FAIL (fi-snb-2600) fdo#100007
Test gem_exec_suspend:
Subgroup basic-s4-devices:
dmesg-warn -> PASS (fi-kbl-7560u) fdo#100125
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 433s
fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time: 427s
fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 564s
fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 505s
fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 528s
fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 480s
fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 486s
fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 408s
fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 405s
fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 427s
fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 472s
fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 464s
fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 449s
fi-kbl-7560u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 570s
fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 451s
fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 566s
fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 461s
fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 489s
fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time: 433s
fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 527s
fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time: 405s
bf30bc2a70b83a77ba63436023f3550083715c56 drm-tip: 2017y-04m-04d-20h-00m-56s UTC integration manifest
2284252 drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4404/
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset
2017-04-05 5:34 [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset Sagar Arun Kamble
2017-04-05 5:48 ` ✓ Fi.CI.BAT: success for series starting with [1/1] " Patchwork
@ 2017-04-05 9:00 ` Chris Wilson
2017-04-05 9:27 ` Kamble, Sagar A
1 sibling, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2017-04-05 9:00 UTC (permalink / raw)
To: Sagar Arun Kamble; +Cc: intel-gfx
On Wed, Apr 05, 2017 at 11:04:34AM +0530, Sagar Arun Kamble wrote:
> During S3/S4 suspend, i915 sends HOST2GUC with ENTER_S_STATE action
> for suspending GuC. GuC stops scheduling at this point. i915 is
> currently doing explicit GPU reset during suspend ensuring GEM is idle.
> Suspend GuC prior to triggering GPU Reset to ensure GuC stays idle too.
Why would a gpu reset cause the guc to think it was not idle, and
futhermore ignore the suspend request afterwards? Should we not be
completely disabling the guc along the system suspend path? Especially
if it is so easily confused?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset
2017-04-05 9:00 ` [PATCH 1/1] " Chris Wilson
@ 2017-04-05 9:27 ` Kamble, Sagar A
0 siblings, 0 replies; 4+ messages in thread
From: Kamble, Sagar A @ 2017-04-05 9:27 UTC (permalink / raw)
To: Chris Wilson, intel-gfx, Jeff McGee, Daniele Ceraolo Spurio,
Joonas Lahtinen
On 4/5/2017 2:30 PM, Chris Wilson wrote:
> On Wed, Apr 05, 2017 at 11:04:34AM +0530, Sagar Arun Kamble wrote:
>> During S3/S4 suspend, i915 sends HOST2GUC with ENTER_S_STATE action
>> for suspending GuC. GuC stops scheduling at this point. i915 is
>> currently doing explicit GPU reset during suspend ensuring GEM is idle.
>> Suspend GuC prior to triggering GPU Reset to ensure GuC stays idle too.
> Why would a gpu reset cause the guc to think it was not idle, and
> futhermore ignore the suspend request afterwards? Should we not be
> completely disabling the guc along the system suspend path? Especially
> if it is so easily confused?
> -Chris
Post GPU reset, GuC firmware is unloaded and GuC is not ready till we
reinitialize the firmware so
all Host to GuC actions are bound to fail. ENTER_S_STATE is disabling
GuC scheduling completely.
GuC is saving the needed state and ensuring wake events are disabled. So
we need to trigger this
action prior to resetting GPU in suspend path.
>
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2017-04-05 5:34 [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset Sagar Arun Kamble
2017-04-05 5:48 ` ✓ Fi.CI.BAT: success for series starting with [1/1] " Patchwork
2017-04-05 9:00 ` [PATCH 1/1] " Chris Wilson
2017-04-05 9:27 ` Kamble, Sagar A
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