All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] drm/i915/gvt: set the correct default value of CTX STATUS PTR
@ 2017-04-06  2:42 Zhenyu Wang
  2017-04-06  3:01 ` [PATCH v2] " Zhenyu Wang
  0 siblings, 1 reply; 2+ messages in thread
From: Zhenyu Wang @ 2017-04-06  2:42 UTC (permalink / raw)
  To: intel-gvt-dev; +Cc: Min He, stable, #, v4.10+

From: Min He <min.he@intel.com>

Fix wrong initial csb read pointer value. This fixes the random
engine timeout issue in guest when guest boots up.

Cc: stable@vger.kernel.org # v4.10+
Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
 drivers/gpu/drm/i915/gvt/execlist.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c
index ce4276a7cf9c..536bde8638c8 100644
--- a/drivers/gpu/drm/i915/gvt/execlist.c
+++ b/drivers/gpu/drm/i915/gvt/execlist.c
@@ -776,7 +776,8 @@ static void init_vgpu_execlist(struct intel_vgpu *vgpu, int ring_id)
 			_EL_OFFSET_STATUS_PTR);
 
 	ctx_status_ptr.dw = vgpu_vreg(vgpu, ctx_status_ptr_reg);
-	ctx_status_ptr.read_ptr = ctx_status_ptr.write_ptr = 0x7;
+	ctx_status_ptr.read_ptr = 0;
+	ctx_status_ptr.write_ptr = 0x7;
 	vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw;
 }
 
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [PATCH v2] drm/i915/gvt: set the correct default value of CTX STATUS PTR
  2017-04-06  2:42 [PATCH] drm/i915/gvt: set the correct default value of CTX STATUS PTR Zhenyu Wang
@ 2017-04-06  3:01 ` Zhenyu Wang
  0 siblings, 0 replies; 2+ messages in thread
From: Zhenyu Wang @ 2017-04-06  3:01 UTC (permalink / raw)
  To: intel-gvt-dev; +Cc: Min He, stable, #, v4.10+

From: Min He <min.he@intel.com>

Fix wrong initial csb read pointer value. This fixes the random
engine timeout issue in guest when guest boots up.

Fixes: 8453d674ae7e ("drm/i915/gvt: vGPU execlist virtualization")
Cc: stable@vger.kernel.org # v4.10+
Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
 drivers/gpu/drm/i915/gvt/execlist.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c
index ce4276a7cf9c..536bde8638c8 100644
--- a/drivers/gpu/drm/i915/gvt/execlist.c
+++ b/drivers/gpu/drm/i915/gvt/execlist.c
@@ -776,7 +776,8 @@ static void init_vgpu_execlist(struct intel_vgpu *vgpu, int ring_id)
 			_EL_OFFSET_STATUS_PTR);
 
 	ctx_status_ptr.dw = vgpu_vreg(vgpu, ctx_status_ptr_reg);
-	ctx_status_ptr.read_ptr = ctx_status_ptr.write_ptr = 0x7;
+	ctx_status_ptr.read_ptr = 0;
+	ctx_status_ptr.write_ptr = 0x7;
 	vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw;
 }
 
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2017-04-06  3:04 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-04-06  2:42 [PATCH] drm/i915/gvt: set the correct default value of CTX STATUS PTR Zhenyu Wang
2017-04-06  3:01 ` [PATCH v2] " Zhenyu Wang

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.