[RFC 0/2] slice shutdown debugfs interface for Gen8/Gen9

[RFC 0/2] slice shutdown debugfs interface for Gen8/Gen9

[Dmitry Rogozhkin]

Starting from Gen8 HW supports dynamic power on/off slices. This
permits to free power budget and may dramatically affect performance.
This patch series suggests an interface (debugfs) to permit user to
setup number of active slices. Interface can be used in performance
investigations targeting scalability across hw platforms.

Dmitry Rogozhkin (2):
  drm/i915/skl: add slice shutdown debugfs interface
  drm/i915/bdw: permit make_rpcs execution on BDW to enable slice
    shutdown

 drivers/gpu/drm/i915/i915_debugfs.c      | 38 +++++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_drv.h          |  1 +
 drivers/gpu/drm/i915/intel_device_info.c |  1 +
 drivers/gpu/drm/i915/intel_lrc.c         |  4 ++--
 4 files changed, 41 insertions(+), 3 deletions(-)

-- 
1.8.3.1

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[RFC 1/2] drm/i915/skl: add slice shutdown debugfs interface

[Dmitry Rogozhkin]

Slice shutdown override interface (i915_slice_enabled) permits
to power on/off GPGPU slices in Gen8 and Gen9. This is helpful
in performance investigations amd checking scalability across
hw platforms. Changes to slice number done via this interface
will effect any lrc created after the write and will not affect
older ones.

v1: Restrict effect of the patch to SKL. Comment code.

Change-Id: I4f2fe5fefb8d1df4519fd0eb58237759c7d1a930
Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
CC: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
CC: Zhipeng Gong <zhipeng.gong@intel.com>
CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
CC: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_debugfs.c      | 38 +++++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_drv.h          |  1 +
 drivers/gpu/drm/i915/intel_device_info.c |  1 +
 drivers/gpu/drm/i915/intel_lrc.c         |  2 +-
 4 files changed, 40 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index d689e51..4d7dac5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4812,6 +4812,41 @@ static int i915_hpd_storm_ctl_open(struct inode *inode, struct file *file)
 	{"i915_drrs_status", i915_drrs_status, 0},
 	{"i915_rps_boost_info", i915_rps_boost_info, 0},
 };
+
+static int
+i915_slice_enabled_get(void *data, u64 *val)
+{
+	struct drm_i915_private *dev_priv = data;
+
+	*val = INTEL_INFO(dev_priv)->sseu.slice_enabled;
+	return 0;
+}
+
+/* Changes to slice number done via this interface will effect
+ * any lrc created after the write and will not affect
+ * older ones.
+ */
+static int
+i915_slice_enabled_set(void *data, u64 val)
+{
+	struct drm_i915_private *dev_priv = data;
+	struct intel_device_info *info;
+
+	info = mkwrite_device_info(dev_priv);
+	if (!IS_SKYLAKE(dev_priv) || !info->sseu.has_slice_pg)
+		return -EINVAL;
+
+	if (val > hweight8(info->sseu.slice_mask))
+		return -EINVAL;
+
+	info->sseu.slice_enabled = val;
+	return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(i915_slice_enabled_fops,
+			i915_slice_enabled_get, i915_slice_enabled_set,
+			"%llu\n");
+
 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
 
 static const struct i915_debugfs_files {
@@ -4839,7 +4874,8 @@ static int i915_hpd_storm_ctl_open(struct inode *inode, struct file *file)
 	{"i915_dp_test_type", &i915_displayport_test_type_fops},
 	{"i915_dp_test_active", &i915_displayport_test_active_fops},
 	{"i915_guc_log_control", &i915_guc_log_control_fops},
-	{"i915_hpd_storm_ctl", &i915_hpd_storm_ctl_fops}
+	{"i915_hpd_storm_ctl", &i915_hpd_storm_ctl_fops},
+	{"i915_slice_enabled", &i915_slice_enabled_fops}
 };
 
 int i915_debugfs_register(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bb6fc1e..7455d43 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -852,6 +852,7 @@ struct sseu_dev_info {
 	u8 has_slice_pg:1;
 	u8 has_subslice_pg:1;
 	u8 has_eu_pg:1;
+	u8 slice_enabled;
 };
 
 static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 7d01dfe..2eee76b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -412,6 +412,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
 		gen9_sseu_info_init(dev_priv);
 
 	info->has_snoop = !info->has_llc;
+	info->sseu.slice_enabled = hweight8(info->sseu.slice_mask);
 
 	DRM_DEBUG_DRIVER("slice mask: %04x\n", info->sseu.slice_mask);
 	DRM_DEBUG_DRIVER("slice total: %u\n", hweight8(info->sseu.slice_mask));
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0dc1cc4..2a1b641 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1743,7 +1743,7 @@ int logical_xcs_ring_init(struct intel_engine_cs *engine)
 	*/
 	if (INTEL_INFO(dev_priv)->sseu.has_slice_pg) {
 		rpcs |= GEN8_RPCS_S_CNT_ENABLE;
-		rpcs |= hweight8(INTEL_INFO(dev_priv)->sseu.slice_mask) <<
+		rpcs |= INTEL_INFO(dev_priv)->sseu.slice_enabled <<
 			GEN8_RPCS_S_CNT_SHIFT;
 		rpcs |= GEN8_RPCS_ENABLE;
 	}
-- 
1.8.3.1

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[RFC 2/2] drm/i915/bdw: permit make_rpcs execution on BDW to enable slice shutdown

[Dmitry Rogozhkin]

BDW supports RCS slices powering on/off. To do that we need make_rpcs
executed on BDW to flash slices configuration.

Change-Id: Ia80b1be329bedc57cc61078ea18ecb3d2580c16a
Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
CC: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
CC: Zhipeng Gong <zhipeng.gong@intel.com>
CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
CC: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 2a1b641..bc650df 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1732,7 +1732,7 @@ int logical_xcs_ring_init(struct intel_engine_cs *engine)
 	 * No explicit RPCS request is needed to ensure full
 	 * slice/subslice/EU enablement prior to Gen9.
 	*/
-	if (INTEL_GEN(dev_priv) < 9)
+	if (INTEL_GEN(dev_priv) < 8)
 		return 0;
 
 	/*
-- 
1.8.3.1

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✓ Fi.CI.BAT: success for slice shutdown debugfs interface for Gen8/Gen9

[Patchwork]

== Series Details ==

Series: slice shutdown debugfs interface for Gen8/Gen9
URL   : https://patchwork.freedesktop.org/series/22705/
State : success

== Summary ==

Series 22705v1 slice shutdown debugfs interface for Gen8/Gen9
https://patchwork.freedesktop.org/api/1.0/series/22705/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:433s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:424s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:583s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:511s
fi-bxt-t5700     total:278  pass:258  dwarn:0   dfail:0   fail:0   skip:20  time:546s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:485s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:478s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:414s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:409s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time:424s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:491s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:469s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:456s
fi-kbl-7560u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:563s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:447s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time:573s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:463s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:496s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:434s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:527s
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29  time:406s

2d286312feebdb0f9957929732e228dab644ef7a drm-tip: 2017y-04m-07d-20h-20m-46s UTC integration manifest
a571c17 drm/i915/bdw: permit make_rpcs execution on BDW to enable slice shutdown
910c4ce drm/i915/skl: add slice shutdown debugfs interface

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4450/
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Re: [RFC 0/2] slice shutdown debugfs interface for Gen8/Gen9

[Chris Wilson]

On Fri, Apr 07, 2017 at 06:55:27AM -0700, Dmitry Rogozhkin wrote:
> Starting from Gen8 HW supports dynamic power on/off slices. This
> permits to free power budget and may dramatically affect performance.
> This patch series suggests an interface (debugfs) to permit user to
> setup number of active slices. Interface can be used in performance
> investigations targeting scalability across hw platforms.
> 
> Dmitry Rogozhkin (2):
>   drm/i915/skl: add slice shutdown debugfs interface
>   drm/i915/bdw: permit make_rpcs execution on BDW to enable slice
>     shutdown

Lgtm, but I haven't used the slices extensively myself so I'd like a
second opinion on whether this is valid (that we can program the slices
to an arbitrary value). And if so, is there any reason why userspace
wouldn't want to be able to select its own slices?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Re: [RFC 2/2] drm/i915/bdw: permit make_rpcs execution on BDW to enable slice shutdown

[Joonas Lahtinen]

On pe, 2017-04-07 at 06:55 -0700, Dmitry Rogozhkin wrote:
> BDW supports RCS slices powering on/off. To do that we need make_rpcs
> executed on BDW to flash slices configuration.
> 
> Change-Id: Ia80b1be329bedc57cc61078ea18ecb3d2580c16a
> Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
> CC: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> CC: Zhipeng Gong <zhipeng.gong@intel.com>
> CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> CC: Chris Wilson <chris@chris-wilson.co.uk>

Maybe this patch should get rid of the "!IS_SKYLAKE(dev_priv)"
restriction in the setter function, too?

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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