* [PATCH] ARM: dts: silk: Enable UHS-I SDR-50
@ 2017-04-26 8:00 ` Simon Horman
0 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2017-04-26 8:00 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Wolfram Sang, Simon Horman
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
* Compile tested only; no access to silk board
v3
* Added missing pinctrl-1 to sdhi0
v2
* Correct mangled addition of sdhi*_pins
---
arch/arm/boot/dts/r8a7794-silk.dts | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 4cb5278d104d..8b416c385df7 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -196,6 +196,13 @@
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
+ power-source = <3300>;
+ };
+
+ sdhi1_pins_uhs: sd1_uhs {
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
+ power-source = <1800>;
};
qspi_pins: qspi {
@@ -338,11 +345,13 @@
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
- pinctrl-names = "default";
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi1>;
vqmmc-supply = <&vccq_sdhi1>;
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr50;
status = "okay";
};
--
2.12.2.816.g2cccc81164
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH] ARM: dts: silk: Enable UHS-I SDR-50
@ 2017-04-26 8:00 ` Simon Horman
0 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2017-04-26 8:00 UTC (permalink / raw)
To: linux-arm-kernel
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
* Compile tested only; no access to silk board
v3
* Added missing pinctrl-1 to sdhi0
v2
* Correct mangled addition of sdhi*_pins
---
arch/arm/boot/dts/r8a7794-silk.dts | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 4cb5278d104d..8b416c385df7 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -196,6 +196,13 @@
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
+ power-source = <3300>;
+ };
+
+ sdhi1_pins_uhs: sd1_uhs {
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
+ power-source = <1800>;
};
qspi_pins: qspi {
@@ -338,11 +345,13 @@
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
- pinctrl-names = "default";
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi1>;
vqmmc-supply = <&vccq_sdhi1>;
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr50;
status = "okay";
};
--
2.12.2.816.g2cccc81164
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH/RFT v3 renesas-devel] ARM: dts: silk: Enable UHS-I SDR-50
2017-04-26 8:00 ` Simon Horman
@ 2017-04-26 8:13 ` Simon Horman
-1 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2017-04-26 8:13 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Wolfram Sang, Simon Horman
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
* Prepared on top of renesas-devel-20170424-v4.11-rc8
* Compile tested only; no access to silk board
v3
* Added missing pinctrl-1 to sdhi0
v2
* Correct mangled addition of sdhi*_pins
---
arch/arm/boot/dts/r8a7794-silk.dts | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 4cb5278d104d..8b416c385df7 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -196,6 +196,13 @@
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
+ power-source = <3300>;
+ };
+
+ sdhi1_pins_uhs: sd1_uhs {
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
+ power-source = <1800>;
};
qspi_pins: qspi {
@@ -338,11 +345,13 @@
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
- pinctrl-names = "default";
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi1>;
vqmmc-supply = <&vccq_sdhi1>;
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr50;
status = "okay";
};
--
2.12.2.816.g2cccc81164
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH/RFT v3 renesas-devel] ARM: dts: silk: Enable UHS-I SDR-50
@ 2017-04-26 8:13 ` Simon Horman
0 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2017-04-26 8:13 UTC (permalink / raw)
To: linux-arm-kernel
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI1.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
* Prepared on top of renesas-devel-20170424-v4.11-rc8
* Compile tested only; no access to silk board
v3
* Added missing pinctrl-1 to sdhi0
v2
* Correct mangled addition of sdhi*_pins
---
arch/arm/boot/dts/r8a7794-silk.dts | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 4cb5278d104d..8b416c385df7 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -196,6 +196,13 @@
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
+ power-source = <3300>;
+ };
+
+ sdhi1_pins_uhs: sd1_uhs {
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
+ power-source = <1800>;
};
qspi_pins: qspi {
@@ -338,11 +345,13 @@
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
- pinctrl-names = "default";
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi1>;
vqmmc-supply = <&vccq_sdhi1>;
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr50;
status = "okay";
};
--
2.12.2.816.g2cccc81164
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH/RFT v3 renesas-devel] ARM: dts: silk: Enable UHS-I SDR-50
2017-04-26 8:13 ` Simon Horman
@ 2017-05-02 8:22 ` Wolfram Sang
-1 siblings, 0 replies; 8+ messages in thread
From: Wolfram Sang @ 2017-05-02 8:22 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
[-- Attachment #1: Type: text/plain, Size: 343 bytes --]
> + sdhi1_pins_uhs: sd1_uhs {
> + groups = "sdhi1_data4", "sdhi1_ctrl";
> + function = "sdhi1";
> + power-source = <1800>;
> };
>
> qspi_pins: qspi {
> @@ -338,11 +345,13 @@
>
> &sdhi1 {
> pinctrl-0 = <&sdhi1_pins>;
> - pinctrl-names = "default";
> + pinctrl-1 = <&sdhi0_pins_uhs>;
This must be sdhi1_pins_uhs.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH/RFT v3 renesas-devel] ARM: dts: silk: Enable UHS-I SDR-50
@ 2017-05-02 8:22 ` Wolfram Sang
0 siblings, 0 replies; 8+ messages in thread
From: Wolfram Sang @ 2017-05-02 8:22 UTC (permalink / raw)
To: linux-arm-kernel
> + sdhi1_pins_uhs: sd1_uhs {
> + groups = "sdhi1_data4", "sdhi1_ctrl";
> + function = "sdhi1";
> + power-source = <1800>;
> };
>
> qspi_pins: qspi {
> @@ -338,11 +345,13 @@
>
> &sdhi1 {
> pinctrl-0 = <&sdhi1_pins>;
> - pinctrl-names = "default";
> + pinctrl-1 = <&sdhi0_pins_uhs>;
This must be sdhi1_pins_uhs.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170502/e273ac36/attachment.sig>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH/RFT v3 renesas-devel] ARM: dts: silk: Enable UHS-I SDR-50
2017-05-02 8:22 ` Wolfram Sang
@ 2017-05-02 8:36 ` Simon Horman
-1 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2017-05-02 8:36 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
On Tue, May 02, 2017 at 10:22:47AM +0200, Wolfram Sang wrote:
> > + sdhi1_pins_uhs: sd1_uhs {
> > + groups = "sdhi1_data4", "sdhi1_ctrl";
> > + function = "sdhi1";
> > + power-source = <1800>;
> > };
> >
> > qspi_pins: qspi {
> > @@ -338,11 +345,13 @@
> >
> > &sdhi1 {
> > pinctrl-0 = <&sdhi1_pins>;
> > - pinctrl-names = "default";
> > + pinctrl-1 = <&sdhi0_pins_uhs>;
>
> This must be sdhi1_pins_uhs.
Thanks, will fix.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH/RFT v3 renesas-devel] ARM: dts: silk: Enable UHS-I SDR-50
@ 2017-05-02 8:36 ` Simon Horman
0 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2017-05-02 8:36 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, May 02, 2017 at 10:22:47AM +0200, Wolfram Sang wrote:
> > + sdhi1_pins_uhs: sd1_uhs {
> > + groups = "sdhi1_data4", "sdhi1_ctrl";
> > + function = "sdhi1";
> > + power-source = <1800>;
> > };
> >
> > qspi_pins: qspi {
> > @@ -338,11 +345,13 @@
> >
> > &sdhi1 {
> > pinctrl-0 = <&sdhi1_pins>;
> > - pinctrl-names = "default";
> > + pinctrl-1 = <&sdhi0_pins_uhs>;
>
> This must be sdhi1_pins_uhs.
Thanks, will fix.
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-05-02 8:36 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-04-26 8:00 [PATCH] ARM: dts: silk: Enable UHS-I SDR-50 Simon Horman
2017-04-26 8:00 ` Simon Horman
2017-04-26 8:13 ` [PATCH/RFT v3 renesas-devel] " Simon Horman
2017-04-26 8:13 ` Simon Horman
2017-05-02 8:22 ` Wolfram Sang
2017-05-02 8:22 ` Wolfram Sang
2017-05-02 8:36 ` Simon Horman
2017-05-02 8:36 ` Simon Horman
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.