* [PATCH] mtd: nand: davinci: set ECC algorithm explicitly for HW based ECC
@ 2017-05-02 9:47 Alexander Couzens
2017-05-15 19:34 ` Boris Brezillon
0 siblings, 1 reply; 2+ messages in thread
From: Alexander Couzens @ 2017-05-02 9:47 UTC (permalink / raw)
To: linux-mtd; +Cc: Boris Brezillon, Richard Weinberger, Alexander Couzens
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
---
drivers/mtd/nand/davinci_nand.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 27fa8b87cd5f..f658948ec7e3 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -760,11 +760,14 @@ static int nand_davinci_probe(struct platform_device *pdev)
info->chip.ecc.hwctl = nand_davinci_hwctl_4bit;
info->chip.ecc.bytes = 10;
info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
+ info->chip.ecc.algo = NAND_ECC_BCH;
} else {
+ /* 1bit ecc hamming */
info->chip.ecc.calculate = nand_davinci_calculate_1bit;
info->chip.ecc.correct = nand_davinci_correct_1bit;
info->chip.ecc.hwctl = nand_davinci_hwctl_1bit;
info->chip.ecc.bytes = 3;
+ info->chip.ecc.algo = NAND_ECC_HAMMING;
}
info->chip.ecc.size = 512;
info->chip.ecc.strength = pdata->ecc_bits;
--
2.12.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] mtd: nand: davinci: set ECC algorithm explicitly for HW based ECC
2017-05-02 9:47 [PATCH] mtd: nand: davinci: set ECC algorithm explicitly for HW based ECC Alexander Couzens
@ 2017-05-15 19:34 ` Boris Brezillon
0 siblings, 0 replies; 2+ messages in thread
From: Boris Brezillon @ 2017-05-15 19:34 UTC (permalink / raw)
To: Alexander Couzens; +Cc: linux-mtd, Richard Weinberger
On Tue, 2 May 2017 11:47:36 +0200
Alexander Couzens <lynxis@fe80.eu> wrote:
> Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Applied to nand/next
> ---
> drivers/mtd/nand/davinci_nand.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
> index 27fa8b87cd5f..f658948ec7e3 100644
> --- a/drivers/mtd/nand/davinci_nand.c
> +++ b/drivers/mtd/nand/davinci_nand.c
> @@ -760,11 +760,14 @@ static int nand_davinci_probe(struct platform_device *pdev)
> info->chip.ecc.hwctl = nand_davinci_hwctl_4bit;
> info->chip.ecc.bytes = 10;
> info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
> + info->chip.ecc.algo = NAND_ECC_BCH;
> } else {
> + /* 1bit ecc hamming */
> info->chip.ecc.calculate = nand_davinci_calculate_1bit;
> info->chip.ecc.correct = nand_davinci_correct_1bit;
> info->chip.ecc.hwctl = nand_davinci_hwctl_1bit;
> info->chip.ecc.bytes = 3;
> + info->chip.ecc.algo = NAND_ECC_HAMMING;
> }
> info->chip.ecc.size = 512;
> info->chip.ecc.strength = pdata->ecc_bits;
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2017-05-15 19:35 UTC | newest]
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2017-05-02 9:47 [PATCH] mtd: nand: davinci: set ECC algorithm explicitly for HW based ECC Alexander Couzens
2017-05-15 19:34 ` Boris Brezillon
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