* [PATCH] gpu: ipu-v3: prg: remove counter load enable
@ 2017-05-03 16:16 Lucas Stach
2017-05-04 6:43 ` Philipp Zabel
0 siblings, 1 reply; 2+ messages in thread
From: Lucas Stach @ 2017-05-03 16:16 UTC (permalink / raw)
To: Philipp Zabel; +Cc: kernel, dri-devel, patchwork-lst
The counter load enable bit has no effect when the shadow register
set is activated. As we always operate the PRG with shadow enabled
it is safe to remove this.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/gpu/ipu-v3/ipu-prg.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-prg.c b/drivers/gpu/ipu-v3/ipu-prg.c
index caca57febbd6..ecc9ea44dc50 100644
--- a/drivers/gpu/ipu-v3/ipu-prg.c
+++ b/drivers/gpu/ipu-v3/ipu-prg.c
@@ -318,8 +318,6 @@ int ipu_prg_channel_configure(struct ipuv3_channel *ipu_chan,
writel(val, prg->regs + IPU_PRG_BADDR(prg_chan));
val = readl(prg->regs + IPU_PRG_CTL);
- /* counter load enable */
- val |= IPU_PRG_CTL_CNT_LOAD_EN(prg_chan);
/* config AXI ID */
val &= ~(IPU_PRG_CTL_SOFT_ARID_MASK <<
IPU_PRG_CTL_SOFT_ARID_SHIFT(prg_chan));
--
2.11.0
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] gpu: ipu-v3: prg: remove counter load enable
2017-05-03 16:16 [PATCH] gpu: ipu-v3: prg: remove counter load enable Lucas Stach
@ 2017-05-04 6:43 ` Philipp Zabel
0 siblings, 0 replies; 2+ messages in thread
From: Philipp Zabel @ 2017-05-04 6:43 UTC (permalink / raw)
To: Lucas Stach; +Cc: kernel, dri-devel, patchwork-lst
On Wed, 2017-05-03 at 18:16 +0200, Lucas Stach wrote:
> The counter load enable bit has no effect when the shadow register
> set is activated. As we always operate the PRG with shadow enabled
> it is safe to remove this.
>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/gpu/ipu-v3/ipu-prg.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/ipu-v3/ipu-prg.c b/drivers/gpu/ipu-v3/ipu-prg.c
> index caca57febbd6..ecc9ea44dc50 100644
> --- a/drivers/gpu/ipu-v3/ipu-prg.c
> +++ b/drivers/gpu/ipu-v3/ipu-prg.c
> @@ -318,8 +318,6 @@ int ipu_prg_channel_configure(struct ipuv3_channel *ipu_chan,
> writel(val, prg->regs + IPU_PRG_BADDR(prg_chan));
>
> val = readl(prg->regs + IPU_PRG_CTL);
> - /* counter load enable */
> - val |= IPU_PRG_CTL_CNT_LOAD_EN(prg_chan);
> /* config AXI ID */
> val &= ~(IPU_PRG_CTL_SOFT_ARID_MASK <<
> IPU_PRG_CTL_SOFT_ARID_SHIFT(prg_chan));
Applied to imx-drm/next, thanks.
regards
Philipp
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