* [v2] rasdaemon: add Knights Mill model
@ 2017-05-04 18:02 Aristeu Rozanski
0 siblings, 0 replies; 2+ messages in thread
From: Aristeu Rozanski @ 2017-05-04 18:02 UTC (permalink / raw)
To: linux-edac; +Cc: mchehab
Knights Mill is similar to Knights Landing and can use the same code.
v2: don't reuse too much and identify the processor as "Knights Mill"
Signed-off-by: Aristeu Rozanski <aris@redhat.com>
---
To unsubscribe from this list: send the line "unsubscribe linux-edac" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/mce-intel.c b/mce-intel.c
index bf68d9b..f70c676 100644
--- a/mce-intel.c
+++ b/mce-intel.c
@@ -399,6 +399,7 @@ int parse_intel_event(struct ras_events *ras, struct mce_event *e)
hsw_decode_model(ras, e);
break;
case CPU_KNIGHTS_LANDING:
+ case CPU_KNIGHTS_MILL:
knl_decode_model(ras, e);
break;
case CPU_BROADWELL_DE:
@@ -471,6 +472,7 @@ int set_intel_imc_log(enum cputype cputype, unsigned ncpus)
case CPU_IVY_BRIDGE_EPEX:
case CPU_HASWELL_EPEX:
case CPU_KNIGHTS_LANDING:
+ case CPU_KNIGHTS_MILL:
msr = 0x17f; /* MSR_ERROR_CONTROL */
bit = 0x2; /* MemError Log Enable */
break;
diff --git a/ras-mce-handler.c b/ras-mce-handler.c
index b875512..2e520d3 100644
--- a/ras-mce-handler.c
+++ b/ras-mce-handler.c
@@ -53,6 +53,7 @@ static char *cputype_name[] = {
[CPU_BROADWELL_DE] = "Broadwell DE",
[CPU_BROADWELL_EPEX] = "Broadwell EP/EX",
[CPU_KNIGHTS_LANDING] = "Knights Landing",
+ [CPU_KNIGHTS_MILL] = "Knights Mill",
};
static enum cputype select_intel_cputype(struct ras_events *ras)
@@ -100,6 +101,8 @@ static enum cputype select_intel_cputype(struct ras_events *ras)
return CPU_BROADWELL;
else if (mce->model == 0x57)
return CPU_KNIGHTS_LANDING;
+ else if (mce->model == 0x85)
+ return CPU_KNIGHTS_MILL;
if (mce->model > 0x1a) {
log(ALL, LOG_INFO,
@@ -229,6 +232,7 @@ int register_mce_handler(struct ras_events *ras, unsigned ncpus)
case CPU_IVY_BRIDGE_EPEX:
case CPU_HASWELL_EPEX:
case CPU_KNIGHTS_LANDING:
+ case CPU_KNIGHTS_MILL:
set_intel_imc_log(mce->cputype, ncpus);
default:
break;
diff --git a/ras-mce-handler.h b/ras-mce-handler.h
index c5a3717..77effc9 100644
--- a/ras-mce-handler.h
+++ b/ras-mce-handler.h
@@ -48,6 +48,7 @@ enum cputype {
CPU_BROADWELL_DE,
CPU_BROADWELL_EPEX,
CPU_KNIGHTS_LANDING,
+ CPU_KNIGHTS_MILL,
};
struct mce_event {
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [v2] rasdaemon: add Knights Mill model
@ 2017-06-08 9:23 Mauro Carvalho Chehab
0 siblings, 0 replies; 2+ messages in thread
From: Mauro Carvalho Chehab @ 2017-06-08 9:23 UTC (permalink / raw)
To: Aristeu Rozanski; +Cc: linux-edac
Em Thu, 4 May 2017 14:02:53 -0400
Aristeu Rozanski <aris@redhat.com> escreveu:
> Knights Mill is similar to Knights Landing and can use the same code.
>
> v2: don't reuse too much and identify the processor as "Knights Mill"
>
> Signed-off-by: Aristeu Rozanski <aris@redhat.com>
Applied. Thanks,
Mauro
---
To unsubscribe from this list: send the line "unsubscribe linux-edac" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2017-06-08 9:23 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-05-04 18:02 [v2] rasdaemon: add Knights Mill model Aristeu Rozanski
2017-06-08 9:23 Mauro Carvalho Chehab
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.