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* [PATCH 1/2] drm/i915: Move uncore definitions into a separate header
@ 2017-05-09  7:36 Michal Wajdeczko
  2017-05-09  7:36 ` [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive Michal Wajdeczko
                   ` (4 more replies)
  0 siblings, 5 replies; 12+ messages in thread
From: Michal Wajdeczko @ 2017-05-09  7:36 UTC (permalink / raw)
  To: intel-gfx

In order to allow use of e.g. forcewake_domains in a other feature headers
included from the top of i915_drv.h, move all uncore related definitions
into their own header.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h     | 157 +-------------------------------
 drivers/gpu/drm/i915/intel_uncore.c |  12 +++
 drivers/gpu/drm/i915/intel_uncore.h | 175 ++++++++++++++++++++++++++++++++++++
 3 files changed, 188 insertions(+), 156 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_uncore.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b20ed16..29a6966 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -55,6 +55,7 @@
 #include "i915_reg.h"
 #include "i915_utils.h"
 
+#include "intel_uncore.h"
 #include "intel_bios.h"
 #include "intel_dpll_mgr.h"
 #include "intel_uc.h"
@@ -676,116 +677,6 @@ struct drm_i915_display_funcs {
 	void (*load_luts)(struct drm_crtc_state *crtc_state);
 };
 
-enum forcewake_domain_id {
-	FW_DOMAIN_ID_RENDER = 0,
-	FW_DOMAIN_ID_BLITTER,
-	FW_DOMAIN_ID_MEDIA,
-
-	FW_DOMAIN_ID_COUNT
-};
-
-enum forcewake_domains {
-	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
-	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
-	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
-	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
-			 FORCEWAKE_BLITTER |
-			 FORCEWAKE_MEDIA)
-};
-
-#define FW_REG_READ  (1)
-#define FW_REG_WRITE (2)
-
-enum decoupled_power_domain {
-	GEN9_DECOUPLED_PD_BLITTER = 0,
-	GEN9_DECOUPLED_PD_RENDER,
-	GEN9_DECOUPLED_PD_MEDIA,
-	GEN9_DECOUPLED_PD_ALL
-};
-
-enum decoupled_ops {
-	GEN9_DECOUPLED_OP_WRITE = 0,
-	GEN9_DECOUPLED_OP_READ
-};
-
-enum forcewake_domains
-intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
-			       i915_reg_t reg, unsigned int op);
-
-struct intel_uncore_funcs {
-	void (*force_wake_get)(struct drm_i915_private *dev_priv,
-			       enum forcewake_domains domains);
-	void (*force_wake_put)(struct drm_i915_private *dev_priv,
-			       enum forcewake_domains domains);
-
-	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
-			       i915_reg_t r, bool trace);
-	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
-			       i915_reg_t r, bool trace);
-	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
-			       i915_reg_t r, bool trace);
-	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
-			       i915_reg_t r, bool trace);
-
-	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
-			    i915_reg_t r, uint8_t val, bool trace);
-	void (*mmio_writew)(struct drm_i915_private *dev_priv,
-			    i915_reg_t r, uint16_t val, bool trace);
-	void (*mmio_writel)(struct drm_i915_private *dev_priv,
-			    i915_reg_t r, uint32_t val, bool trace);
-};
-
-struct intel_forcewake_range {
-	u32 start;
-	u32 end;
-
-	enum forcewake_domains domains;
-};
-
-struct intel_uncore {
-	spinlock_t lock; /** lock is also taken in irq contexts. */
-
-	const struct intel_forcewake_range *fw_domains_table;
-	unsigned int fw_domains_table_entries;
-
-	struct notifier_block pmic_bus_access_nb;
-	struct intel_uncore_funcs funcs;
-
-	unsigned fifo_count;
-
-	enum forcewake_domains fw_domains;
-	enum forcewake_domains fw_domains_active;
-
-	u32 fw_set;
-	u32 fw_clear;
-	u32 fw_reset;
-
-	struct intel_uncore_forcewake_domain {
-		enum forcewake_domain_id id;
-		enum forcewake_domains mask;
-		unsigned wake_count;
-		struct hrtimer timer;
-		i915_reg_t reg_set;
-		i915_reg_t reg_ack;
-	} fw_domain[FW_DOMAIN_ID_COUNT];
-
-	int unclaimed_mmio_check;
-};
-
-#define __mask_next_bit(mask) ({					\
-	int __idx = ffs(mask) - 1;					\
-	mask &= ~BIT(__idx);						\
-	__idx;								\
-})
-
-/* Iterate over initialised fw domains */
-#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
-	for (tmp__ = (mask__); \
-	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
-
-#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
-	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
-
 #define CSR_VERSION(major, minor)	((major) << 16 | (minor))
 #define CSR_VERSION_MAJOR(version)	((version) >> 16)
 #define CSR_VERSION_MINOR(version)	((version) & 0xffff)
@@ -3063,52 +2954,6 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv);
 int intel_irq_install(struct drm_i915_private *dev_priv);
 void intel_irq_uninstall(struct drm_i915_private *dev_priv);
 
-extern void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
-extern void intel_uncore_init(struct drm_i915_private *dev_priv);
-extern bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
-extern bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
-extern void intel_uncore_fini(struct drm_i915_private *dev_priv);
-extern void intel_uncore_suspend(struct drm_i915_private *dev_priv);
-extern void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
-const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
-void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
-				enum forcewake_domains domains);
-void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
-				enum forcewake_domains domains);
-/* Like above but the caller must manage the uncore.lock itself.
- * Must be used with I915_READ_FW and friends.
- */
-void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
-					enum forcewake_domains domains);
-void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
-					enum forcewake_domains domains);
-u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
-
-void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
-
-int intel_wait_for_register(struct drm_i915_private *dev_priv,
-			    i915_reg_t reg,
-			    u32 mask,
-			    u32 value,
-			    unsigned int timeout_ms);
-int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
-				 i915_reg_t reg,
-				 u32 mask,
-				 u32 value,
-				 unsigned int fast_timeout_us,
-				 unsigned int slow_timeout_ms,
-				 u32 *out_value);
-static inline
-int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
-			       i915_reg_t reg,
-			       u32 mask,
-			       u32 value,
-			       unsigned int timeout_ms)
-{
-	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
-					    2, timeout_ms, NULL);
-}
-
 static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
 {
 	return dev_priv->gvt;
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index aa9d306..2c628df 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -801,6 +801,18 @@ unclaimed_reg_debug(struct drm_i915_private *dev_priv,
 	__unclaimed_reg_debug(dev_priv, reg, read, before);
 }
 
+enum decoupled_power_domain {
+	GEN9_DECOUPLED_PD_BLITTER = 0,
+	GEN9_DECOUPLED_PD_RENDER,
+	GEN9_DECOUPLED_PD_MEDIA,
+	GEN9_DECOUPLED_PD_ALL
+};
+
+enum decoupled_ops {
+	GEN9_DECOUPLED_OP_WRITE = 0,
+	GEN9_DECOUPLED_OP_READ
+};
+
 static const enum decoupled_power_domain fw2dpd_domain[] = {
 	GEN9_DECOUPLED_PD_RENDER,
 	GEN9_DECOUPLED_PD_BLITTER,
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
new file mode 100644
index 0000000..cced6b7
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -0,0 +1,175 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __INTEL_UNCORE_H__
+#define __INTEL_UNCORE_H__
+
+struct drm_i915_private;
+
+enum forcewake_domain_id {
+	FW_DOMAIN_ID_RENDER = 0,
+	FW_DOMAIN_ID_BLITTER,
+	FW_DOMAIN_ID_MEDIA,
+
+	FW_DOMAIN_ID_COUNT
+};
+
+enum forcewake_domains {
+	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
+	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
+	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
+	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
+			 FORCEWAKE_BLITTER |
+			 FORCEWAKE_MEDIA)
+};
+
+struct intel_uncore_funcs {
+	void (*force_wake_get)(struct drm_i915_private *dev_priv,
+			       enum forcewake_domains domains);
+	void (*force_wake_put)(struct drm_i915_private *dev_priv,
+			       enum forcewake_domains domains);
+
+	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
+			       i915_reg_t r, bool trace);
+	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
+			       i915_reg_t r, bool trace);
+	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
+			       i915_reg_t r, bool trace);
+	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
+			       i915_reg_t r, bool trace);
+
+	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
+			    i915_reg_t r, uint8_t val, bool trace);
+	void (*mmio_writew)(struct drm_i915_private *dev_priv,
+			    i915_reg_t r, uint16_t val, bool trace);
+	void (*mmio_writel)(struct drm_i915_private *dev_priv,
+			    i915_reg_t r, uint32_t val, bool trace);
+};
+
+struct intel_forcewake_range {
+	u32 start;
+	u32 end;
+
+	enum forcewake_domains domains;
+};
+
+struct intel_uncore {
+	spinlock_t lock; /** lock is also taken in irq contexts. */
+
+	const struct intel_forcewake_range *fw_domains_table;
+	unsigned int fw_domains_table_entries;
+
+	struct notifier_block pmic_bus_access_nb;
+	struct intel_uncore_funcs funcs;
+
+	unsigned int fifo_count;
+
+	enum forcewake_domains fw_domains;
+	enum forcewake_domains fw_domains_active;
+
+	u32 fw_set;
+	u32 fw_clear;
+	u32 fw_reset;
+
+	struct intel_uncore_forcewake_domain {
+		enum forcewake_domain_id id;
+		enum forcewake_domains mask;
+		unsigned int wake_count;
+		struct hrtimer timer;
+		i915_reg_t reg_set;
+		i915_reg_t reg_ack;
+	} fw_domain[FW_DOMAIN_ID_COUNT];
+
+	int unclaimed_mmio_check;
+};
+
+#define __mask_next_bit(mask) ({					\
+	int __idx = ffs(mask) - 1;					\
+	mask &= ~BIT(__idx);						\
+	__idx;								\
+})
+
+/* Iterate over initialised fw domains */
+#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
+	for (tmp__ = (mask__); \
+	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
+
+#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
+	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
+
+
+void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
+void intel_uncore_init(struct drm_i915_private *dev_priv);
+bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
+bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
+void intel_uncore_fini(struct drm_i915_private *dev_priv);
+void intel_uncore_suspend(struct drm_i915_private *dev_priv);
+void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
+
+u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
+void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
+const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
+
+enum forcewake_domains
+intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
+			       i915_reg_t reg, unsigned int op);
+#define FW_REG_READ  (1)
+#define FW_REG_WRITE (2)
+
+void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
+				enum forcewake_domains domains);
+void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
+				enum forcewake_domains domains);
+/* Like above but the caller must manage the uncore.lock itself.
+ * Must be used with I915_READ_FW and friends.
+ */
+void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
+					enum forcewake_domains domains);
+void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
+					enum forcewake_domains domains);
+
+int intel_wait_for_register(struct drm_i915_private *dev_priv,
+			    i915_reg_t reg,
+			    u32 mask,
+			    u32 value,
+			    unsigned int timeout_ms);
+int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
+				 i915_reg_t reg,
+				 u32 mask,
+				 u32 value,
+				 unsigned int fast_timeout_us,
+				 unsigned int slow_timeout_ms,
+				 u32 *out_value);
+static inline
+int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
+			       i915_reg_t reg,
+			       u32 mask,
+			       u32 value,
+			       unsigned int timeout_ms)
+{
+	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
+					    2, timeout_ms, NULL);
+}
+
+#endif /* !__INTEL_UNCORE_H__ */
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive
  2017-05-09  7:36 [PATCH 1/2] drm/i915: Move uncore definitions into a separate header Michal Wajdeczko
@ 2017-05-09  7:36 ` Michal Wajdeczko
  2017-05-09  8:53   ` Mika Kuoppala
  2017-05-09 10:09   ` Chris Wilson
  2017-05-09  7:55 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move uncore definitions into a separate header Patchwork
                   ` (3 subsequent siblings)
  4 siblings, 2 replies; 12+ messages in thread
From: Michal Wajdeczko @ 2017-05-09  7:36 UTC (permalink / raw)
  To: intel-gfx

All other functions related to uncore start with intel_uncore prefix.
Follow that pattern.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c     | 2 +-
 drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
 drivers/gpu/drm/i915/intel_uncore.h | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 72fb47a..4a3cb11 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2432,7 +2432,7 @@ static int intel_runtime_suspend(struct device *kdev)
 		intel_opregion_notify_adapter(dev_priv, PCI_D1);
 	}
 
-	assert_forcewakes_inactive(dev_priv);
+	intel_uncore_assert_forcewakes_inactive(dev_priv);
 
 	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
 		intel_hpd_poll_init(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 2c628df..b5ded2c 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -287,7 +287,7 @@ static void intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv,
 	}
 
 	if (!restore)
-		assert_forcewakes_inactive(dev_priv);
+		intel_uncore_assert_forcewakes_inactive(dev_priv);
 
 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
 }
@@ -565,7 +565,7 @@ void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
 	__intel_uncore_forcewake_put(dev_priv, fw_domains);
 }
 
-void assert_forcewakes_inactive(struct drm_i915_private *dev_priv)
+void intel_uncore_assert_forcewakes_inactive(struct drm_i915_private *dev_priv)
 {
 	if (!dev_priv->uncore.funcs.force_wake_get)
 		return;
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index cced6b7..35fcdfb 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -128,7 +128,7 @@ void intel_uncore_suspend(struct drm_i915_private *dev_priv);
 void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
 
 u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
-void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
+void intel_uncore_assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
 const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
 
 enum forcewake_domains
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move uncore definitions into a separate header
  2017-05-09  7:36 [PATCH 1/2] drm/i915: Move uncore definitions into a separate header Michal Wajdeczko
  2017-05-09  7:36 ` [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive Michal Wajdeczko
@ 2017-05-09  7:55 ` Patchwork
  2017-05-09  9:00 ` [PATCH 1/2] " Mika Kuoppala
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2017-05-09  7:55 UTC (permalink / raw)
  To: Michal Wajdeczko; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Move uncore definitions into a separate header
URL   : https://patchwork.freedesktop.org/series/24161/
State : success

== Summary ==

Series 24161v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/24161/revisions/1/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                pass       -> FAIL       (fi-snb-2600) fdo#100007
Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                pass       -> DMESG-WARN (fi-kbl-7560u) fdo#100125
Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                dmesg-warn -> PASS       (fi-byt-j1900) fdo#100652

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fdo#100652 https://bugs.freedesktop.org/show_bug.cgi?id=100652

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:433s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:425s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:580s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:504s
fi-bxt-t5700     total:278  pass:258  dwarn:0   dfail:0   fail:0   skip:20  time:530s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:485s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:482s
fi-elk-e7500     total:278  pass:229  dwarn:0   dfail:0   fail:0   skip:49  time:418s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:411s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:402s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time:417s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:482s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:464s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:461s
fi-kbl-7560u     total:278  pass:267  dwarn:1   dfail:0   fail:0   skip:10  time:567s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:460s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time:566s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:455s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:489s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:436s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:530s
fi-snb-2600      total:278  pass:248  dwarn:0   dfail:0   fail:1   skip:29  time:400s

f558b185c57202d90bdb9059f3d446956cbae133 drm-tip: 2017y-05m-08d-16h-35m-28s UTC integration manifest
0eb5a84 drm/i915: Rename assert_forcewakes_inactive
7ccebe5 drm/i915: Move uncore definitions into a separate header

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4643/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive
  2017-05-09  7:36 ` [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive Michal Wajdeczko
@ 2017-05-09  8:53   ` Mika Kuoppala
  2017-05-09 10:09   ` Chris Wilson
  1 sibling, 0 replies; 12+ messages in thread
From: Mika Kuoppala @ 2017-05-09  8:53 UTC (permalink / raw)
  To: Michal Wajdeczko, intel-gfx

Michal Wajdeczko <michal.wajdeczko@intel.com> writes:

> All other functions related to uncore start with intel_uncore prefix.
> Follow that pattern.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.c     | 2 +-
>  drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
>  drivers/gpu/drm/i915/intel_uncore.h | 2 +-
>  3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 72fb47a..4a3cb11 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -2432,7 +2432,7 @@ static int intel_runtime_suspend(struct device *kdev)
>  		intel_opregion_notify_adapter(dev_priv, PCI_D1);
>  	}
>  
> -	assert_forcewakes_inactive(dev_priv);
> +	intel_uncore_assert_forcewakes_inactive(dev_priv);
>  
>  	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
>  		intel_hpd_poll_init(dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2c628df..b5ded2c 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -287,7 +287,7 @@ static void intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv,
>  	}
>  
>  	if (!restore)
> -		assert_forcewakes_inactive(dev_priv);
> +		intel_uncore_assert_forcewakes_inactive(dev_priv);
>  
>  	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
>  }
> @@ -565,7 +565,7 @@ void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
>  	__intel_uncore_forcewake_put(dev_priv, fw_domains);
>  }
>  
> -void assert_forcewakes_inactive(struct drm_i915_private *dev_priv)
> +void intel_uncore_assert_forcewakes_inactive(struct drm_i915_private *dev_priv)
>  {
>  	if (!dev_priv->uncore.funcs.force_wake_get)
>  		return;
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
> index cced6b7..35fcdfb 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.h
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -128,7 +128,7 @@ void intel_uncore_suspend(struct drm_i915_private *dev_priv);
>  void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
>  
>  u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
> -void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
> +void intel_uncore_assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
>  const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
>  
>  enum forcewake_domains
> -- 
> 2.7.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] drm/i915: Move uncore definitions into a separate header
  2017-05-09  7:36 [PATCH 1/2] drm/i915: Move uncore definitions into a separate header Michal Wajdeczko
  2017-05-09  7:36 ` [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive Michal Wajdeczko
  2017-05-09  7:55 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move uncore definitions into a separate header Patchwork
@ 2017-05-09  9:00 ` Mika Kuoppala
  2017-05-09  9:12   ` Michal Wajdeczko
  2017-05-09  9:20 ` [PATCH v2 " Michal Wajdeczko
  2017-05-09  9:48 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Move uncore definitions into a separate header (rev2) Patchwork
  4 siblings, 1 reply; 12+ messages in thread
From: Mika Kuoppala @ 2017-05-09  9:00 UTC (permalink / raw)
  To: Michal Wajdeczko, intel-gfx

Michal Wajdeczko <michal.wajdeczko@intel.com> writes:

> In order to allow use of e.g. forcewake_domains in a other feature headers
> included from the top of i915_drv.h, move all uncore related definitions
> into their own header.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h     | 157 +-------------------------------
>  drivers/gpu/drm/i915/intel_uncore.c |  12 +++
>  drivers/gpu/drm/i915/intel_uncore.h | 175 ++++++++++++++++++++++++++++++++++++
>  3 files changed, 188 insertions(+), 156 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_uncore.h
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index b20ed16..29a6966 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -55,6 +55,7 @@
>  #include "i915_reg.h"
>  #include "i915_utils.h"
>  
> +#include "intel_uncore.h"
>  #include "intel_bios.h"
>  #include "intel_dpll_mgr.h"
>  #include "intel_uc.h"
> @@ -676,116 +677,6 @@ struct drm_i915_display_funcs {
>  	void (*load_luts)(struct drm_crtc_state *crtc_state);
>  };
>  
> -enum forcewake_domain_id {
> -	FW_DOMAIN_ID_RENDER = 0,
> -	FW_DOMAIN_ID_BLITTER,
> -	FW_DOMAIN_ID_MEDIA,
> -
> -	FW_DOMAIN_ID_COUNT
> -};
> -
> -enum forcewake_domains {
> -	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
> -	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
> -	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
> -	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
> -			 FORCEWAKE_BLITTER |
> -			 FORCEWAKE_MEDIA)
> -};
> -
> -#define FW_REG_READ  (1)
> -#define FW_REG_WRITE (2)
> -
> -enum decoupled_power_domain {
> -	GEN9_DECOUPLED_PD_BLITTER = 0,
> -	GEN9_DECOUPLED_PD_RENDER,
> -	GEN9_DECOUPLED_PD_MEDIA,
> -	GEN9_DECOUPLED_PD_ALL
> -};
> -
> -enum decoupled_ops {
> -	GEN9_DECOUPLED_OP_WRITE = 0,
> -	GEN9_DECOUPLED_OP_READ
> -};
> -
> -enum forcewake_domains
> -intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
> -			       i915_reg_t reg, unsigned int op);
> -
> -struct intel_uncore_funcs {
> -	void (*force_wake_get)(struct drm_i915_private *dev_priv,
> -			       enum forcewake_domains domains);
> -	void (*force_wake_put)(struct drm_i915_private *dev_priv,
> -			       enum forcewake_domains domains);
> -
> -	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -
> -	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint8_t val, bool trace);
> -	void (*mmio_writew)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint16_t val, bool trace);
> -	void (*mmio_writel)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint32_t val, bool trace);
> -};
> -
> -struct intel_forcewake_range {
> -	u32 start;
> -	u32 end;
> -
> -	enum forcewake_domains domains;
> -};
> -
> -struct intel_uncore {
> -	spinlock_t lock; /** lock is also taken in irq contexts. */
> -
> -	const struct intel_forcewake_range *fw_domains_table;
> -	unsigned int fw_domains_table_entries;
> -
> -	struct notifier_block pmic_bus_access_nb;
> -	struct intel_uncore_funcs funcs;
> -
> -	unsigned fifo_count;
> -
> -	enum forcewake_domains fw_domains;
> -	enum forcewake_domains fw_domains_active;
> -
> -	u32 fw_set;
> -	u32 fw_clear;
> -	u32 fw_reset;
> -
> -	struct intel_uncore_forcewake_domain {
> -		enum forcewake_domain_id id;
> -		enum forcewake_domains mask;
> -		unsigned wake_count;
> -		struct hrtimer timer;
> -		i915_reg_t reg_set;
> -		i915_reg_t reg_ack;
> -	} fw_domain[FW_DOMAIN_ID_COUNT];
> -
> -	int unclaimed_mmio_check;
> -};
> -
> -#define __mask_next_bit(mask) ({					\
> -	int __idx = ffs(mask) - 1;					\
> -	mask &= ~BIT(__idx);						\
> -	__idx;								\
> -})
> -

for_each_engine_masked needs this macro too, so we should leave it to
 top level or i915_utils.h?
-Mika

> -/* Iterate over initialised fw domains */
> -#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
> -	for (tmp__ = (mask__); \
> -	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
> -
> -#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
> -	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
> -
>  #define CSR_VERSION(major, minor)	((major) << 16 | (minor))
>  #define CSR_VERSION_MAJOR(version)	((version) >> 16)
>  #define CSR_VERSION_MINOR(version)	((version) & 0xffff)
> @@ -3063,52 +2954,6 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv);
>  int intel_irq_install(struct drm_i915_private *dev_priv);
>  void intel_irq_uninstall(struct drm_i915_private *dev_priv);
>  
> -extern void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_init(struct drm_i915_private *dev_priv);
> -extern bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
> -extern bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_fini(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_suspend(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
> -const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
> -void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
> -				enum forcewake_domains domains);
> -void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
> -				enum forcewake_domains domains);
> -/* Like above but the caller must manage the uncore.lock itself.
> - * Must be used with I915_READ_FW and friends.
> - */
> -void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
> -					enum forcewake_domains domains);
> -void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
> -					enum forcewake_domains domains);
> -u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
> -
> -void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
> -
> -int intel_wait_for_register(struct drm_i915_private *dev_priv,
> -			    i915_reg_t reg,
> -			    u32 mask,
> -			    u32 value,
> -			    unsigned int timeout_ms);
> -int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> -				 i915_reg_t reg,
> -				 u32 mask,
> -				 u32 value,
> -				 unsigned int fast_timeout_us,
> -				 unsigned int slow_timeout_ms,
> -				 u32 *out_value);
> -static inline
> -int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> -			       i915_reg_t reg,
> -			       u32 mask,
> -			       u32 value,
> -			       unsigned int timeout_ms)
> -{
> -	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
> -					    2, timeout_ms, NULL);
> -}
> -
>  static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
>  {
>  	return dev_priv->gvt;
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index aa9d306..2c628df 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -801,6 +801,18 @@ unclaimed_reg_debug(struct drm_i915_private *dev_priv,
>  	__unclaimed_reg_debug(dev_priv, reg, read, before);
>  }
>  
> +enum decoupled_power_domain {
> +	GEN9_DECOUPLED_PD_BLITTER = 0,
> +	GEN9_DECOUPLED_PD_RENDER,
> +	GEN9_DECOUPLED_PD_MEDIA,
> +	GEN9_DECOUPLED_PD_ALL
> +};
> +
> +enum decoupled_ops {
> +	GEN9_DECOUPLED_OP_WRITE = 0,
> +	GEN9_DECOUPLED_OP_READ
> +};
> +
>  static const enum decoupled_power_domain fw2dpd_domain[] = {
>  	GEN9_DECOUPLED_PD_RENDER,
>  	GEN9_DECOUPLED_PD_BLITTER,
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
> new file mode 100644
> index 0000000..cced6b7
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -0,0 +1,175 @@
> +/*
> + * Copyright © 2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef __INTEL_UNCORE_H__
> +#define __INTEL_UNCORE_H__
> +
> +struct drm_i915_private;
> +
> +enum forcewake_domain_id {
> +	FW_DOMAIN_ID_RENDER = 0,
> +	FW_DOMAIN_ID_BLITTER,
> +	FW_DOMAIN_ID_MEDIA,
> +
> +	FW_DOMAIN_ID_COUNT
> +};
> +
> +enum forcewake_domains {
> +	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
> +	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
> +	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
> +	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
> +			 FORCEWAKE_BLITTER |
> +			 FORCEWAKE_MEDIA)
> +};
> +
> +struct intel_uncore_funcs {
> +	void (*force_wake_get)(struct drm_i915_private *dev_priv,
> +			       enum forcewake_domains domains);
> +	void (*force_wake_put)(struct drm_i915_private *dev_priv,
> +			       enum forcewake_domains domains);
> +
> +	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +
> +	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint8_t val, bool trace);
> +	void (*mmio_writew)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint16_t val, bool trace);
> +	void (*mmio_writel)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint32_t val, bool trace);
> +};
> +
> +struct intel_forcewake_range {
> +	u32 start;
> +	u32 end;
> +
> +	enum forcewake_domains domains;
> +};
> +
> +struct intel_uncore {
> +	spinlock_t lock; /** lock is also taken in irq contexts. */
> +
> +	const struct intel_forcewake_range *fw_domains_table;
> +	unsigned int fw_domains_table_entries;
> +
> +	struct notifier_block pmic_bus_access_nb;
> +	struct intel_uncore_funcs funcs;
> +
> +	unsigned int fifo_count;
> +
> +	enum forcewake_domains fw_domains;
> +	enum forcewake_domains fw_domains_active;
> +
> +	u32 fw_set;
> +	u32 fw_clear;
> +	u32 fw_reset;
> +
> +	struct intel_uncore_forcewake_domain {
> +		enum forcewake_domain_id id;
> +		enum forcewake_domains mask;
> +		unsigned int wake_count;
> +		struct hrtimer timer;
> +		i915_reg_t reg_set;
> +		i915_reg_t reg_ack;
> +	} fw_domain[FW_DOMAIN_ID_COUNT];
> +
> +	int unclaimed_mmio_check;
> +};
> +
> +#define __mask_next_bit(mask) ({					\
> +	int __idx = ffs(mask) - 1;					\
> +	mask &= ~BIT(__idx);						\
> +	__idx;								\
> +})
> +
> +/* Iterate over initialised fw domains */
> +#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
> +	for (tmp__ = (mask__); \
> +	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
> +
> +#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
> +	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
> +
> +
> +void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
> +void intel_uncore_init(struct drm_i915_private *dev_priv);
> +bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
> +bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
> +void intel_uncore_fini(struct drm_i915_private *dev_priv);
> +void intel_uncore_suspend(struct drm_i915_private *dev_priv);
> +void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
> +
> +u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
> +void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
> +const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
> +
> +enum forcewake_domains
> +intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
> +			       i915_reg_t reg, unsigned int op);
> +#define FW_REG_READ  (1)
> +#define FW_REG_WRITE (2)
> +
> +void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
> +				enum forcewake_domains domains);
> +void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
> +				enum forcewake_domains domains);
> +/* Like above but the caller must manage the uncore.lock itself.
> + * Must be used with I915_READ_FW and friends.
> + */
> +void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
> +					enum forcewake_domains domains);
> +void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
> +					enum forcewake_domains domains);
> +
> +int intel_wait_for_register(struct drm_i915_private *dev_priv,
> +			    i915_reg_t reg,
> +			    u32 mask,
> +			    u32 value,
> +			    unsigned int timeout_ms);
> +int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> +				 i915_reg_t reg,
> +				 u32 mask,
> +				 u32 value,
> +				 unsigned int fast_timeout_us,
> +				 unsigned int slow_timeout_ms,
> +				 u32 *out_value);
> +static inline
> +int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> +			       i915_reg_t reg,
> +			       u32 mask,
> +			       u32 value,
> +			       unsigned int timeout_ms)
> +{
> +	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
> +					    2, timeout_ms, NULL);
> +}
> +
> +#endif /* !__INTEL_UNCORE_H__ */
> -- 
> 2.7.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] drm/i915: Move uncore definitions into a separate header
  2017-05-09  9:00 ` [PATCH 1/2] " Mika Kuoppala
@ 2017-05-09  9:12   ` Michal Wajdeczko
  0 siblings, 0 replies; 12+ messages in thread
From: Michal Wajdeczko @ 2017-05-09  9:12 UTC (permalink / raw)
  To: Mika Kuoppala; +Cc: intel-gfx

On Tue, May 09, 2017 at 12:00:58PM +0300, Mika Kuoppala wrote:
> Michal Wajdeczko <michal.wajdeczko@intel.com> writes:
> 
> > In order to allow use of e.g. forcewake_domains in a other feature headers
> > included from the top of i915_drv.h, move all uncore related definitions
> > into their own header.
> >
> > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > ---

<snip>

> > -
> > -#define __mask_next_bit(mask) ({					\
> > -	int __idx = ffs(mask) - 1;					\
> > -	mask &= ~BIT(__idx);						\
> > -	__idx;								\
> > -})
> > -
> 
> for_each_engine_masked needs this macro too, so we should leave it to
>  top level or i915_utils.h?

Sure, I'll move it to the i915_utils.h, but at the same time I'm
wondering how did I missed that.

Thanks,
Michal 

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^ permalink raw reply	[flat|nested] 12+ messages in thread
* [PATCH v2 1/2] drm/i915: Move uncore definitions into a separate header
  2017-05-09  7:36 [PATCH 1/2] drm/i915: Move uncore definitions into a separate header Michal Wajdeczko
                   ` (2 preceding siblings ...)
  2017-05-09  9:00 ` [PATCH 1/2] " Mika Kuoppala
@ 2017-05-09  9:20 ` Michal Wajdeczko
  2017-05-09 10:09   ` Mika Kuoppala
  2017-05-09 13:15   ` Mika Kuoppala
  2017-05-09  9:48 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Move uncore definitions into a separate header (rev2) Patchwork
  4 siblings, 2 replies; 12+ messages in thread
From: Michal Wajdeczko @ 2017-05-09  9:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mika Kuoppala

In order to allow use of e.g. forcewake_domains in a other feature headers
included from the top of i915_drv.h, move all uncore related definitions
into their own header.

v2: move __mask_next_bit macro to utils header (Mika)

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h     | 157 +--------------------------------
 drivers/gpu/drm/i915/i915_utils.h   |   6 ++
 drivers/gpu/drm/i915/intel_uncore.c |  12 +++
 drivers/gpu/drm/i915/intel_uncore.h | 169 ++++++++++++++++++++++++++++++++++++
 4 files changed, 188 insertions(+), 156 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_uncore.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b20ed16..29a6966 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -55,6 +55,7 @@
 #include "i915_reg.h"
 #include "i915_utils.h"
 
+#include "intel_uncore.h"
 #include "intel_bios.h"
 #include "intel_dpll_mgr.h"
 #include "intel_uc.h"
@@ -676,116 +677,6 @@ struct drm_i915_display_funcs {
 	void (*load_luts)(struct drm_crtc_state *crtc_state);
 };
 
-enum forcewake_domain_id {
-	FW_DOMAIN_ID_RENDER = 0,
-	FW_DOMAIN_ID_BLITTER,
-	FW_DOMAIN_ID_MEDIA,
-
-	FW_DOMAIN_ID_COUNT
-};
-
-enum forcewake_domains {
-	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
-	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
-	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
-	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
-			 FORCEWAKE_BLITTER |
-			 FORCEWAKE_MEDIA)
-};
-
-#define FW_REG_READ  (1)
-#define FW_REG_WRITE (2)
-
-enum decoupled_power_domain {
-	GEN9_DECOUPLED_PD_BLITTER = 0,
-	GEN9_DECOUPLED_PD_RENDER,
-	GEN9_DECOUPLED_PD_MEDIA,
-	GEN9_DECOUPLED_PD_ALL
-};
-
-enum decoupled_ops {
-	GEN9_DECOUPLED_OP_WRITE = 0,
-	GEN9_DECOUPLED_OP_READ
-};
-
-enum forcewake_domains
-intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
-			       i915_reg_t reg, unsigned int op);
-
-struct intel_uncore_funcs {
-	void (*force_wake_get)(struct drm_i915_private *dev_priv,
-			       enum forcewake_domains domains);
-	void (*force_wake_put)(struct drm_i915_private *dev_priv,
-			       enum forcewake_domains domains);
-
-	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
-			       i915_reg_t r, bool trace);
-	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
-			       i915_reg_t r, bool trace);
-	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
-			       i915_reg_t r, bool trace);
-	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
-			       i915_reg_t r, bool trace);
-
-	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
-			    i915_reg_t r, uint8_t val, bool trace);
-	void (*mmio_writew)(struct drm_i915_private *dev_priv,
-			    i915_reg_t r, uint16_t val, bool trace);
-	void (*mmio_writel)(struct drm_i915_private *dev_priv,
-			    i915_reg_t r, uint32_t val, bool trace);
-};
-
-struct intel_forcewake_range {
-	u32 start;
-	u32 end;
-
-	enum forcewake_domains domains;
-};
-
-struct intel_uncore {
-	spinlock_t lock; /** lock is also taken in irq contexts. */
-
-	const struct intel_forcewake_range *fw_domains_table;
-	unsigned int fw_domains_table_entries;
-
-	struct notifier_block pmic_bus_access_nb;
-	struct intel_uncore_funcs funcs;
-
-	unsigned fifo_count;
-
-	enum forcewake_domains fw_domains;
-	enum forcewake_domains fw_domains_active;
-
-	u32 fw_set;
-	u32 fw_clear;
-	u32 fw_reset;
-
-	struct intel_uncore_forcewake_domain {
-		enum forcewake_domain_id id;
-		enum forcewake_domains mask;
-		unsigned wake_count;
-		struct hrtimer timer;
-		i915_reg_t reg_set;
-		i915_reg_t reg_ack;
-	} fw_domain[FW_DOMAIN_ID_COUNT];
-
-	int unclaimed_mmio_check;
-};
-
-#define __mask_next_bit(mask) ({					\
-	int __idx = ffs(mask) - 1;					\
-	mask &= ~BIT(__idx);						\
-	__idx;								\
-})
-
-/* Iterate over initialised fw domains */
-#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
-	for (tmp__ = (mask__); \
-	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
-
-#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
-	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
-
 #define CSR_VERSION(major, minor)	((major) << 16 | (minor))
 #define CSR_VERSION_MAJOR(version)	((version) >> 16)
 #define CSR_VERSION_MINOR(version)	((version) & 0xffff)
@@ -3063,52 +2954,6 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv);
 int intel_irq_install(struct drm_i915_private *dev_priv);
 void intel_irq_uninstall(struct drm_i915_private *dev_priv);
 
-extern void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
-extern void intel_uncore_init(struct drm_i915_private *dev_priv);
-extern bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
-extern bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
-extern void intel_uncore_fini(struct drm_i915_private *dev_priv);
-extern void intel_uncore_suspend(struct drm_i915_private *dev_priv);
-extern void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
-const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
-void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
-				enum forcewake_domains domains);
-void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
-				enum forcewake_domains domains);
-/* Like above but the caller must manage the uncore.lock itself.
- * Must be used with I915_READ_FW and friends.
- */
-void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
-					enum forcewake_domains domains);
-void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
-					enum forcewake_domains domains);
-u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
-
-void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
-
-int intel_wait_for_register(struct drm_i915_private *dev_priv,
-			    i915_reg_t reg,
-			    u32 mask,
-			    u32 value,
-			    unsigned int timeout_ms);
-int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
-				 i915_reg_t reg,
-				 u32 mask,
-				 u32 value,
-				 unsigned int fast_timeout_us,
-				 unsigned int slow_timeout_ms,
-				 u32 *out_value);
-static inline
-int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
-			       i915_reg_t reg,
-			       u32 mask,
-			       u32 value,
-			       unsigned int timeout_ms)
-{
-	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
-					    2, timeout_ms, NULL);
-}
-
 static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
 {
 	return dev_priv->gvt;
diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
index c5455d3..f9d6607 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -92,4 +92,10 @@
 	__T;								\
 })
 
+#define __mask_next_bit(mask) ({					\
+	int __idx = ffs(mask) - 1;					\
+	mask &= ~BIT(__idx);						\
+	__idx;								\
+})
+
 #endif /* !__I915_UTILS_H */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index aa9d306..2c628df 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -801,6 +801,18 @@ unclaimed_reg_debug(struct drm_i915_private *dev_priv,
 	__unclaimed_reg_debug(dev_priv, reg, read, before);
 }
 
+enum decoupled_power_domain {
+	GEN9_DECOUPLED_PD_BLITTER = 0,
+	GEN9_DECOUPLED_PD_RENDER,
+	GEN9_DECOUPLED_PD_MEDIA,
+	GEN9_DECOUPLED_PD_ALL
+};
+
+enum decoupled_ops {
+	GEN9_DECOUPLED_OP_WRITE = 0,
+	GEN9_DECOUPLED_OP_READ
+};
+
 static const enum decoupled_power_domain fw2dpd_domain[] = {
 	GEN9_DECOUPLED_PD_RENDER,
 	GEN9_DECOUPLED_PD_BLITTER,
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
new file mode 100644
index 0000000..ff6fe2b
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __INTEL_UNCORE_H__
+#define __INTEL_UNCORE_H__
+
+struct drm_i915_private;
+
+enum forcewake_domain_id {
+	FW_DOMAIN_ID_RENDER = 0,
+	FW_DOMAIN_ID_BLITTER,
+	FW_DOMAIN_ID_MEDIA,
+
+	FW_DOMAIN_ID_COUNT
+};
+
+enum forcewake_domains {
+	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
+	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
+	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
+	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
+			 FORCEWAKE_BLITTER |
+			 FORCEWAKE_MEDIA)
+};
+
+struct intel_uncore_funcs {
+	void (*force_wake_get)(struct drm_i915_private *dev_priv,
+			       enum forcewake_domains domains);
+	void (*force_wake_put)(struct drm_i915_private *dev_priv,
+			       enum forcewake_domains domains);
+
+	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
+			       i915_reg_t r, bool trace);
+	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
+			       i915_reg_t r, bool trace);
+	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
+			       i915_reg_t r, bool trace);
+	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
+			       i915_reg_t r, bool trace);
+
+	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
+			    i915_reg_t r, uint8_t val, bool trace);
+	void (*mmio_writew)(struct drm_i915_private *dev_priv,
+			    i915_reg_t r, uint16_t val, bool trace);
+	void (*mmio_writel)(struct drm_i915_private *dev_priv,
+			    i915_reg_t r, uint32_t val, bool trace);
+};
+
+struct intel_forcewake_range {
+	u32 start;
+	u32 end;
+
+	enum forcewake_domains domains;
+};
+
+struct intel_uncore {
+	spinlock_t lock; /** lock is also taken in irq contexts. */
+
+	const struct intel_forcewake_range *fw_domains_table;
+	unsigned int fw_domains_table_entries;
+
+	struct notifier_block pmic_bus_access_nb;
+	struct intel_uncore_funcs funcs;
+
+	unsigned int fifo_count;
+
+	enum forcewake_domains fw_domains;
+	enum forcewake_domains fw_domains_active;
+
+	u32 fw_set;
+	u32 fw_clear;
+	u32 fw_reset;
+
+	struct intel_uncore_forcewake_domain {
+		enum forcewake_domain_id id;
+		enum forcewake_domains mask;
+		unsigned int wake_count;
+		struct hrtimer timer;
+		i915_reg_t reg_set;
+		i915_reg_t reg_ack;
+	} fw_domain[FW_DOMAIN_ID_COUNT];
+
+	int unclaimed_mmio_check;
+};
+
+/* Iterate over initialised fw domains */
+#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
+	for (tmp__ = (mask__); \
+	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
+
+#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
+	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
+
+
+void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
+void intel_uncore_init(struct drm_i915_private *dev_priv);
+bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
+bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
+void intel_uncore_fini(struct drm_i915_private *dev_priv);
+void intel_uncore_suspend(struct drm_i915_private *dev_priv);
+void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
+
+u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
+void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
+const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
+
+enum forcewake_domains
+intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
+			       i915_reg_t reg, unsigned int op);
+#define FW_REG_READ  (1)
+#define FW_REG_WRITE (2)
+
+void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
+				enum forcewake_domains domains);
+void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
+				enum forcewake_domains domains);
+/* Like above but the caller must manage the uncore.lock itself.
+ * Must be used with I915_READ_FW and friends.
+ */
+void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
+					enum forcewake_domains domains);
+void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
+					enum forcewake_domains domains);
+
+int intel_wait_for_register(struct drm_i915_private *dev_priv,
+			    i915_reg_t reg,
+			    u32 mask,
+			    u32 value,
+			    unsigned int timeout_ms);
+int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
+				 i915_reg_t reg,
+				 u32 mask,
+				 u32 value,
+				 unsigned int fast_timeout_us,
+				 unsigned int slow_timeout_ms,
+				 u32 *out_value);
+static inline
+int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
+			       i915_reg_t reg,
+			       u32 mask,
+			       u32 value,
+			       unsigned int timeout_ms)
+{
+	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
+					    2, timeout_ms, NULL);
+}
+
+#endif /* !__INTEL_UNCORE_H__ */
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 12+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Move uncore definitions into a separate header (rev2)
  2017-05-09  7:36 [PATCH 1/2] drm/i915: Move uncore definitions into a separate header Michal Wajdeczko
                   ` (3 preceding siblings ...)
  2017-05-09  9:20 ` [PATCH v2 " Michal Wajdeczko
@ 2017-05-09  9:48 ` Patchwork
  4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2017-05-09  9:48 UTC (permalink / raw)
  To: Michal Wajdeczko; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/2] drm/i915: Move uncore definitions into a separate header (rev2)
URL   : https://patchwork.freedesktop.org/series/24161/
State : success

== Summary ==

Series 24161v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/24161/revisions/2/mbox/

Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                pass       -> DMESG-WARN (fi-kbl-7560u) fdo#100125
Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                dmesg-warn -> PASS       (fi-byt-j1900) fdo#100652

fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fdo#100652 https://bugs.freedesktop.org/show_bug.cgi?id=100652

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:431s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:429s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:578s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:510s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:481s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:480s
fi-elk-e7500     total:278  pass:229  dwarn:0   dfail:0   fail:0   skip:49  time:412s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:410s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:408s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time:416s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:488s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:473s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:461s
fi-kbl-7560u     total:278  pass:267  dwarn:1   dfail:0   fail:0   skip:10  time:572s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:450s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time:568s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:454s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:492s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:429s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:531s
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29  time:401s
fi-bxt-t5700 failed to collect. IGT log at Patchwork_4645/fi-bxt-t5700/igt.log

f558b185c57202d90bdb9059f3d446956cbae133 drm-tip: 2017y-05m-08d-16h-35m-28s UTC integration manifest
ca02128 drm/i915: Rename assert_forcewakes_inactive
389c197 drm/i915: Move uncore definitions into a separate header

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4645/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] drm/i915: Move uncore definitions into a separate header
  2017-05-09  9:20 ` [PATCH v2 " Michal Wajdeczko
@ 2017-05-09 10:09   ` Mika Kuoppala
  2017-05-09 13:15   ` Mika Kuoppala
  1 sibling, 0 replies; 12+ messages in thread
From: Mika Kuoppala @ 2017-05-09 10:09 UTC (permalink / raw)
  To: Michal Wajdeczko, intel-gfx

Michal Wajdeczko <michal.wajdeczko@intel.com> writes:

> In order to allow use of e.g. forcewake_domains in a other feature headers
> included from the top of i915_drv.h, move all uncore related definitions
> into their own header.
>
> v2: move __mask_next_bit macro to utils header (Mika)
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.h     | 157 +--------------------------------
>  drivers/gpu/drm/i915/i915_utils.h   |   6 ++
>  drivers/gpu/drm/i915/intel_uncore.c |  12 +++
>  drivers/gpu/drm/i915/intel_uncore.h | 169 ++++++++++++++++++++++++++++++++++++
>  4 files changed, 188 insertions(+), 156 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_uncore.h
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index b20ed16..29a6966 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -55,6 +55,7 @@
>  #include "i915_reg.h"
>  #include "i915_utils.h"
>  
> +#include "intel_uncore.h"
>  #include "intel_bios.h"
>  #include "intel_dpll_mgr.h"
>  #include "intel_uc.h"
> @@ -676,116 +677,6 @@ struct drm_i915_display_funcs {
>  	void (*load_luts)(struct drm_crtc_state *crtc_state);
>  };
>  
> -enum forcewake_domain_id {
> -	FW_DOMAIN_ID_RENDER = 0,
> -	FW_DOMAIN_ID_BLITTER,
> -	FW_DOMAIN_ID_MEDIA,
> -
> -	FW_DOMAIN_ID_COUNT
> -};
> -
> -enum forcewake_domains {
> -	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
> -	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
> -	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
> -	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
> -			 FORCEWAKE_BLITTER |
> -			 FORCEWAKE_MEDIA)
> -};
> -
> -#define FW_REG_READ  (1)
> -#define FW_REG_WRITE (2)
> -
> -enum decoupled_power_domain {
> -	GEN9_DECOUPLED_PD_BLITTER = 0,
> -	GEN9_DECOUPLED_PD_RENDER,
> -	GEN9_DECOUPLED_PD_MEDIA,
> -	GEN9_DECOUPLED_PD_ALL
> -};
> -
> -enum decoupled_ops {
> -	GEN9_DECOUPLED_OP_WRITE = 0,
> -	GEN9_DECOUPLED_OP_READ
> -};
> -
> -enum forcewake_domains
> -intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
> -			       i915_reg_t reg, unsigned int op);
> -
> -struct intel_uncore_funcs {
> -	void (*force_wake_get)(struct drm_i915_private *dev_priv,
> -			       enum forcewake_domains domains);
> -	void (*force_wake_put)(struct drm_i915_private *dev_priv,
> -			       enum forcewake_domains domains);
> -
> -	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -
> -	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint8_t val, bool trace);
> -	void (*mmio_writew)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint16_t val, bool trace);
> -	void (*mmio_writel)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint32_t val, bool trace);
> -};
> -
> -struct intel_forcewake_range {
> -	u32 start;
> -	u32 end;
> -
> -	enum forcewake_domains domains;
> -};
> -
> -struct intel_uncore {
> -	spinlock_t lock; /** lock is also taken in irq contexts. */
> -
> -	const struct intel_forcewake_range *fw_domains_table;
> -	unsigned int fw_domains_table_entries;
> -
> -	struct notifier_block pmic_bus_access_nb;
> -	struct intel_uncore_funcs funcs;
> -
> -	unsigned fifo_count;
> -
> -	enum forcewake_domains fw_domains;
> -	enum forcewake_domains fw_domains_active;
> -
> -	u32 fw_set;
> -	u32 fw_clear;
> -	u32 fw_reset;
> -
> -	struct intel_uncore_forcewake_domain {
> -		enum forcewake_domain_id id;
> -		enum forcewake_domains mask;
> -		unsigned wake_count;
> -		struct hrtimer timer;
> -		i915_reg_t reg_set;
> -		i915_reg_t reg_ack;
> -	} fw_domain[FW_DOMAIN_ID_COUNT];
> -
> -	int unclaimed_mmio_check;
> -};
> -
> -#define __mask_next_bit(mask) ({					\
> -	int __idx = ffs(mask) - 1;					\
> -	mask &= ~BIT(__idx);						\
> -	__idx;								\
> -})
> -
> -/* Iterate over initialised fw domains */
> -#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
> -	for (tmp__ = (mask__); \
> -	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
> -
> -#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
> -	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
> -
>  #define CSR_VERSION(major, minor)	((major) << 16 | (minor))
>  #define CSR_VERSION_MAJOR(version)	((version) >> 16)
>  #define CSR_VERSION_MINOR(version)	((version) & 0xffff)
> @@ -3063,52 +2954,6 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv);
>  int intel_irq_install(struct drm_i915_private *dev_priv);
>  void intel_irq_uninstall(struct drm_i915_private *dev_priv);
>  
> -extern void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_init(struct drm_i915_private *dev_priv);
> -extern bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
> -extern bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_fini(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_suspend(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
> -const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
> -void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
> -				enum forcewake_domains domains);
> -void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
> -				enum forcewake_domains domains);
> -/* Like above but the caller must manage the uncore.lock itself.
> - * Must be used with I915_READ_FW and friends.
> - */
> -void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
> -					enum forcewake_domains domains);
> -void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
> -					enum forcewake_domains domains);
> -u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
> -
> -void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
> -
> -int intel_wait_for_register(struct drm_i915_private *dev_priv,
> -			    i915_reg_t reg,
> -			    u32 mask,
> -			    u32 value,
> -			    unsigned int timeout_ms);
> -int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> -				 i915_reg_t reg,
> -				 u32 mask,
> -				 u32 value,
> -				 unsigned int fast_timeout_us,
> -				 unsigned int slow_timeout_ms,
> -				 u32 *out_value);
> -static inline
> -int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> -			       i915_reg_t reg,
> -			       u32 mask,
> -			       u32 value,
> -			       unsigned int timeout_ms)
> -{
> -	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
> -					    2, timeout_ms, NULL);
> -}
> -
>  static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
>  {
>  	return dev_priv->gvt;
> diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
> index c5455d3..f9d6607 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -92,4 +92,10 @@
>  	__T;								\
>  })
>  
> +#define __mask_next_bit(mask) ({					\
> +	int __idx = ffs(mask) - 1;					\
> +	mask &= ~BIT(__idx);						\
> +	__idx;								\
> +})
> +
>  #endif /* !__I915_UTILS_H */
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index aa9d306..2c628df 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -801,6 +801,18 @@ unclaimed_reg_debug(struct drm_i915_private *dev_priv,
>  	__unclaimed_reg_debug(dev_priv, reg, read, before);
>  }
>  
> +enum decoupled_power_domain {
> +	GEN9_DECOUPLED_PD_BLITTER = 0,
> +	GEN9_DECOUPLED_PD_RENDER,
> +	GEN9_DECOUPLED_PD_MEDIA,
> +	GEN9_DECOUPLED_PD_ALL
> +};
> +
> +enum decoupled_ops {
> +	GEN9_DECOUPLED_OP_WRITE = 0,
> +	GEN9_DECOUPLED_OP_READ
> +};
> +
>  static const enum decoupled_power_domain fw2dpd_domain[] = {
>  	GEN9_DECOUPLED_PD_RENDER,
>  	GEN9_DECOUPLED_PD_BLITTER,
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
> new file mode 100644
> index 0000000..ff6fe2b
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -0,0 +1,169 @@
> +/*
> + * Copyright © 2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef __INTEL_UNCORE_H__
> +#define __INTEL_UNCORE_H__
> +
> +struct drm_i915_private;
> +
> +enum forcewake_domain_id {
> +	FW_DOMAIN_ID_RENDER = 0,
> +	FW_DOMAIN_ID_BLITTER,
> +	FW_DOMAIN_ID_MEDIA,
> +
> +	FW_DOMAIN_ID_COUNT
> +};
> +
> +enum forcewake_domains {
> +	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
> +	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
> +	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
> +	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
> +			 FORCEWAKE_BLITTER |
> +			 FORCEWAKE_MEDIA)
> +};
> +
> +struct intel_uncore_funcs {
> +	void (*force_wake_get)(struct drm_i915_private *dev_priv,
> +			       enum forcewake_domains domains);
> +	void (*force_wake_put)(struct drm_i915_private *dev_priv,
> +			       enum forcewake_domains domains);
> +
> +	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +
> +	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint8_t val, bool trace);
> +	void (*mmio_writew)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint16_t val, bool trace);
> +	void (*mmio_writel)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint32_t val, bool trace);
> +};
> +
> +struct intel_forcewake_range {
> +	u32 start;
> +	u32 end;
> +
> +	enum forcewake_domains domains;
> +};
> +
> +struct intel_uncore {
> +	spinlock_t lock; /** lock is also taken in irq contexts. */
> +
> +	const struct intel_forcewake_range *fw_domains_table;
> +	unsigned int fw_domains_table_entries;
> +
> +	struct notifier_block pmic_bus_access_nb;
> +	struct intel_uncore_funcs funcs;
> +
> +	unsigned int fifo_count;
> +
> +	enum forcewake_domains fw_domains;
> +	enum forcewake_domains fw_domains_active;
> +
> +	u32 fw_set;
> +	u32 fw_clear;
> +	u32 fw_reset;
> +
> +	struct intel_uncore_forcewake_domain {
> +		enum forcewake_domain_id id;
> +		enum forcewake_domains mask;
> +		unsigned int wake_count;
> +		struct hrtimer timer;
> +		i915_reg_t reg_set;
> +		i915_reg_t reg_ack;
> +	} fw_domain[FW_DOMAIN_ID_COUNT];
> +
> +	int unclaimed_mmio_check;
> +};
> +
> +/* Iterate over initialised fw domains */
> +#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
> +	for (tmp__ = (mask__); \
> +	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
> +
> +#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
> +	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
> +
> +
> +void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
> +void intel_uncore_init(struct drm_i915_private *dev_priv);
> +bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
> +bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
> +void intel_uncore_fini(struct drm_i915_private *dev_priv);
> +void intel_uncore_suspend(struct drm_i915_private *dev_priv);
> +void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
> +
> +u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
> +void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
> +const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
> +
> +enum forcewake_domains
> +intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
> +			       i915_reg_t reg, unsigned int op);
> +#define FW_REG_READ  (1)
> +#define FW_REG_WRITE (2)
> +
> +void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
> +				enum forcewake_domains domains);
> +void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
> +				enum forcewake_domains domains);
> +/* Like above but the caller must manage the uncore.lock itself.
> + * Must be used with I915_READ_FW and friends.
> + */
> +void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
> +					enum forcewake_domains domains);
> +void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
> +					enum forcewake_domains domains);
> +
> +int intel_wait_for_register(struct drm_i915_private *dev_priv,
> +			    i915_reg_t reg,
> +			    u32 mask,
> +			    u32 value,
> +			    unsigned int timeout_ms);
> +int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> +				 i915_reg_t reg,
> +				 u32 mask,
> +				 u32 value,
> +				 unsigned int fast_timeout_us,
> +				 unsigned int slow_timeout_ms,
> +				 u32 *out_value);
> +static inline
> +int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> +			       i915_reg_t reg,
> +			       u32 mask,
> +			       u32 value,
> +			       unsigned int timeout_ms)
> +{
> +	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
> +					    2, timeout_ms, NULL);
> +}
> +
> +#endif /* !__INTEL_UNCORE_H__ */
> -- 
> 2.7.4
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive
  2017-05-09  7:36 ` [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive Michal Wajdeczko
  2017-05-09  8:53   ` Mika Kuoppala
@ 2017-05-09 10:09   ` Chris Wilson
  2017-05-09 10:20     ` Michal Wajdeczko
  1 sibling, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2017-05-09 10:09 UTC (permalink / raw)
  To: Michal Wajdeczko; +Cc: intel-gfx

On Tue, May 09, 2017 at 07:36:09AM +0000, Michal Wajdeczko wrote:
> All other functions related to uncore start with intel_uncore prefix.
> Follow that pattern.

Debatable. Fwiw, we use the assert_*() pattern frequently because that
"it's a debug only function" is important to make it the first word.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive
  2017-05-09 10:09   ` Chris Wilson
@ 2017-05-09 10:20     ` Michal Wajdeczko
  0 siblings, 0 replies; 12+ messages in thread
From: Michal Wajdeczko @ 2017-05-09 10:20 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

On Tue, May 09, 2017 at 11:09:58AM +0100, Chris Wilson wrote:
> On Tue, May 09, 2017 at 07:36:09AM +0000, Michal Wajdeczko wrote:
> > All other functions related to uncore start with intel_uncore prefix.
> > Follow that pattern.
> 
> Debatable. Fwiw, we use the assert_*() pattern frequently because that
> "it's a debug only function" is important to make it the first word.

But most of our assert_*() functions are declared as static, so they don't count.
I think in case of public functions, we should follow object/verb pattern.
Note that there is lockdep_assert_held() not assert_lockdep_held().

-Michal
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] drm/i915: Move uncore definitions into a separate header
  2017-05-09  9:20 ` [PATCH v2 " Michal Wajdeczko
  2017-05-09 10:09   ` Mika Kuoppala
@ 2017-05-09 13:15   ` Mika Kuoppala
  1 sibling, 0 replies; 12+ messages in thread
From: Mika Kuoppala @ 2017-05-09 13:15 UTC (permalink / raw)
  To: Michal Wajdeczko, intel-gfx

Michal Wajdeczko <michal.wajdeczko@intel.com> writes:

> In order to allow use of e.g. forcewake_domains in a other feature headers
> included from the top of i915_drv.h, move all uncore related definitions
> into their own header.
>
> v2: move __mask_next_bit macro to utils header (Mika)
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>

Pushed 1/2. 2/2 needs more tasting. Thanks for patch!
-Mika

> ---
>  drivers/gpu/drm/i915/i915_drv.h     | 157 +--------------------------------
>  drivers/gpu/drm/i915/i915_utils.h   |   6 ++
>  drivers/gpu/drm/i915/intel_uncore.c |  12 +++
>  drivers/gpu/drm/i915/intel_uncore.h | 169 ++++++++++++++++++++++++++++++++++++
>  4 files changed, 188 insertions(+), 156 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_uncore.h
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index b20ed16..29a6966 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -55,6 +55,7 @@
>  #include "i915_reg.h"
>  #include "i915_utils.h"
>  
> +#include "intel_uncore.h"
>  #include "intel_bios.h"
>  #include "intel_dpll_mgr.h"
>  #include "intel_uc.h"
> @@ -676,116 +677,6 @@ struct drm_i915_display_funcs {
>  	void (*load_luts)(struct drm_crtc_state *crtc_state);
>  };
>  
> -enum forcewake_domain_id {
> -	FW_DOMAIN_ID_RENDER = 0,
> -	FW_DOMAIN_ID_BLITTER,
> -	FW_DOMAIN_ID_MEDIA,
> -
> -	FW_DOMAIN_ID_COUNT
> -};
> -
> -enum forcewake_domains {
> -	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
> -	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
> -	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
> -	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
> -			 FORCEWAKE_BLITTER |
> -			 FORCEWAKE_MEDIA)
> -};
> -
> -#define FW_REG_READ  (1)
> -#define FW_REG_WRITE (2)
> -
> -enum decoupled_power_domain {
> -	GEN9_DECOUPLED_PD_BLITTER = 0,
> -	GEN9_DECOUPLED_PD_RENDER,
> -	GEN9_DECOUPLED_PD_MEDIA,
> -	GEN9_DECOUPLED_PD_ALL
> -};
> -
> -enum decoupled_ops {
> -	GEN9_DECOUPLED_OP_WRITE = 0,
> -	GEN9_DECOUPLED_OP_READ
> -};
> -
> -enum forcewake_domains
> -intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
> -			       i915_reg_t reg, unsigned int op);
> -
> -struct intel_uncore_funcs {
> -	void (*force_wake_get)(struct drm_i915_private *dev_priv,
> -			       enum forcewake_domains domains);
> -	void (*force_wake_put)(struct drm_i915_private *dev_priv,
> -			       enum forcewake_domains domains);
> -
> -	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
> -			       i915_reg_t r, bool trace);
> -
> -	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint8_t val, bool trace);
> -	void (*mmio_writew)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint16_t val, bool trace);
> -	void (*mmio_writel)(struct drm_i915_private *dev_priv,
> -			    i915_reg_t r, uint32_t val, bool trace);
> -};
> -
> -struct intel_forcewake_range {
> -	u32 start;
> -	u32 end;
> -
> -	enum forcewake_domains domains;
> -};
> -
> -struct intel_uncore {
> -	spinlock_t lock; /** lock is also taken in irq contexts. */
> -
> -	const struct intel_forcewake_range *fw_domains_table;
> -	unsigned int fw_domains_table_entries;
> -
> -	struct notifier_block pmic_bus_access_nb;
> -	struct intel_uncore_funcs funcs;
> -
> -	unsigned fifo_count;
> -
> -	enum forcewake_domains fw_domains;
> -	enum forcewake_domains fw_domains_active;
> -
> -	u32 fw_set;
> -	u32 fw_clear;
> -	u32 fw_reset;
> -
> -	struct intel_uncore_forcewake_domain {
> -		enum forcewake_domain_id id;
> -		enum forcewake_domains mask;
> -		unsigned wake_count;
> -		struct hrtimer timer;
> -		i915_reg_t reg_set;
> -		i915_reg_t reg_ack;
> -	} fw_domain[FW_DOMAIN_ID_COUNT];
> -
> -	int unclaimed_mmio_check;
> -};
> -
> -#define __mask_next_bit(mask) ({					\
> -	int __idx = ffs(mask) - 1;					\
> -	mask &= ~BIT(__idx);						\
> -	__idx;								\
> -})
> -
> -/* Iterate over initialised fw domains */
> -#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
> -	for (tmp__ = (mask__); \
> -	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
> -
> -#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
> -	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
> -
>  #define CSR_VERSION(major, minor)	((major) << 16 | (minor))
>  #define CSR_VERSION_MAJOR(version)	((version) >> 16)
>  #define CSR_VERSION_MINOR(version)	((version) & 0xffff)
> @@ -3063,52 +2954,6 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv);
>  int intel_irq_install(struct drm_i915_private *dev_priv);
>  void intel_irq_uninstall(struct drm_i915_private *dev_priv);
>  
> -extern void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_init(struct drm_i915_private *dev_priv);
> -extern bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
> -extern bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_fini(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_suspend(struct drm_i915_private *dev_priv);
> -extern void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
> -const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
> -void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
> -				enum forcewake_domains domains);
> -void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
> -				enum forcewake_domains domains);
> -/* Like above but the caller must manage the uncore.lock itself.
> - * Must be used with I915_READ_FW and friends.
> - */
> -void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
> -					enum forcewake_domains domains);
> -void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
> -					enum forcewake_domains domains);
> -u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
> -
> -void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
> -
> -int intel_wait_for_register(struct drm_i915_private *dev_priv,
> -			    i915_reg_t reg,
> -			    u32 mask,
> -			    u32 value,
> -			    unsigned int timeout_ms);
> -int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> -				 i915_reg_t reg,
> -				 u32 mask,
> -				 u32 value,
> -				 unsigned int fast_timeout_us,
> -				 unsigned int slow_timeout_ms,
> -				 u32 *out_value);
> -static inline
> -int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> -			       i915_reg_t reg,
> -			       u32 mask,
> -			       u32 value,
> -			       unsigned int timeout_ms)
> -{
> -	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
> -					    2, timeout_ms, NULL);
> -}
> -
>  static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
>  {
>  	return dev_priv->gvt;
> diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
> index c5455d3..f9d6607 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -92,4 +92,10 @@
>  	__T;								\
>  })
>  
> +#define __mask_next_bit(mask) ({					\
> +	int __idx = ffs(mask) - 1;					\
> +	mask &= ~BIT(__idx);						\
> +	__idx;								\
> +})
> +
>  #endif /* !__I915_UTILS_H */
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index aa9d306..2c628df 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -801,6 +801,18 @@ unclaimed_reg_debug(struct drm_i915_private *dev_priv,
>  	__unclaimed_reg_debug(dev_priv, reg, read, before);
>  }
>  
> +enum decoupled_power_domain {
> +	GEN9_DECOUPLED_PD_BLITTER = 0,
> +	GEN9_DECOUPLED_PD_RENDER,
> +	GEN9_DECOUPLED_PD_MEDIA,
> +	GEN9_DECOUPLED_PD_ALL
> +};
> +
> +enum decoupled_ops {
> +	GEN9_DECOUPLED_OP_WRITE = 0,
> +	GEN9_DECOUPLED_OP_READ
> +};
> +
>  static const enum decoupled_power_domain fw2dpd_domain[] = {
>  	GEN9_DECOUPLED_PD_RENDER,
>  	GEN9_DECOUPLED_PD_BLITTER,
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
> new file mode 100644
> index 0000000..ff6fe2b
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -0,0 +1,169 @@
> +/*
> + * Copyright © 2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef __INTEL_UNCORE_H__
> +#define __INTEL_UNCORE_H__
> +
> +struct drm_i915_private;
> +
> +enum forcewake_domain_id {
> +	FW_DOMAIN_ID_RENDER = 0,
> +	FW_DOMAIN_ID_BLITTER,
> +	FW_DOMAIN_ID_MEDIA,
> +
> +	FW_DOMAIN_ID_COUNT
> +};
> +
> +enum forcewake_domains {
> +	FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
> +	FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
> +	FORCEWAKE_MEDIA	= BIT(FW_DOMAIN_ID_MEDIA),
> +	FORCEWAKE_ALL = (FORCEWAKE_RENDER |
> +			 FORCEWAKE_BLITTER |
> +			 FORCEWAKE_MEDIA)
> +};
> +
> +struct intel_uncore_funcs {
> +	void (*force_wake_get)(struct drm_i915_private *dev_priv,
> +			       enum forcewake_domains domains);
> +	void (*force_wake_put)(struct drm_i915_private *dev_priv,
> +			       enum forcewake_domains domains);
> +
> +	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
> +			       i915_reg_t r, bool trace);
> +
> +	void (*mmio_writeb)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint8_t val, bool trace);
> +	void (*mmio_writew)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint16_t val, bool trace);
> +	void (*mmio_writel)(struct drm_i915_private *dev_priv,
> +			    i915_reg_t r, uint32_t val, bool trace);
> +};
> +
> +struct intel_forcewake_range {
> +	u32 start;
> +	u32 end;
> +
> +	enum forcewake_domains domains;
> +};
> +
> +struct intel_uncore {
> +	spinlock_t lock; /** lock is also taken in irq contexts. */
> +
> +	const struct intel_forcewake_range *fw_domains_table;
> +	unsigned int fw_domains_table_entries;
> +
> +	struct notifier_block pmic_bus_access_nb;
> +	struct intel_uncore_funcs funcs;
> +
> +	unsigned int fifo_count;
> +
> +	enum forcewake_domains fw_domains;
> +	enum forcewake_domains fw_domains_active;
> +
> +	u32 fw_set;
> +	u32 fw_clear;
> +	u32 fw_reset;
> +
> +	struct intel_uncore_forcewake_domain {
> +		enum forcewake_domain_id id;
> +		enum forcewake_domains mask;
> +		unsigned int wake_count;
> +		struct hrtimer timer;
> +		i915_reg_t reg_set;
> +		i915_reg_t reg_ack;
> +	} fw_domain[FW_DOMAIN_ID_COUNT];
> +
> +	int unclaimed_mmio_check;
> +};
> +
> +/* Iterate over initialised fw domains */
> +#define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
> +	for (tmp__ = (mask__); \
> +	     tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
> +
> +#define for_each_fw_domain(domain__, dev_priv__, tmp__) \
> +	for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
> +
> +
> +void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
> +void intel_uncore_init(struct drm_i915_private *dev_priv);
> +bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
> +bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
> +void intel_uncore_fini(struct drm_i915_private *dev_priv);
> +void intel_uncore_suspend(struct drm_i915_private *dev_priv);
> +void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
> +
> +u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
> +void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
> +const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
> +
> +enum forcewake_domains
> +intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
> +			       i915_reg_t reg, unsigned int op);
> +#define FW_REG_READ  (1)
> +#define FW_REG_WRITE (2)
> +
> +void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
> +				enum forcewake_domains domains);
> +void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
> +				enum forcewake_domains domains);
> +/* Like above but the caller must manage the uncore.lock itself.
> + * Must be used with I915_READ_FW and friends.
> + */
> +void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
> +					enum forcewake_domains domains);
> +void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
> +					enum forcewake_domains domains);
> +
> +int intel_wait_for_register(struct drm_i915_private *dev_priv,
> +			    i915_reg_t reg,
> +			    u32 mask,
> +			    u32 value,
> +			    unsigned int timeout_ms);
> +int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> +				 i915_reg_t reg,
> +				 u32 mask,
> +				 u32 value,
> +				 unsigned int fast_timeout_us,
> +				 unsigned int slow_timeout_ms,
> +				 u32 *out_value);
> +static inline
> +int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
> +			       i915_reg_t reg,
> +			       u32 mask,
> +			       u32 value,
> +			       unsigned int timeout_ms)
> +{
> +	return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
> +					    2, timeout_ms, NULL);
> +}
> +
> +#endif /* !__INTEL_UNCORE_H__ */
> -- 
> 2.7.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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^ permalink raw reply	[flat|nested] 12+ messages in thread
end of thread, other threads:[~2017-05-09 13:16 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-05-09  7:36 [PATCH 1/2] drm/i915: Move uncore definitions into a separate header Michal Wajdeczko
2017-05-09  7:36 ` [PATCH 2/2] drm/i915: Rename assert_forcewakes_inactive Michal Wajdeczko
2017-05-09  8:53   ` Mika Kuoppala
2017-05-09 10:09   ` Chris Wilson
2017-05-09 10:20     ` Michal Wajdeczko
2017-05-09  7:55 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move uncore definitions into a separate header Patchwork
2017-05-09  9:00 ` [PATCH 1/2] " Mika Kuoppala
2017-05-09  9:12   ` Michal Wajdeczko
2017-05-09  9:20 ` [PATCH v2 " Michal Wajdeczko
2017-05-09 10:09   ` Mika Kuoppala
2017-05-09 13:15   ` Mika Kuoppala
2017-05-09  9:48 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Move uncore definitions into a separate header (rev2) Patchwork

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