[PATCH 0/6] add clang compilation support for armv8a linuxapp

[PATCH 0/6] add clang compilation support for armv8a linuxapp

[Ashwin Sekhar T K]

This series of patches adds the clang compilation support for armv8a linuxapp.

Patch 1 is basically for removing the usage of assembly directive ".arch armv8-a+crc"
as this is not understood by clang. For removing these directives, compilation of
armv8a crc32 support is made conditional and is only done for machines which has
the crc extensions. Doing this avoids the need for having the ".arch armv8-a+crc"
directives in the code.

Patch 2 adds the arm64-armv8a-linuxapp-clang defconfig.

Patch 3, 4, 5 and 6 are for fixing the compilation errors/warnings.

Ashwin Sekhar T K (6):
  hash: compile armv8a CRC32 support conditionally
  config: add clang support for armv8a linuxapp
  net/thunderx: fix compile errors for armv8a clang
  acl: fix warning seen with armv8a clang
  eal/arm: fix warnings seen with armv8a clang
  eal: fix warning seen with armv8a clang

 config/defconfig_arm64-armv8a-linuxapp-clang       | 56 ++++++++++++++++++++++
 drivers/net/thunderx/base/nicvf_plat.h             |  2 +-
 lib/librte_acl/Makefile                            |  5 +-
 .../common/include/arch/arm/rte_byteorder.h        |  2 +-
 lib/librte_eal/linuxapp/eal/Makefile               |  4 ++
 lib/librte_hash/Makefile                           |  2 +
 lib/librte_hash/rte_crc_arm64.h                    |  4 --
 lib/librte_hash/rte_hash_crc.h                     |  2 +-
 8 files changed, 69 insertions(+), 8 deletions(-)
 create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang

-- 
2.13.0.rc1

[PATCH 1/6] hash: compile armv8a CRC32 support conditionally

[Ashwin Sekhar T K]

Compile the armv8a CRC32 support only if the machine
has the CRC extensions i.e if RTE_MACHINE_CPUFLAG_CRC32
is defined.

Removed the .arch assembly directives as these are no
more necessary.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 lib/librte_hash/Makefile        | 2 ++
 lib/librte_hash/rte_crc_arm64.h | 4 ----
 lib/librte_hash/rte_hash_crc.h  | 2 +-
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/lib/librte_hash/Makefile b/lib/librte_hash/Makefile
index d856aa26d..9cf13a045 100644
--- a/lib/librte_hash/Makefile
+++ b/lib/librte_hash/Makefile
@@ -49,8 +49,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_HASH) += rte_fbk_hash.c
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include := rte_hash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_hash_crc.h
 ifeq ($(CONFIG_RTE_ARCH_ARM64),y)
+ifneq ($(findstring RTE_MACHINE_CPUFLAG_CRC32,$(CFLAGS)),)
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_crc_arm64.h
 endif
+endif
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_jhash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_thash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_fbk_hash.h
diff --git a/lib/librte_hash/rte_crc_arm64.h b/lib/librte_hash/rte_crc_arm64.h
index 7dd6334ee..91cde3b9d 100644
--- a/lib/librte_hash/rte_crc_arm64.h
+++ b/lib/librte_hash/rte_crc_arm64.h
@@ -52,7 +52,6 @@ extern "C" {
 static inline uint32_t
 crc32c_arm64_u8(uint8_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cb %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -63,7 +62,6 @@ crc32c_arm64_u8(uint8_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u16(uint16_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32ch %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -74,7 +72,6 @@ crc32c_arm64_u16(uint16_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u32(uint32_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cw %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -85,7 +82,6 @@ crc32c_arm64_u32(uint32_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u64(uint64_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cx %w[crc], %w[crc], %x[value]"
 			: [crc] "+r" (init_val)
diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index 0f485b854..808a082c5 100644
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -453,7 +453,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
 
 static uint8_t crc32_alg = CRC32_SW;
 
-#if defined(RTE_ARCH_ARM64)
+#if defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
 #include "rte_crc_arm64.h"
 #else
 
-- 
2.13.0.rc1

[PATCH 2/6] config: add clang support for armv8a linuxapp

[Ashwin Sekhar T K]

Added new config arm64-armv8a-linuxapp-clang

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 config/defconfig_arm64-armv8a-linuxapp-clang | 56 ++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang

diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang b/config/defconfig_arm64-armv8a-linuxapp-clang
new file mode 100644
index 000000000..ff1cfa948
--- /dev/null
+++ b/config/defconfig_arm64-armv8a-linuxapp-clang
@@ -0,0 +1,56 @@
+#   BSD LICENSE
+#
+#   Copyright (C) Cavium networks 2017. All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Cavium networks nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+#include "common_linuxapp"
+
+CONFIG_RTE_MACHINE="armv8a"
+
+CONFIG_RTE_ARCH="arm64"
+CONFIG_RTE_ARCH_ARM64=y
+CONFIG_RTE_ARCH_64=y
+
+CONFIG_RTE_FORCE_INTRINSICS=y
+
+CONFIG_RTE_TOOLCHAIN="clang"
+CONFIG_RTE_TOOLCHAIN_CLANG=y
+
+# Maximum available cache line size in arm64 implementations.
+# Setting to maximum available cache line size in generic config
+# to address minimum DMA alignment across all arm64 implementations.
+CONFIG_RTE_CACHE_LINE_SIZE=128
+
+CONFIG_RTE_EAL_IGB_UIO=n
+
+CONFIG_RTE_LIBRTE_FM10K_PMD=n
+CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
+CONFIG_RTE_LIBRTE_AVP_PMD=n
+
+CONFIG_RTE_SCHED_VECTOR=n
-- 
2.13.0.rc1

[PATCH 3/6] net/thunderx: fix compile errors for armv8a clang

[Ashwin Sekhar T K]

Replaced usage of %a0 in inline assembly with [%x0]

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 drivers/net/thunderx/base/nicvf_plat.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/thunderx/base/nicvf_plat.h b/drivers/net/thunderx/base/nicvf_plat.h
index 36da12009..3536d8374 100644
--- a/drivers/net/thunderx/base/nicvf_plat.h
+++ b/drivers/net/thunderx/base/nicvf_plat.h
@@ -80,7 +80,7 @@
 /* ARM64 specific functions */
 #if defined(RTE_ARCH_ARM64)
 #define nicvf_prefetch_store_keep(_ptr) ({\
-	asm volatile("prfm pstl1keep, %a0\n" : : "p" (_ptr)); })
+	asm volatile("prfm pstl1keep, [%x0]\n" : : "r" (_ptr)); })
 
 
 #define NICVF_LOAD_PAIR(reg1, reg2, addr) ({		\
-- 
2.13.0.rc1

[PATCH 4/6] acl: fix warning seen with armv8a clang

[Ashwin Sekhar T K]

Fixed warning -Wunknown-warning-option seen with
armv8a clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 lib/librte_acl/Makefile | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index e2dacd606..b39b9b12f 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -51,7 +51,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
 
 ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
-CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
+CFLAGS_acl_run_neon.o += -flax-vector-conversions
+ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
+CFLAGS_acl_run_neon.o += -Wno-maybe-uninitialized
+endif
 else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
 else
-- 
2.13.0.rc1

[PATCH 5/6] eal/arm: fix warnings seen with armv8a clang

[Ashwin Sekhar T K]

Fixed warning -Wasm-operand-widths seen with armv8a
clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 lib/librte_eal/common/include/arch/arm/rte_byteorder.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
index 1b312b306..0a29f4bb4 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
@@ -52,7 +52,7 @@ static inline uint16_t rte_arch_bswap16(uint16_t _x)
 {
 	register uint16_t x = _x;
 
-	asm volatile ("rev16 %0,%1"
+	asm volatile ("rev16 %w0,%w1"
 		      : "=r" (x)
 		      : "r" (x)
 		      );
-- 
2.13.0.rc1

[PATCH 6/6] eal: fix warning seen with armv8a clang

[Ashwin Sekhar T K]

Fixed warning -Wempty-body seen with armv8a clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 lib/librte_eal/linuxapp/eal/Makefile | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/librte_eal/linuxapp/eal/Makefile b/lib/librte_eal/linuxapp/eal/Makefile
index 640afd088..dea1c1d59 100644
--- a/lib/librte_eal/linuxapp/eal/Makefile
+++ b/lib/librte_eal/linuxapp/eal/Makefile
@@ -126,6 +126,10 @@ ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
 CFLAGS_eal_thread.o += -Wno-return-type
 endif
 
+ifeq ($(CONFIG_RTE_ARCH_ARM64)$(CONFIG_RTE_TOOLCHAIN_CLANG),yy)
+CFLAGS_eal_common_launch.o += -Wno-empty-body
+endif
+
 INC := rte_interrupts.h rte_kni_common.h rte_dom0_common.h
 
 SYMLINK-$(CONFIG_RTE_EXEC_ENV_LINUXAPP)-include/exec-env := \
-- 
2.13.0.rc1

Re: [PATCH 1/6] hash: compile armv8a CRC32 support conditionally

[Jerin Jacob]

-----Original Message-----
> Date: Wed, 10 May 2017 03:16:38 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 1/6] hash: compile armv8a CRC32 support
>  conditionally
> X-Mailer: git-send-email 2.13.0.rc1
> 
> Compile the armv8a CRC32 support only if the machine
> has the CRC extensions i.e if RTE_MACHINE_CPUFLAG_CRC32
> is defined.
> 
> Removed the .arch assembly directives as these are no
> more necessary.
> 
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>

Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

> ---
>  lib/librte_hash/Makefile        | 2 ++
>  lib/librte_hash/rte_crc_arm64.h | 4 ----
>  lib/librte_hash/rte_hash_crc.h  | 2 +-
>  3 files changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/lib/librte_hash/Makefile b/lib/librte_hash/Makefile
> index d856aa26d..9cf13a045 100644
> --- a/lib/librte_hash/Makefile
> +++ b/lib/librte_hash/Makefile
> @@ -49,8 +49,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_HASH) += rte_fbk_hash.c
>  SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include := rte_hash.h
>  SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_hash_crc.h
>  ifeq ($(CONFIG_RTE_ARCH_ARM64),y)
> +ifneq ($(findstring RTE_MACHINE_CPUFLAG_CRC32,$(CFLAGS)),)
>  SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_crc_arm64.h
>  endif
> +endif
>  SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_jhash.h
>  SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_thash.h
>  SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_fbk_hash.h
> diff --git a/lib/librte_hash/rte_crc_arm64.h b/lib/librte_hash/rte_crc_arm64.h
> index 7dd6334ee..91cde3b9d 100644
> --- a/lib/librte_hash/rte_crc_arm64.h
> +++ b/lib/librte_hash/rte_crc_arm64.h
> @@ -52,7 +52,6 @@ extern "C" {
>  static inline uint32_t
>  crc32c_arm64_u8(uint8_t data, uint32_t init_val)
>  {
> -	asm(".arch armv8-a+crc");
>  	__asm__ volatile(
>  			"crc32cb %w[crc], %w[crc], %w[value]"
>  			: [crc] "+r" (init_val)
> @@ -63,7 +62,6 @@ crc32c_arm64_u8(uint8_t data, uint32_t init_val)
>  static inline uint32_t
>  crc32c_arm64_u16(uint16_t data, uint32_t init_val)
>  {
> -	asm(".arch armv8-a+crc");
>  	__asm__ volatile(
>  			"crc32ch %w[crc], %w[crc], %w[value]"
>  			: [crc] "+r" (init_val)
> @@ -74,7 +72,6 @@ crc32c_arm64_u16(uint16_t data, uint32_t init_val)
>  static inline uint32_t
>  crc32c_arm64_u32(uint32_t data, uint32_t init_val)
>  {
> -	asm(".arch armv8-a+crc");
>  	__asm__ volatile(
>  			"crc32cw %w[crc], %w[crc], %w[value]"
>  			: [crc] "+r" (init_val)
> @@ -85,7 +82,6 @@ crc32c_arm64_u32(uint32_t data, uint32_t init_val)
>  static inline uint32_t
>  crc32c_arm64_u64(uint64_t data, uint32_t init_val)
>  {
> -	asm(".arch armv8-a+crc");
>  	__asm__ volatile(
>  			"crc32cx %w[crc], %w[crc], %x[value]"
>  			: [crc] "+r" (init_val)
> diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
> index 0f485b854..808a082c5 100644
> --- a/lib/librte_hash/rte_hash_crc.h
> +++ b/lib/librte_hash/rte_hash_crc.h
> @@ -453,7 +453,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
>  
>  static uint8_t crc32_alg = CRC32_SW;
>  
> -#if defined(RTE_ARCH_ARM64)
> +#if defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
>  #include "rte_crc_arm64.h"
>  #else
>  
> -- 
> 2.13.0.rc1
> 

Re: [PATCH 2/6] config: add clang support for armv8a linuxapp

[Jerin Jacob]

-----Original Message-----
> Date: Wed, 10 May 2017 03:16:39 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 2/6] config: add clang support for armv8a
>  linuxapp
> X-Mailer: git-send-email 2.13.0.rc1
> 
> Added new config arm64-armv8a-linuxapp-clang
> 
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> ---
>  config/defconfig_arm64-armv8a-linuxapp-clang | 56 ++++++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
>  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
> 
> diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang b/config/defconfig_arm64-armv8a-linuxapp-clang
> +#include "common_linuxapp"
> +
> +CONFIG_RTE_MACHINE="armv8a"
> +
> +CONFIG_RTE_ARCH="arm64"
> +CONFIG_RTE_ARCH_ARM64=y
> +CONFIG_RTE_ARCH_64=y
> +
> +CONFIG_RTE_FORCE_INTRINSICS=y
> +
> +CONFIG_RTE_TOOLCHAIN="clang"
> +CONFIG_RTE_TOOLCHAIN_CLANG=y
> +
> +# Maximum available cache line size in arm64 implementations.
> +# Setting to maximum available cache line size in generic config
> +# to address minimum DMA alignment across all arm64 implementations.
> +CONFIG_RTE_CACHE_LINE_SIZE=128
> +
> +CONFIG_RTE_EAL_IGB_UIO=n
> +
> +CONFIG_RTE_LIBRTE_FM10K_PMD=n
> +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
> +CONFIG_RTE_LIBRTE_AVP_PMD=n
> +
> +CONFIG_RTE_SCHED_VECTOR=n

IMO, It is better to create common_armv8 config and let gcc and clang
use that to avoid duplicating the symbols.

> -- 
> 2.13.0.rc1
> 

Re: [PATCH 3/6] net/thunderx: fix compile errors for armv8a clang

[Jerin Jacob]

-----Original Message-----
> Date: Wed, 10 May 2017 03:16:40 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 3/6] net/thunderx: fix compile errors for armv8a
>  clang
> X-Mailer: git-send-email 2.13.0.rc1
> 
> Replaced usage of %a0 in inline assembly with [%x0]
> 
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>

Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

> ---
>  drivers/net/thunderx/base/nicvf_plat.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/thunderx/base/nicvf_plat.h b/drivers/net/thunderx/base/nicvf_plat.h
> index 36da12009..3536d8374 100644
> --- a/drivers/net/thunderx/base/nicvf_plat.h
> +++ b/drivers/net/thunderx/base/nicvf_plat.h
> @@ -80,7 +80,7 @@
>  /* ARM64 specific functions */
>  #if defined(RTE_ARCH_ARM64)
>  #define nicvf_prefetch_store_keep(_ptr) ({\
> -	asm volatile("prfm pstl1keep, %a0\n" : : "p" (_ptr)); })
> +	asm volatile("prfm pstl1keep, [%x0]\n" : : "r" (_ptr)); })
>  
>  
>  #define NICVF_LOAD_PAIR(reg1, reg2, addr) ({		\
> -- 
> 2.13.0.rc1
> 

Re: [PATCH 4/6] acl: fix warning seen with armv8a clang

[Jerin Jacob]

-----Original Message-----
> Date: Wed, 10 May 2017 03:16:41 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 4/6] acl: fix warning seen with armv8a clang
> X-Mailer: git-send-email 2.13.0.rc1
> 
> Fixed warning -Wunknown-warning-option seen with
> armv8a clang compilation.
> 
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>

Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

> ---
>  lib/librte_acl/Makefile | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
> index e2dacd606..b39b9b12f 100644
> --- a/lib/librte_acl/Makefile
> +++ b/lib/librte_acl/Makefile
> @@ -51,7 +51,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
>  
>  ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
>  SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
> -CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
> +CFLAGS_acl_run_neon.o += -flax-vector-conversions
> +ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
> +CFLAGS_acl_run_neon.o += -Wno-maybe-uninitialized
> +endif
>  else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
>  SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
>  else
> -- 
> 2.13.0.rc1
> 

Re: [PATCH 5/6] eal/arm: fix warnings seen with armv8a clang

[Jerin Jacob]

-----Original Message-----
> Date: Wed, 10 May 2017 03:16:42 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 5/6] eal/arm: fix warnings seen with armv8a clang
> X-Mailer: git-send-email 2.13.0.rc1
> 
> Fixed warning -Wasm-operand-widths seen with armv8a
> clang compilation.
> 
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>

Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

> ---
>  lib/librte_eal/common/include/arch/arm/rte_byteorder.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
> index 1b312b306..0a29f4bb4 100644
> --- a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
> +++ b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
> @@ -52,7 +52,7 @@ static inline uint16_t rte_arch_bswap16(uint16_t _x)
>  {
>  	register uint16_t x = _x;
>  
> -	asm volatile ("rev16 %0,%1"
> +	asm volatile ("rev16 %w0,%w1"
>  		      : "=r" (x)
>  		      : "r" (x)
>  		      );
> -- 
> 2.13.0.rc1
> 

Re: [PATCH 2/6] config: add clang support for armv8a linuxapp

[Sekhar, Ashwin]

On Thu, 2017-05-11 at 10:54 +0530, Jerin Jacob wrote:
> -----Original Message-----
> > 
> > Date: Wed, 10 May 2017 03:16:39 -0700
> > From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> > To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
> >  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
> >  jianbo.liu@linaro.org, bruce.richardson@intel.com,
> >  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> > Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.c
> > om>
> > Subject: [dpdk-dev] [PATCH 2/6] config: add clang support for
> > armv8a
> >  linuxapp
> > X-Mailer: git-send-email 2.13.0.rc1
> > 
> > Added new config arm64-armv8a-linuxapp-clang
> > 
> > Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> > ---
> >  config/defconfig_arm64-armv8a-linuxapp-clang | 56
> > ++++++++++++++++++++++++++++
> >  1 file changed, 56 insertions(+)
> >  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
> > 
> > diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang
> > b/config/defconfig_arm64-armv8a-linuxapp-clang
> > +#include "common_linuxapp"
> > +
> > +CONFIG_RTE_MACHINE="armv8a"
> > +
> > +CONFIG_RTE_ARCH="arm64"
> > +CONFIG_RTE_ARCH_ARM64=y
> > +CONFIG_RTE_ARCH_64=y
> > +
> > +CONFIG_RTE_FORCE_INTRINSICS=y
> > +
> > +CONFIG_RTE_TOOLCHAIN="clang"
> > +CONFIG_RTE_TOOLCHAIN_CLANG=y
> > +
> > +# Maximum available cache line size in arm64 implementations.
> > +# Setting to maximum available cache line size in generic config
> > +# to address minimum DMA alignment across all arm64
> > implementations.
> > +CONFIG_RTE_CACHE_LINE_SIZE=128
> > +
> > +CONFIG_RTE_EAL_IGB_UIO=n
> > +
> > +CONFIG_RTE_LIBRTE_FM10K_PMD=n
> > +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
> > +CONFIG_RTE_LIBRTE_AVP_PMD=n
> > +
> > +CONFIG_RTE_SCHED_VECTOR=n
> IMO, It is better to create common_armv8 config and let gcc and clang
> use that to avoid duplicating the symbols.
> 
For x86, this is the convention that is followed. There are separate
defconfigs for icc, gcc, clang with symbols duplicated. Do we need to
deviate from this convention for armv8a?
> > 

Re: [PATCH 6/6] eal: fix warning seen with armv8a clang

[Jerin Jacob]

-----Original Message-----
> Date: Wed, 10 May 2017 03:16:43 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 6/6] eal: fix warning seen with armv8a clang
> X-Mailer: git-send-email 2.13.0.rc1
> 
> Fixed warning -Wempty-body seen with armv8a clang compilation.
> 
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> ---
>  lib/librte_eal/linuxapp/eal/Makefile | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/lib/librte_eal/linuxapp/eal/Makefile b/lib/librte_eal/linuxapp/eal/Makefile
> index 640afd088..dea1c1d59 100644
> --- a/lib/librte_eal/linuxapp/eal/Makefile
> +++ b/lib/librte_eal/linuxapp/eal/Makefile
> @@ -126,6 +126,10 @@ ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
>  CFLAGS_eal_thread.o += -Wno-return-type
>  endif
>  
> +ifeq ($(CONFIG_RTE_ARCH_ARM64)$(CONFIG_RTE_TOOLCHAIN_CLANG),yy)
> +CFLAGS_eal_common_launch.o += -Wno-empty-body
> +endif

clang pointed us an improvement here. You can add rte_pause() to reduce
the power usage while waiting in rte_eal_wait_lcore().

That will remove the need for -Wno-empty-body for clang too.

➜ [master][dpdk-master] $ git diff
diff --git a/lib/librte_eal/common/eal_common_launch.c
b/lib/librte_eal/common/eal_common_launch.c
index 229c3a0..1848466 100644
--- a/lib/librte_eal/common/eal_common_launch.c
+++ b/lib/librte_eal/common/eal_common_launch.c
@@ -54,7 +54,8 @@ rte_eal_wait_lcore(unsigned slave_id)
                return 0;
 
        while (lcore_config[slave_id].state != WAIT &&
-              lcore_config[slave_id].state != FINISHED);
+              lcore_config[slave_id].state != FINISHED)
+               rte_pause();
 


> +
>  INC := rte_interrupts.h rte_kni_common.h rte_dom0_common.h
>  
>  SYMLINK-$(CONFIG_RTE_EXEC_ENV_LINUXAPP)-include/exec-env := \
> -- 
> 2.13.0.rc1
> 

Re: [PATCH 0/6] add clang compilation support for armv8a linuxapp

[Jerin Jacob]

-----Original Message-----
> Date: Wed, 10 May 2017 03:16:37 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 0/6] add clang compilation support for armv8a
>  linuxapp
> X-Mailer: git-send-email 2.13.0.rc1
> 
> This series of patches adds the clang compilation support for armv8a linuxapp.
> 
> Patch 1 is basically for removing the usage of assembly directive ".arch armv8-a+crc"
> as this is not understood by clang. For removing these directives, compilation of
> armv8a crc32 support is made conditional and is only done for machines which has
> the crc extensions. Doing this avoids the need for having the ".arch armv8-a+crc"
> directives in the code.
> 
> Patch 2 adds the arm64-armv8a-linuxapp-clang defconfig.
> 
> Patch 3, 4, 5 and 6 are for fixing the compilation errors/warnings.

There is warning on LD with clang. Could you please check it?

  INSTALL-MAP dpdk-pdump.map
  LD testpmd
/usr/bin/ld: build/lib/librte_eal.a(eal_thread.o)(.debug_info+0x37): R_AARCH64_ABS64 used with TLS symbol per_lcore__lcore_id
/usr/bin/ld: build/lib/librte_eal.a(eal_thread.o)(.debug_info+0x54): R_AARCH64_ABS64 used with TLS symbol per_lcore__socket_id
/usr/bin/ld: build/lib/librte_eal.a(eal_thread.o)(.debug_info+0x6a): R_AARCH64_ABS64 used with TLS symbol per_lcore__cpuset
/usr/bin/ld: build/lib/librte_eal.a(eal_thread.o)(.debug_info+0xd2): R_AARCH64_ABS64 used with TLS symbol rte_gettid.per_lcore__thread_id
/usr/bin/ld: build/lib/librte_eal.a(eal_interrupts.o)(.debug_info+0x38e): R_AARCH64_ABS64 used with TLS symbol per_lcore__epfd
/usr/bin/ld: build/lib/librte_eal.a(eal_common_errno.o)(.debug_info+0x50): R_AARCH64_ABS64 used with TLS symbol rte_strerror.per_lcore_retval
/usr/bin/ld:build/lib/librte_eal.a(eal_common_errno.o)(.debug_info+0x91): R_AARCH64_ABS64 used with TLS symbol per_lcore__rte_errno
  INSTALL-APP testpmd

$ clang -v
Ubuntu clang version 3.6.0-2ubuntu1 (tags/RELEASE_360/final) (based on
LLVM 3.6.0)
Target: aarch64-unknown-linux-gnu
Thread model: posix
Found candidate GCC installation:
/usr/bin/../lib/gcc/aarch64-linux-gnu/4.9
Found candidate GCC installation:
/usr/bin/../lib/gcc/aarch64-linux-gnu/4.9.2
Found candidate GCC installation:
/usr/bin/../lib/gcc/aarch64-linux-gnu/5.0.1
Found candidate GCC installation: /usr/lib/gcc/aarch64-linux-gnu/4.9
Found candidate GCC installation: /usr/lib/gcc/aarch64-linux-gnu/4.9.2
Found candidate GCC installation: /usr/lib/gcc/aarch64-linux-gnu/5.0.1
Selected GCC installation: /usr/bin/../lib/gcc/aarch64-linux-gnu/4.9
Candidate multilib: .;@m64
Selected multilib: .;@m64


> 
> Ashwin Sekhar T K (6):
>   hash: compile armv8a CRC32 support conditionally
>   config: add clang support for armv8a linuxapp
>   net/thunderx: fix compile errors for armv8a clang
>   acl: fix warning seen with armv8a clang
>   eal/arm: fix warnings seen with armv8a clang
>   eal: fix warning seen with armv8a clang
> 
>  config/defconfig_arm64-armv8a-linuxapp-clang       | 56 ++++++++++++++++++++++
>  drivers/net/thunderx/base/nicvf_plat.h             |  2 +-
>  lib/librte_acl/Makefile                            |  5 +-
>  .../common/include/arch/arm/rte_byteorder.h        |  2 +-
>  lib/librte_eal/linuxapp/eal/Makefile               |  4 ++
>  lib/librte_hash/Makefile                           |  2 +
>  lib/librte_hash/rte_crc_arm64.h                    |  4 --
>  lib/librte_hash/rte_hash_crc.h                     |  2 +-
>  8 files changed, 69 insertions(+), 8 deletions(-)
>  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
> 
> -- 
> 2.13.0.rc1
> 

Re: [PATCH 2/6] config: add clang support for armv8a linuxapp

[Jerin Jacob]

-----Original Message-----
> Date: Thu, 11 May 2017 11:07:18 +0530
> From: "Sekhar, Ashwin" <Ashwin.Sekhar@cavium.com>
> To: "Jacob,  Jerin" <Jerin.JacobKollanukkaran@cavium.com>
> CC: "bruce.richardson@intel.com" <bruce.richardson@intel.com>,
>  "thomas@monjalon.net" <thomas@monjalon.net>,
>  "konstantin.ananyev@intel.com" <konstantin.ananyev@intel.com>,
>  "pablo.de.lara.guarch@intel.com" <pablo.de.lara.guarch@intel.com>,
>  "Czekaj, Maciej" <Maciej.Czekaj@cavium.com>, "viktorin@rehivetech.com"
>  <viktorin@rehivetech.com>, "dev@dpdk.org" <dev@dpdk.org>,
>  "jianbo.liu@linaro.org" <jianbo.liu@linaro.org>
> Subject: Re: [dpdk-dev] [PATCH 2/6] config: add clang support for armv8a
>  linuxapp
> 
> <html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8">
> <meta name="Generator" content="Microsoft Exchange Server">
> <!-- converted from text -->
> <style><!-- .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left: #800000 2px solid; } --></style></head>
> <body>
> <font size="2"><span style="font-size:10pt;"><div class="PlainText">On Thu, 2017-05-11 at 10:54 &#43;0530, Jerin Jacob wrote:<br>
> &gt; -----Original Message-----<br>
> &gt; &gt; <br>
> &gt; &gt; Date: Wed, 10 May 2017 03:16:39 -0700<br>
> &gt; &gt; From: Ashwin Sekhar T K &lt;ashwin.sekhar@caviumnetworks.com&gt;<br>
> &gt; &gt; To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,<br>
> &gt; &gt; &nbsp;maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,<br>
> &gt; &gt; &nbsp;jianbo.liu@linaro.org, bruce.richardson@intel.com,<br>
> &gt; &gt; &nbsp;pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com<br>
> &gt; &gt; Cc: dev@dpdk.org, Ashwin Sekhar T K &lt;ashwin.sekhar@caviumnetworks.c<br>
> &gt; &gt; om&gt;<br>
> &gt; &gt; Subject: [dpdk-dev] [PATCH 2/6] config: add clang support for<br>
> &gt; &gt; armv8a<br>
> &gt; &gt; &nbsp;linuxapp<br>
> &gt; &gt; X-Mailer: git-send-email 2.13.0.rc1<br>
> &gt; &gt; <br>
> &gt; &gt; Added new config arm64-armv8a-linuxapp-clang<br>
> &gt; &gt; <br>
> &gt; &gt; Signed-off-by: Ashwin Sekhar T K &lt;ashwin.sekhar@caviumnetworks.com&gt;<br>
> &gt; &gt; ---<br>
> &gt; &gt; &nbsp;config/defconfig_arm64-armv8a-linuxapp-clang | 56<br>
> &gt; &gt; &#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;<br>
> &gt; &gt; &nbsp;1 file changed, 56 insertions(&#43;)<br>
> &gt; &gt; &nbsp;create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang<br>
> &gt; &gt; <br>
> &gt; &gt; diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang<br>
> &gt; &gt; b/config/defconfig_arm64-armv8a-linuxapp-clang<br>
> &gt; &gt; &#43;#include &quot;common_linuxapp&quot;<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_MACHINE=&quot;armv8a&quot;<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_ARCH=&quot;arm64&quot;<br>
> &gt; &gt; &#43;CONFIG_RTE_ARCH_ARM64=y<br>
> &gt; &gt; &#43;CONFIG_RTE_ARCH_64=y<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_FORCE_INTRINSICS=y<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_TOOLCHAIN=&quot;clang&quot;<br>
> &gt; &gt; &#43;CONFIG_RTE_TOOLCHAIN_CLANG=y<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;# Maximum available cache line size in arm64 implementations.<br>
> &gt; &gt; &#43;# Setting to maximum available cache line size in generic config<br>
> &gt; &gt; &#43;# to address minimum DMA alignment across all arm64<br>
> &gt; &gt; implementations.<br>
> &gt; &gt; &#43;CONFIG_RTE_CACHE_LINE_SIZE=128<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_EAL_IGB_UIO=n<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_LIBRTE_FM10K_PMD=n<br>
> &gt; &gt; &#43;CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n<br>
> &gt; &gt; &#43;CONFIG_RTE_LIBRTE_AVP_PMD=n<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_SCHED_VECTOR=n<br>
> &gt; IMO, It is better to create common_armv8 config and let gcc and clang<br>
> &gt; use that to avoid duplicating the symbols.<br>
> &gt; <br>
> For x86, this is the convention that is followed. There are separate<br>
> defconfigs for icc, gcc, clang with symbols duplicated. Do we need to<br>
> deviate from this convention for armv8a?<br>

x86 case it bit different as the delta between common_config and x86 is very minimal.

for arm64 case, Following configs needs to be duplicated in both clang and gcc.

CONFIG_RTE_CACHE_LINE_SIZE=128
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_LIBRTE_FM10K_PMD=n
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
CONFIG_RTE_LIBRTE_AVP_PMD=n
CONFIG_RTE_SCHED_VECTOR=n

That creates mutability issue. Creating a common common_armv8_linuxapp will
fix that issue.

Re: [PATCH 0/6] add clang compilation support for armv8a linuxapp

[Sekhar, Ashwin]

The warning comes only when CFLAGS "-g -ggdb" are given and this seems
to be an issue with clang. I am seeing some related bugs on llvm
mailing list.
https://www.mail-archive.com/llvm-bugs@lists.llvm.org/msg05498.html
http://lists.llvm.org/pipermail/llvm-bugs/2016-July/048288.html

Even a simple c program with a TLS variable creates this warning.
For eg: 
----------------- test.c -------------------
__thread int a;

int main() {
        return 0;
}
--------------------------------------------

$ gcc -g -ggdb test.c   
$ clang -g -ggdb test.c 
/usr/bin/ld: /tmp/test-50ceac.o(.debug_info+0x37): R_AARCH64_ABS64
used with TLS symbol a
$

Thanks
Ashwin

On Thu, 2017-05-11 at 11:29 +0530, Jerin Jacob wrote:
> -----Original Message-----
> > 
> > Date: Wed, 10 May 2017 03:16:37 -0700
> > From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> > To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
> >  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
> >  jianbo.liu@linaro.org, bruce.richardson@intel.com,
> >  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> > Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.c
> > om>
> > Subject: [dpdk-dev] [PATCH 0/6] add clang compilation support for
> > armv8a
> >  linuxapp
> > X-Mailer: git-send-email 2.13.0.rc1
> > 
> > This series of patches adds the clang compilation support for
> > armv8a linuxapp.
> > 
> > Patch 1 is basically for removing the usage of assembly directive
> > ".arch armv8-a+crc"
> > as this is not understood by clang. For removing these directives,
> > compilation of
> > armv8a crc32 support is made conditional and is only done for
> > machines which has
> > the crc extensions. Doing this avoids the need for having the
> > ".arch armv8-a+crc"
> > directives in the code.
> > 
> > Patch 2 adds the arm64-armv8a-linuxapp-clang defconfig.
> > 
> > Patch 3, 4, 5 and 6 are for fixing the compilation errors/warnings.
> There is warning on LD with clang. Could you please check it?
> 
>   INSTALL-MAP dpdk-pdump.map
>   LD testpmd
> /usr/bin/ld: build/lib/librte_eal.a(eal_thread.o)(.debug_info+0x37):
> R_AARCH64_ABS64 used with TLS symbol per_lcore__lcore_id
> /usr/bin/ld: build/lib/librte_eal.a(eal_thread.o)(.debug_info+0x54):
> R_AARCH64_ABS64 used with TLS symbol per_lcore__socket_id
> /usr/bin/ld: build/lib/librte_eal.a(eal_thread.o)(.debug_info+0x6a):
> R_AARCH64_ABS64 used with TLS symbol per_lcore__cpuset
> /usr/bin/ld: build/lib/librte_eal.a(eal_thread.o)(.debug_info+0xd2):
> R_AARCH64_ABS64 used with TLS symbol rte_gettid.per_lcore__thread_id
> /usr/bin/ld:
> build/lib/librte_eal.a(eal_interrupts.o)(.debug_info+0x38e):
> R_AARCH64_ABS64 used with TLS symbol per_lcore__epfd
> /usr/bin/ld:
> build/lib/librte_eal.a(eal_common_errno.o)(.debug_info+0x50):
> R_AARCH64_ABS64 used with TLS symbol rte_strerror.per_lcore_retval
> /usr/bin/ld:build/lib/librte_eal.a(eal_common_errno.o)(.debug_info+0x
> 91): R_AARCH64_ABS64 used with TLS symbol per_lcore__rte_errno
>   INSTALL-APP testpmd
> 
> $ clang -v
> Ubuntu clang version 3.6.0-2ubuntu1 (tags/RELEASE_360/final) (based
> on
> LLVM 3.6.0)
> Target: aarch64-unknown-linux-gnu
> Thread model: posix
> Found candidate GCC installation:
> /usr/bin/../lib/gcc/aarch64-linux-gnu/4.9
> Found candidate GCC installation:
> /usr/bin/../lib/gcc/aarch64-linux-gnu/4.9.2
> Found candidate GCC installation:
> /usr/bin/../lib/gcc/aarch64-linux-gnu/5.0.1
> Found candidate GCC installation: /usr/lib/gcc/aarch64-linux-gnu/4.9
> Found candidate GCC installation: /usr/lib/gcc/aarch64-linux-
> gnu/4.9.2
> Found candidate GCC installation: /usr/lib/gcc/aarch64-linux-
> gnu/5.0.1
> Selected GCC installation: /usr/bin/../lib/gcc/aarch64-linux-gnu/4.9
> Candidate multilib: .;@m64
> Selected multilib: .;@m64
> 
> 
> > 
> > 
> > Ashwin Sekhar T K (6):
> >   hash: compile armv8a CRC32 support conditionally
> >   config: add clang support for armv8a linuxapp
> >   net/thunderx: fix compile errors for armv8a clang
> >   acl: fix warning seen with armv8a clang
> >   eal/arm: fix warnings seen with armv8a clang
> >   eal: fix warning seen with armv8a clang
> > 
> >  config/defconfig_arm64-armv8a-linuxapp-clang       | 56
> > ++++++++++++++++++++++
> >  drivers/net/thunderx/base/nicvf_plat.h             |  2 +-
> >  lib/librte_acl/Makefile                            |  5 +-
> >  .../common/include/arch/arm/rte_byteorder.h        |  2 +-
> >  lib/librte_eal/linuxapp/eal/Makefile               |  4 ++
> >  lib/librte_hash/Makefile                           |  2 +
> >  lib/librte_hash/rte_crc_arm64.h                    |  4 --
> >  lib/librte_hash/rte_hash_crc.h                     |  2 +-
> >  8 files changed, 69 insertions(+), 8 deletions(-)
> >  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
> > 

[PATCH v2 0/6] Add clang compilation support for armv8a linuxapp

[Ashwin Sekhar T K]

This series of patches adds the clang compilation support for armv8a linuxapp.

Patch 1 is basically for removing the usage of assembly directive ".arch armv8-a+crc"
as this is not understood by clang. For removing these directives, compilation of
armv8a crc32 support is made conditional and is only done for machines which has
the crc extensions. Doing this avoids the need for having the ".arch armv8-a+crc"
directives in the code.

Patch 2 adds the arm64-armv8a-linuxapp-clang defconfig. It also moves all the common
defines to common_armv8a_config. Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain
only the defines related to toolchain.

Patch 3, 4, and 5 are for fixing the compilation errors/warnings.

Patch 6 adds an rte_pause() to a tight while loops in rte_eal_wait_lcore().
It fixes warning -Wempty-body seen with armv8a clang compilation.

v2:
 * Moved common defines from arm64-armv8a-linuxapp-gcc to common_armv8a_config
 * Removed the -Wno-empty-body flag from eal Makefile. Added rte_pause() to the
   while loop causing this warning.

Ashwin Sekhar T K (6):
  hash: compile armv8a CRC32 support conditionally
  config: add clang support for armv8a linuxapp
  net/thunderx: fix compile errors for armv8a clang
  acl: fix warning seen with armv8a clang
  eal/arm: fix warnings seen with armv8a clang
  eal: pause while busy-waiting for slave

 config/common_armv8a_linuxapp                      | 53 ++++++++++++++++++++++
 config/defconfig_arm64-armv8a-linuxapp-clang       | 35 ++++++++++++++
 config/defconfig_arm64-armv8a-linuxapp-gcc         | 23 +---------
 drivers/net/thunderx/base/nicvf_plat.h             |  2 +-
 lib/librte_acl/Makefile                            |  5 +-
 lib/librte_eal/common/eal_common_launch.c          |  3 +-
 .../common/include/arch/arm/rte_byteorder.h        |  2 +-
 lib/librte_hash/Makefile                           |  2 +
 lib/librte_hash/rte_crc_arm64.h                    |  4 --
 lib/librte_hash/rte_hash_crc.h                     |  2 +-
 10 files changed, 100 insertions(+), 31 deletions(-)
 create mode 100644 config/common_armv8a_linuxapp
 create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang

-- 
2.12.2

[PATCH v2 1/6] hash: compile armv8a CRC32 support conditionally

[Ashwin Sekhar T K]

Compile the armv8a CRC32 support only if the machine
has the CRC extensions i.e if RTE_MACHINE_CPUFLAG_CRC32
is defined.

Removed the .arch assembly directives as these are no
more necessary.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_hash/Makefile        | 2 ++
 lib/librte_hash/rte_crc_arm64.h | 4 ----
 lib/librte_hash/rte_hash_crc.h  | 2 +-
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/lib/librte_hash/Makefile b/lib/librte_hash/Makefile
index d856aa26d..9cf13a045 100644
--- a/lib/librte_hash/Makefile
+++ b/lib/librte_hash/Makefile
@@ -49,8 +49,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_HASH) += rte_fbk_hash.c
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include := rte_hash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_hash_crc.h
 ifeq ($(CONFIG_RTE_ARCH_ARM64),y)
+ifneq ($(findstring RTE_MACHINE_CPUFLAG_CRC32,$(CFLAGS)),)
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_crc_arm64.h
 endif
+endif
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_jhash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_thash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_fbk_hash.h
diff --git a/lib/librte_hash/rte_crc_arm64.h b/lib/librte_hash/rte_crc_arm64.h
index 7dd6334ee..91cde3b9d 100644
--- a/lib/librte_hash/rte_crc_arm64.h
+++ b/lib/librte_hash/rte_crc_arm64.h
@@ -52,7 +52,6 @@ extern "C" {
 static inline uint32_t
 crc32c_arm64_u8(uint8_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cb %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -63,7 +62,6 @@ crc32c_arm64_u8(uint8_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u16(uint16_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32ch %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -74,7 +72,6 @@ crc32c_arm64_u16(uint16_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u32(uint32_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cw %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -85,7 +82,6 @@ crc32c_arm64_u32(uint32_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u64(uint64_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cx %w[crc], %w[crc], %x[value]"
 			: [crc] "+r" (init_val)
diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index 0f485b854..808a082c5 100644
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -453,7 +453,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
 
 static uint8_t crc32_alg = CRC32_SW;
 
-#if defined(RTE_ARCH_ARM64)
+#if defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
 #include "rte_crc_arm64.h"
 #else
 
-- 
2.12.2

[PATCH v2 2/6] config: add clang support for armv8a linuxapp

[Ashwin Sekhar T K]

Moved all common defines from defconfig_arm64-armv8a-linuxapp-gcc
to common_armv8a_linuxapp.

Created new config arm64-armv8a-linuxapp-clang which adds the
clang support to armv8a.

Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain only the
CONFIG_RTE_TOOLCHAIN* defines and all other common defines are
inherited from common_armv8a_linuxapp.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 config/common_armv8a_linuxapp                | 53 ++++++++++++++++++++++++++++
 config/defconfig_arm64-armv8a-linuxapp-clang | 35 ++++++++++++++++++
 config/defconfig_arm64-armv8a-linuxapp-gcc   | 23 +-----------
 3 files changed, 89 insertions(+), 22 deletions(-)
 create mode 100644 config/common_armv8a_linuxapp
 create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang

diff --git a/config/common_armv8a_linuxapp b/config/common_armv8a_linuxapp
new file mode 100644
index 000000000..3d0967e99
--- /dev/null
+++ b/config/common_armv8a_linuxapp
@@ -0,0 +1,53 @@
+#   BSD LICENSE
+#
+#   Copyright (C) Cavium networks 2017. All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Cavium networks nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+#include "common_linuxapp"
+
+CONFIG_RTE_MACHINE="armv8a"
+
+CONFIG_RTE_ARCH="arm64"
+CONFIG_RTE_ARCH_ARM64=y
+CONFIG_RTE_ARCH_64=y
+
+CONFIG_RTE_FORCE_INTRINSICS=y
+
+# Maximum available cache line size in arm64 implementations.
+# Setting to maximum available cache line size in generic config
+# to address minimum DMA alignment across all arm64 implementations.
+CONFIG_RTE_CACHE_LINE_SIZE=128
+
+CONFIG_RTE_EAL_IGB_UIO=n
+
+CONFIG_RTE_LIBRTE_FM10K_PMD=n
+CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
+CONFIG_RTE_LIBRTE_AVP_PMD=n
+
+CONFIG_RTE_SCHED_VECTOR=n
diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang b/config/defconfig_arm64-armv8a-linuxapp-clang
new file mode 100644
index 000000000..43b70a28f
--- /dev/null
+++ b/config/defconfig_arm64-armv8a-linuxapp-clang
@@ -0,0 +1,35 @@
+#   BSD LICENSE
+#
+#   Copyright (C) Cavium networks 2017. All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Cavium networks nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+#include "common_armv8a_linuxapp"
+
+CONFIG_RTE_TOOLCHAIN="clang"
+CONFIG_RTE_TOOLCHAIN_CLANG=y
diff --git a/config/defconfig_arm64-armv8a-linuxapp-gcc b/config/defconfig_arm64-armv8a-linuxapp-gcc
index 9f327666e..761bbbd3b 100644
--- a/config/defconfig_arm64-armv8a-linuxapp-gcc
+++ b/config/defconfig_arm64-armv8a-linuxapp-gcc
@@ -29,28 +29,7 @@
 #   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-#include "common_linuxapp"
-
-CONFIG_RTE_MACHINE="armv8a"
-
-CONFIG_RTE_ARCH="arm64"
-CONFIG_RTE_ARCH_ARM64=y
-CONFIG_RTE_ARCH_64=y
-
-CONFIG_RTE_FORCE_INTRINSICS=y
+#include "common_armv8a_linuxapp"
 
 CONFIG_RTE_TOOLCHAIN="gcc"
 CONFIG_RTE_TOOLCHAIN_GCC=y
-
-# Maximum available cache line size in arm64 implementations.
-# Setting to maximum available cache line size in generic config
-# to address minimum DMA alignment across all arm64 implementations.
-CONFIG_RTE_CACHE_LINE_SIZE=128
-
-CONFIG_RTE_EAL_IGB_UIO=n
-
-CONFIG_RTE_LIBRTE_FM10K_PMD=n
-CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
-CONFIG_RTE_LIBRTE_AVP_PMD=n
-
-CONFIG_RTE_SCHED_VECTOR=n
-- 
2.12.2

[PATCH v2 3/6] net/thunderx: fix compile errors for armv8a clang

[Ashwin Sekhar T K]

Replaced usage of %a0 in inline assembly with [%x0]

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 drivers/net/thunderx/base/nicvf_plat.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/thunderx/base/nicvf_plat.h b/drivers/net/thunderx/base/nicvf_plat.h
index 36da12009..3536d8374 100644
--- a/drivers/net/thunderx/base/nicvf_plat.h
+++ b/drivers/net/thunderx/base/nicvf_plat.h
@@ -80,7 +80,7 @@
 /* ARM64 specific functions */
 #if defined(RTE_ARCH_ARM64)
 #define nicvf_prefetch_store_keep(_ptr) ({\
-	asm volatile("prfm pstl1keep, %a0\n" : : "p" (_ptr)); })
+	asm volatile("prfm pstl1keep, [%x0]\n" : : "r" (_ptr)); })
 
 
 #define NICVF_LOAD_PAIR(reg1, reg2, addr) ({		\
-- 
2.12.2

[PATCH v2 4/6] acl: fix warning seen with armv8a clang

[Ashwin Sekhar T K]

Fixed warning -Wunknown-warning-option seen with
armv8a clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_acl/Makefile | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index e2dacd606..b39b9b12f 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -51,7 +51,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
 
 ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
-CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
+CFLAGS_acl_run_neon.o += -flax-vector-conversions
+ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
+CFLAGS_acl_run_neon.o += -Wno-maybe-uninitialized
+endif
 else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
 else
-- 
2.12.2

[PATCH v2 5/6] eal/arm: fix warnings seen with armv8a clang

[Ashwin Sekhar T K]

Fixed warning -Wasm-operand-widths seen with armv8a
clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_eal/common/include/arch/arm/rte_byteorder.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
index 1b312b306..0a29f4bb4 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
@@ -52,7 +52,7 @@ static inline uint16_t rte_arch_bswap16(uint16_t _x)
 {
 	register uint16_t x = _x;
 
-	asm volatile ("rev16 %0,%1"
+	asm volatile ("rev16 %w0,%w1"
 		      : "=r" (x)
 		      : "r" (x)
 		      );
-- 
2.12.2

[PATCH v2 6/6] eal: pause while busy-waiting for slave

[Ashwin Sekhar T K]

Instead of simply busy-waiting for slave in rte_eal_wait_lcore()
do rte_pause(). This will give power savings.

This also fixes warning -Wempty-body seen with armv8a clang
compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 lib/librte_eal/common/eal_common_launch.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/eal_common_launch.c b/lib/librte_eal/common/eal_common_launch.c
index 229c3a034..184846606 100644
--- a/lib/librte_eal/common/eal_common_launch.c
+++ b/lib/librte_eal/common/eal_common_launch.c
@@ -54,7 +54,8 @@ rte_eal_wait_lcore(unsigned slave_id)
 		return 0;
 
 	while (lcore_config[slave_id].state != WAIT &&
-	       lcore_config[slave_id].state != FINISHED);
+	       lcore_config[slave_id].state != FINISHED)
+		rte_pause();
 
 	rte_rmb();
 
-- 
2.12.2

Re: [PATCH v2 2/6] config: add clang support for armv8a linuxapp

[Jerin Jacob]

-----Original Message-----
> Date: Thu, 11 May 2017 07:33:12 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: jerin.jacob@caviumnetworks.com, thomas@monjalon.net,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v2 2/6] config: add clang support for armv8a
>  linuxapp
> X-Mailer: git-send-email 2.12.2
> 
> Moved all common defines from defconfig_arm64-armv8a-linuxapp-gcc
> to common_armv8a_linuxapp.
> 
> Created new config arm64-armv8a-linuxapp-clang which adds the
> clang support to armv8a.
> 
> Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain only the
> CONFIG_RTE_TOOLCHAIN* defines and all other common defines are
> inherited from common_armv8a_linuxapp.
> 
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>

You can move this patch at the end of the series(i.e at 6/6) so that when you
introduce the clang config, it will build successfully.At 2/6 clang wont
build.

With that change:

Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

[PATCH v3 0/6] Add clang compilation support for armv8a linuxapp

[Ashwin Sekhar T K]

This series of patches adds the clang compilation support for armv8a linuxapp.

Patch 1 adds an rte_pause() to a tight while loop in rte_eal_wait_lcore().
It fixes warning -Wempty-body seen with armv8a clang compilation.

Patch 2 is basically for removing the usage of assembly directive ".arch armv8-a+crc"
as this is not understood by clang. For removing these directives, compilation of
armv8a crc32 support is made conditional and is only done for machines which has
the crc extensions. Doing this avoids the need for having the ".arch armv8-a+crc"
directives in the code.

Patch 3, 4, and 5 are for fixing the compilation errors/warnings.

Patch 6 adds the arm64-armv8a-linuxapp-clang defconfig. It also moves all the common
defines to common_armv8a_config. Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain
only the defines related to toolchain.

v3:
 * Moved [PATCH v2 6/6] to [PATCH v3 1/6] and moved [PATCH v2 2/6] to [PATCH v3 6/6].

v2:
 * Moved common defines from arm64-armv8a-linuxapp-gcc to common_armv8a_config
 * Removed the -Wno-empty-body flag from eal Makefile. Added rte_pause() to the
   while loop causing this warning.

Ashwin Sekhar T K (6):
  eal: pause while busy-waiting for slave
  hash: compile armv8a CRC32 support conditionally
  net/thunderx: fix compile errors for armv8a clang
  acl: fix warning seen with armv8a clang
  eal/arm: fix warnings seen with armv8a clang
  config: add clang support for armv8a linuxapp

 config/common_armv8a_linuxapp                      | 53 ++++++++++++++++++++++
 config/defconfig_arm64-armv8a-linuxapp-clang       | 35 ++++++++++++++
 config/defconfig_arm64-armv8a-linuxapp-gcc         | 23 +---------
 drivers/net/thunderx/base/nicvf_plat.h             |  2 +-
 lib/librte_acl/Makefile                            |  5 +-
 lib/librte_eal/common/eal_common_launch.c          |  3 +-
 .../common/include/arch/arm/rte_byteorder.h        |  2 +-
 lib/librte_hash/Makefile                           |  2 +
 lib/librte_hash/rte_crc_arm64.h                    |  4 --
 lib/librte_hash/rte_hash_crc.h                     |  2 +-
 10 files changed, 100 insertions(+), 31 deletions(-)
 create mode 100644 config/common_armv8a_linuxapp
 create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang

-- 
2.12.2

[PATCH v3 1/6] eal: pause while busy-waiting for slave

[Ashwin Sekhar T K]

Instead of simply busy-waiting for slave in rte_eal_wait_lcore()
do rte_pause(). This will give power savings.

This also fixes warning -Wempty-body seen with armv8a clang
compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Suggested-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_eal/common/eal_common_launch.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/eal_common_launch.c b/lib/librte_eal/common/eal_common_launch.c
index 229c3a034..184846606 100644
--- a/lib/librte_eal/common/eal_common_launch.c
+++ b/lib/librte_eal/common/eal_common_launch.c
@@ -54,7 +54,8 @@ rte_eal_wait_lcore(unsigned slave_id)
 		return 0;
 
 	while (lcore_config[slave_id].state != WAIT &&
-	       lcore_config[slave_id].state != FINISHED);
+	       lcore_config[slave_id].state != FINISHED)
+		rte_pause();
 
 	rte_rmb();
 
-- 
2.12.2

[PATCH v3 2/6] hash: compile armv8a CRC32 support conditionally

[Ashwin Sekhar T K]

Compile the armv8a CRC32 support only if the machine
has the CRC extensions i.e if RTE_MACHINE_CPUFLAG_CRC32
is defined.

Removed the .arch assembly directives as these are no
more necessary.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_hash/Makefile        | 2 ++
 lib/librte_hash/rte_crc_arm64.h | 4 ----
 lib/librte_hash/rte_hash_crc.h  | 2 +-
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/lib/librte_hash/Makefile b/lib/librte_hash/Makefile
index d856aa26d..9cf13a045 100644
--- a/lib/librte_hash/Makefile
+++ b/lib/librte_hash/Makefile
@@ -49,8 +49,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_HASH) += rte_fbk_hash.c
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include := rte_hash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_hash_crc.h
 ifeq ($(CONFIG_RTE_ARCH_ARM64),y)
+ifneq ($(findstring RTE_MACHINE_CPUFLAG_CRC32,$(CFLAGS)),)
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_crc_arm64.h
 endif
+endif
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_jhash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_thash.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_fbk_hash.h
diff --git a/lib/librte_hash/rte_crc_arm64.h b/lib/librte_hash/rte_crc_arm64.h
index 7dd6334ee..91cde3b9d 100644
--- a/lib/librte_hash/rte_crc_arm64.h
+++ b/lib/librte_hash/rte_crc_arm64.h
@@ -52,7 +52,6 @@ extern "C" {
 static inline uint32_t
 crc32c_arm64_u8(uint8_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cb %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -63,7 +62,6 @@ crc32c_arm64_u8(uint8_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u16(uint16_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32ch %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -74,7 +72,6 @@ crc32c_arm64_u16(uint16_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u32(uint32_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cw %w[crc], %w[crc], %w[value]"
 			: [crc] "+r" (init_val)
@@ -85,7 +82,6 @@ crc32c_arm64_u32(uint32_t data, uint32_t init_val)
 static inline uint32_t
 crc32c_arm64_u64(uint64_t data, uint32_t init_val)
 {
-	asm(".arch armv8-a+crc");
 	__asm__ volatile(
 			"crc32cx %w[crc], %w[crc], %x[value]"
 			: [crc] "+r" (init_val)
diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index 0f485b854..808a082c5 100644
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -453,7 +453,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
 
 static uint8_t crc32_alg = CRC32_SW;
 
-#if defined(RTE_ARCH_ARM64)
+#if defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
 #include "rte_crc_arm64.h"
 #else
 
-- 
2.12.2

[PATCH v3 3/6] net/thunderx: fix compile errors for armv8a clang

[Ashwin Sekhar T K]

Replaced usage of %a0 in inline assembly with [%x0]

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 drivers/net/thunderx/base/nicvf_plat.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/thunderx/base/nicvf_plat.h b/drivers/net/thunderx/base/nicvf_plat.h
index 36da12009..3536d8374 100644
--- a/drivers/net/thunderx/base/nicvf_plat.h
+++ b/drivers/net/thunderx/base/nicvf_plat.h
@@ -80,7 +80,7 @@
 /* ARM64 specific functions */
 #if defined(RTE_ARCH_ARM64)
 #define nicvf_prefetch_store_keep(_ptr) ({\
-	asm volatile("prfm pstl1keep, %a0\n" : : "p" (_ptr)); })
+	asm volatile("prfm pstl1keep, [%x0]\n" : : "r" (_ptr)); })
 
 
 #define NICVF_LOAD_PAIR(reg1, reg2, addr) ({		\
-- 
2.12.2

[PATCH v3 4/6] acl: fix warning seen with armv8a clang

[Ashwin Sekhar T K]

Fixed warning -Wunknown-warning-option seen with
armv8a clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_acl/Makefile | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index e2dacd606..b39b9b12f 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -51,7 +51,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
 
 ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
-CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
+CFLAGS_acl_run_neon.o += -flax-vector-conversions
+ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
+CFLAGS_acl_run_neon.o += -Wno-maybe-uninitialized
+endif
 else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
 else
-- 
2.12.2

[PATCH v3 5/6] eal/arm: fix warnings seen with armv8a clang

[Ashwin Sekhar T K]

Fixed warning -Wasm-operand-widths seen with armv8a
clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_eal/common/include/arch/arm/rte_byteorder.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
index 1b312b306..0a29f4bb4 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
@@ -52,7 +52,7 @@ static inline uint16_t rte_arch_bswap16(uint16_t _x)
 {
 	register uint16_t x = _x;
 
-	asm volatile ("rev16 %0,%1"
+	asm volatile ("rev16 %w0,%w1"
 		      : "=r" (x)
 		      : "r" (x)
 		      );
-- 
2.12.2

[PATCH v3 6/6] config: add clang support for armv8a linuxapp

[Ashwin Sekhar T K]

Moved all common defines from defconfig_arm64-armv8a-linuxapp-gcc
to common_armv8a_linuxapp.

Created new config arm64-armv8a-linuxapp-clang which adds the
clang support to armv8a.

Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain only the
CONFIG_RTE_TOOLCHAIN* defines and all other common defines are
inherited from common_armv8a_linuxapp.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 config/common_armv8a_linuxapp                | 53 ++++++++++++++++++++++++++++
 config/defconfig_arm64-armv8a-linuxapp-clang | 35 ++++++++++++++++++
 config/defconfig_arm64-armv8a-linuxapp-gcc   | 23 +-----------
 3 files changed, 89 insertions(+), 22 deletions(-)
 create mode 100644 config/common_armv8a_linuxapp
 create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang

diff --git a/config/common_armv8a_linuxapp b/config/common_armv8a_linuxapp
new file mode 100644
index 000000000..3d0967e99
--- /dev/null
+++ b/config/common_armv8a_linuxapp
@@ -0,0 +1,53 @@
+#   BSD LICENSE
+#
+#   Copyright (C) Cavium networks 2017. All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Cavium networks nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+#include "common_linuxapp"
+
+CONFIG_RTE_MACHINE="armv8a"
+
+CONFIG_RTE_ARCH="arm64"
+CONFIG_RTE_ARCH_ARM64=y
+CONFIG_RTE_ARCH_64=y
+
+CONFIG_RTE_FORCE_INTRINSICS=y
+
+# Maximum available cache line size in arm64 implementations.
+# Setting to maximum available cache line size in generic config
+# to address minimum DMA alignment across all arm64 implementations.
+CONFIG_RTE_CACHE_LINE_SIZE=128
+
+CONFIG_RTE_EAL_IGB_UIO=n
+
+CONFIG_RTE_LIBRTE_FM10K_PMD=n
+CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
+CONFIG_RTE_LIBRTE_AVP_PMD=n
+
+CONFIG_RTE_SCHED_VECTOR=n
diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang b/config/defconfig_arm64-armv8a-linuxapp-clang
new file mode 100644
index 000000000..43b70a28f
--- /dev/null
+++ b/config/defconfig_arm64-armv8a-linuxapp-clang
@@ -0,0 +1,35 @@
+#   BSD LICENSE
+#
+#   Copyright (C) Cavium networks 2017. All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Cavium networks nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+#include "common_armv8a_linuxapp"
+
+CONFIG_RTE_TOOLCHAIN="clang"
+CONFIG_RTE_TOOLCHAIN_CLANG=y
diff --git a/config/defconfig_arm64-armv8a-linuxapp-gcc b/config/defconfig_arm64-armv8a-linuxapp-gcc
index 9f327666e..761bbbd3b 100644
--- a/config/defconfig_arm64-armv8a-linuxapp-gcc
+++ b/config/defconfig_arm64-armv8a-linuxapp-gcc
@@ -29,28 +29,7 @@
 #   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-#include "common_linuxapp"
-
-CONFIG_RTE_MACHINE="armv8a"
-
-CONFIG_RTE_ARCH="arm64"
-CONFIG_RTE_ARCH_ARM64=y
-CONFIG_RTE_ARCH_64=y
-
-CONFIG_RTE_FORCE_INTRINSICS=y
+#include "common_armv8a_linuxapp"
 
 CONFIG_RTE_TOOLCHAIN="gcc"
 CONFIG_RTE_TOOLCHAIN_GCC=y
-
-# Maximum available cache line size in arm64 implementations.
-# Setting to maximum available cache line size in generic config
-# to address minimum DMA alignment across all arm64 implementations.
-CONFIG_RTE_CACHE_LINE_SIZE=128
-
-CONFIG_RTE_EAL_IGB_UIO=n
-
-CONFIG_RTE_LIBRTE_FM10K_PMD=n
-CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
-CONFIG_RTE_LIBRTE_AVP_PMD=n
-
-CONFIG_RTE_SCHED_VECTOR=n
-- 
2.12.2

Re: [PATCH v3 6/6] config: add clang support for armv8a linuxapp

[Jianbo Liu]

On 12 May 2017 at 13:45, Ashwin Sekhar T K
<ashwin.sekhar@caviumnetworks.com> wrote:
> Moved all common defines from defconfig_arm64-armv8a-linuxapp-gcc
> to common_armv8a_linuxapp.
>
> Created new config arm64-armv8a-linuxapp-clang which adds the
> clang support to armv8a.
>
> Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain only the
> CONFIG_RTE_TOOLCHAIN* defines and all other common defines are
> inherited from common_armv8a_linuxapp.
>
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> ---
>  config/common_armv8a_linuxapp                | 53 ++++++++++++++++++++++++++++
>  config/defconfig_arm64-armv8a-linuxapp-clang | 35 ++++++++++++++++++
>  config/defconfig_arm64-armv8a-linuxapp-gcc   | 23 +-----------
>  3 files changed, 89 insertions(+), 22 deletions(-)
>  create mode 100644 config/common_armv8a_linuxapp
>  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
>

Acked-by: Jianbo Liu <jianbo.liu@linaro.org>

Re: [PATCH v3 6/6] config: add clang support for armv8a linuxapp

[Hemant Agrawal]

On 5/12/2017 11:40 AM, Jianbo Liu wrote:
> On 12 May 2017 at 13:45, Ashwin Sekhar T K
> <ashwin.sekhar@caviumnetworks.com> wrote:
>> Moved all common defines from defconfig_arm64-armv8a-linuxapp-gcc
>> to common_armv8a_linuxapp.
>>
>> Created new config arm64-armv8a-linuxapp-clang which adds the
>> clang support to armv8a.
>>
>> Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain only the
>> CONFIG_RTE_TOOLCHAIN* defines and all other common defines are
>> inherited from common_armv8a_linuxapp.
>>
>> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
>> Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>> ---
>>  config/common_armv8a_linuxapp                | 53 ++++++++++++++++++++++++++++
>>  config/defconfig_arm64-armv8a-linuxapp-clang | 35 ++++++++++++++++++
>>  config/defconfig_arm64-armv8a-linuxapp-gcc   | 23 +-----------
>>  3 files changed, 89 insertions(+), 22 deletions(-)
>>  create mode 100644 config/common_armv8a_linuxapp
>>  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
>>
>
> Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [PATCH v3 0/6] Add clang compilation support for armv8a linuxapp

[Hemant Agrawal]

On 5/12/2017 11:15 AM, Ashwin Sekhar T K wrote:
> This series of patches adds the clang compilation support for armv8a linuxapp.
>
> Patch 1 adds an rte_pause() to a tight while loop in rte_eal_wait_lcore().
> It fixes warning -Wempty-body seen with armv8a clang compilation.
>
> Patch 2 is basically for removing the usage of assembly directive ".arch armv8-a+crc"
> as this is not understood by clang. For removing these directives, compilation of
> armv8a crc32 support is made conditional and is only done for machines which has
> the crc extensions. Doing this avoids the need for having the ".arch armv8-a+crc"
> directives in the code.
>
> Patch 3, 4, and 5 are for fixing the compilation errors/warnings.
>
> Patch 6 adds the arm64-armv8a-linuxapp-clang defconfig. It also moves all the common
> defines to common_armv8a_config. Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain
> only the defines related to toolchain.
>
> v3:
>  * Moved [PATCH v2 6/6] to [PATCH v3 1/6] and moved [PATCH v2 2/6] to [PATCH v3 6/6].
>
> v2:
>  * Moved common defines from arm64-armv8a-linuxapp-gcc to common_armv8a_config
>  * Removed the -Wno-empty-body flag from eal Makefile. Added rte_pause() to the
>    while loop causing this warning.
>
> Ashwin Sekhar T K (6):
>   eal: pause while busy-waiting for slave
>   hash: compile armv8a CRC32 support conditionally
>   net/thunderx: fix compile errors for armv8a clang
>   acl: fix warning seen with armv8a clang
>   eal/arm: fix warnings seen with armv8a clang
>   config: add clang support for armv8a linuxapp
>
>  config/common_armv8a_linuxapp                      | 53 ++++++++++++++++++++++
>  config/defconfig_arm64-armv8a-linuxapp-clang       | 35 ++++++++++++++
>  config/defconfig_arm64-armv8a-linuxapp-gcc         | 23 +---------
>  drivers/net/thunderx/base/nicvf_plat.h             |  2 +-
>  lib/librte_acl/Makefile                            |  5 +-
>  lib/librte_eal/common/eal_common_launch.c          |  3 +-
>  .../common/include/arch/arm/rte_byteorder.h        |  2 +-
>  lib/librte_hash/Makefile                           |  2 +
>  lib/librte_hash/rte_crc_arm64.h                    |  4 --
>  lib/librte_hash/rte_hash_crc.h                     |  2 +-
>  10 files changed, 100 insertions(+), 31 deletions(-)
>  create mode 100644 config/common_armv8a_linuxapp
>  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
>
Series
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [PATCH v3 0/6] Add clang compilation support for armv8a linuxapp

[Thomas Monjalon]

> > Ashwin Sekhar T K (6):
> >   eal: pause while busy-waiting for slave
> >   hash: compile armv8a CRC32 support conditionally
> >   net/thunderx: fix compile errors for armv8a clang
> >   acl: fix warning seen with armv8a clang
> >   eal/arm: fix warnings seen with armv8a clang
> >   config: add clang support for armv8a linuxapp
> 
> Series
> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Applied, thanks