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* [PATCH 1/2] drm/i915: Try harder to reset the GPU
@ 2017-05-16 13:14 Chris Wilson
  2017-05-16 13:14 ` [PATCH 2/2] drm/i915: Reorder media/render reset on g4x Chris Wilson
                   ` (2 more replies)
  0 siblings, 3 replies; 9+ messages in thread
From: Chris Wilson @ 2017-05-16 13:14 UTC (permalink / raw)
  To: intel-gfx

Repeat the reset a couple of times if at first we do not succeed.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20170513083726.502-1-chris@chris-wilson.co.uk
---
 drivers/gpu/drm/i915/intel_uncore.c | 44 +++++++++++++++++++++----------------
 1 file changed, 25 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 71b9b387ad04..fc3da0a6fdbb 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1463,9 +1463,10 @@ int i915_reg_read_ioctl(struct drm_device *dev,
 	return ret;
 }
 
-static int i915_reset_complete(struct pci_dev *pdev)
+static bool i915_reset_complete(struct pci_dev *pdev)
 {
 	u8 gdrst;
+
 	pci_read_config_byte(pdev, I915_GDRST, &gdrst);
 	return (gdrst & GRDOM_RESET_STATUS) == 0;
 }
@@ -1476,15 +1477,16 @@ static int i915_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask
 
 	/* assert reset for at least 20 usec */
 	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
-	udelay(20);
+	usleep_range(50, 200);
 	pci_write_config_byte(pdev, I915_GDRST, 0);
 
 	return wait_for(i915_reset_complete(pdev), 500);
 }
 
-static int g4x_reset_complete(struct pci_dev *pdev)
+static bool g4x_reset_complete(struct pci_dev *pdev)
 {
 	u8 gdrst;
+
 	pci_read_config_byte(pdev, I915_GDRST, &gdrst);
 	return (gdrst & GRDOM_RESET_ENABLE) == 0;
 }
@@ -1492,6 +1494,7 @@ static int g4x_reset_complete(struct pci_dev *pdev)
 static int g33_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
 {
 	struct pci_dev *pdev = dev_priv->drm.pdev;
+
 	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
 	return wait_for(g4x_reset_complete(pdev), 500);
 }
@@ -1505,7 +1508,7 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
 			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
 	ret =  wait_for(g4x_reset_complete(pdev), 500);
 	if (ret)
-		return ret;
+		goto out;
 
 	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
 	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
@@ -1514,16 +1517,14 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
 	pci_write_config_byte(pdev, I915_GDRST,
 			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
 	ret =  wait_for(g4x_reset_complete(pdev), 500);
-	if (ret)
-		return ret;
 
 	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
 	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);
 	POSTING_READ(VDECCLK_GATE_D);
 
+out:
 	pci_write_config_byte(pdev, I915_GDRST, 0);
-
-	return 0;
+	return ret;
 }
 
 static int ironlake_do_reset(struct drm_i915_private *dev_priv,
@@ -1531,25 +1532,21 @@ static int ironlake_do_reset(struct drm_i915_private *dev_priv,
 {
 	int ret;
 
-	I915_WRITE(ILK_GDSR,
-		   ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
+	I915_WRITE(ILK_GDSR, ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
 	ret = intel_wait_for_register(dev_priv,
 				      ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0,
 				      500);
 	if (ret)
-		return ret;
+		goto out;
 
-	I915_WRITE(ILK_GDSR,
-		   ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
+	I915_WRITE(ILK_GDSR, ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
 	ret = intel_wait_for_register(dev_priv,
 				      ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0,
 				      500);
-	if (ret)
-		return ret;
-
+out:
 	I915_WRITE(ILK_GDSR, 0);
-
-	return 0;
+	POSTING_READ(ILK_GDSR);
+	return ret;
 }
 
 /* Reset the hardware domains (GENX_GRDOM_*) specified by mask */
@@ -1758,8 +1755,11 @@ static reset_func intel_get_gpu_reset(struct drm_i915_private *dev_priv)
 int intel_gpu_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
 {
 	reset_func reset;
+	int retry;
 	int ret;
 
+	might_sleep();
+
 	reset = intel_get_gpu_reset(dev_priv);
 	if (reset == NULL)
 		return -ENODEV;
@@ -1768,7 +1768,13 @@ int intel_gpu_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
 	 * request may be dropped and never completes (causing -EIO).
 	 */
 	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
-	ret = reset(dev_priv, engine_mask);
+	for (retry = 0; retry < 3; retry++) {
+		ret = reset(dev_priv, engine_mask);
+		if (ret != -ETIMEDOUT)
+			break;
+
+		cond_resched();
+	}
 	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 
 	return ret;
-- 
2.11.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915: Reorder media/render reset on g4x
  2017-05-16 13:14 [PATCH 1/2] drm/i915: Try harder to reset the GPU Chris Wilson
@ 2017-05-16 13:14 ` Chris Wilson
  2017-05-16 13:38   ` Mika Kuoppala
  2017-05-16 13:55 ` [PATCH 1/2] drm/i915: Try harder to reset the GPU Mika Kuoppala
  2017-05-16 14:16 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
  2 siblings, 1 reply; 9+ messages in thread
From: Chris Wilson @ 2017-05-16 13:14 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mika Kuoppala

Ville found a reference to WaMediaResetBeforeFullReset which we presume
means that we should simply do the media reset first.

References: https://bugs.freedesktop.org/show_bug.cgi?id=100942
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index fc3da0a6fdbb..c3d0d81b50e4 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1504,12 +1504,6 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
 	struct pci_dev *pdev = dev_priv->drm.pdev;
 	int ret;
 
-	pci_write_config_byte(pdev, I915_GDRST,
-			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
-	ret =  wait_for(g4x_reset_complete(pdev), 500);
-	if (ret)
-		goto out;
-
 	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
 	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
 	POSTING_READ(VDECCLK_GATE_D);
@@ -1517,11 +1511,17 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
 	pci_write_config_byte(pdev, I915_GDRST,
 			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
 	ret =  wait_for(g4x_reset_complete(pdev), 500);
+	if (ret)
+		goto out;
 
 	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
 	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);
 	POSTING_READ(VDECCLK_GATE_D);
 
+	pci_write_config_byte(pdev, I915_GDRST,
+			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
+	ret =  wait_for(g4x_reset_complete(pdev), 500);
+
 out:
 	pci_write_config_byte(pdev, I915_GDRST, 0);
 	return ret;
-- 
2.11.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: Reorder media/render reset on g4x
  2017-05-16 13:14 ` [PATCH 2/2] drm/i915: Reorder media/render reset on g4x Chris Wilson
@ 2017-05-16 13:38   ` Mika Kuoppala
  2017-05-17 11:40     ` Ville Syrjälä
  2017-05-17 12:05     ` Chris Wilson
  0 siblings, 2 replies; 9+ messages in thread
From: Mika Kuoppala @ 2017-05-16 13:38 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Ville found a reference to WaMediaResetBeforeFullReset which we presume
> means that we should simply do the media reset first.

Yesterday I reordered the resets but I recall it didnt help.
I will retry but regardless yeah resetting media first makes
sense.

>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=100942
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index fc3da0a6fdbb..c3d0d81b50e4 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1504,12 +1504,6 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>  	struct pci_dev *pdev = dev_priv->drm.pdev;
>  	int ret;
>  
> -	pci_write_config_byte(pdev, I915_GDRST,
> -			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
> -	ret =  wait_for(g4x_reset_complete(pdev), 500);
> -	if (ret)
> -		goto out;
> -
>  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
>  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
>  	POSTING_READ(VDECCLK_GATE_D);
> @@ -1517,11 +1511,17 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>  	pci_write_config_byte(pdev, I915_GDRST,
>  			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
>  	ret =  wait_for(g4x_reset_complete(pdev), 500);
> +	if (ret)
> +		goto out;
>

We should restore the WaVcp... state if we fail. Not that it
was right to begin with.

-Mika

>  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
>  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);
>  	POSTING_READ(VDECCLK_GATE_D);
>  
> +	pci_write_config_byte(pdev, I915_GDRST,
> +			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
> +	ret =  wait_for(g4x_reset_complete(pdev), 500);
> +
>  out:
>  	pci_write_config_byte(pdev, I915_GDRST, 0);
>  	return ret;
> -- 
> 2.11.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: Try harder to reset the GPU
  2017-05-16 13:14 [PATCH 1/2] drm/i915: Try harder to reset the GPU Chris Wilson
  2017-05-16 13:14 ` [PATCH 2/2] drm/i915: Reorder media/render reset on g4x Chris Wilson
@ 2017-05-16 13:55 ` Mika Kuoppala
  2017-05-17 11:51   ` Chris Wilson
  2017-05-16 14:16 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
  2 siblings, 1 reply; 9+ messages in thread
From: Mika Kuoppala @ 2017-05-16 13:55 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Repeat the reset a couple of times if at first we do not succeed.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Link:
> http://patchwork.freedesktop.org/patch/msgid/20170513083726.502-1-chris@chris-wilson.co.uk

Seems that this is already merged but FWIW.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 44 +++++++++++++++++++++----------------
>  1 file changed, 25 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 71b9b387ad04..fc3da0a6fdbb 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1463,9 +1463,10 @@ int i915_reg_read_ioctl(struct drm_device *dev,
>  	return ret;
>  }
>  
> -static int i915_reset_complete(struct pci_dev *pdev)
> +static bool i915_reset_complete(struct pci_dev *pdev)
>  {
>  	u8 gdrst;
> +
>  	pci_read_config_byte(pdev, I915_GDRST, &gdrst);
>  	return (gdrst & GRDOM_RESET_STATUS) == 0;
>  }
> @@ -1476,15 +1477,16 @@ static int i915_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask
>  
>  	/* assert reset for at least 20 usec */
>  	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
> -	udelay(20);
> +	usleep_range(50, 200);
>  	pci_write_config_byte(pdev, I915_GDRST, 0);
>  
>  	return wait_for(i915_reset_complete(pdev), 500);
>  }
>  
> -static int g4x_reset_complete(struct pci_dev *pdev)
> +static bool g4x_reset_complete(struct pci_dev *pdev)
>  {
>  	u8 gdrst;
> +
>  	pci_read_config_byte(pdev, I915_GDRST, &gdrst);
>  	return (gdrst & GRDOM_RESET_ENABLE) == 0;
>  }
> @@ -1492,6 +1494,7 @@ static int g4x_reset_complete(struct pci_dev *pdev)
>  static int g33_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>  {
>  	struct pci_dev *pdev = dev_priv->drm.pdev;
> +
>  	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
>  	return wait_for(g4x_reset_complete(pdev), 500);
>  }
> @@ -1505,7 +1508,7 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>  			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
>  	ret =  wait_for(g4x_reset_complete(pdev), 500);
>  	if (ret)
> -		return ret;
> +		goto out;
>  
>  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
>  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
> @@ -1514,16 +1517,14 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>  	pci_write_config_byte(pdev, I915_GDRST,
>  			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
>  	ret =  wait_for(g4x_reset_complete(pdev), 500);
> -	if (ret)
> -		return ret;
>  
>  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
>  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);
>  	POSTING_READ(VDECCLK_GATE_D);
>  
> +out:
>  	pci_write_config_byte(pdev, I915_GDRST, 0);
> -
> -	return 0;
> +	return ret;
>  }
>  
>  static int ironlake_do_reset(struct drm_i915_private *dev_priv,
> @@ -1531,25 +1532,21 @@ static int ironlake_do_reset(struct drm_i915_private *dev_priv,
>  {
>  	int ret;
>  
> -	I915_WRITE(ILK_GDSR,
> -		   ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
> +	I915_WRITE(ILK_GDSR, ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
>  	ret = intel_wait_for_register(dev_priv,
>  				      ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0,
>  				      500);
>  	if (ret)
> -		return ret;
> +		goto out;
>  
> -	I915_WRITE(ILK_GDSR,
> -		   ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
> +	I915_WRITE(ILK_GDSR, ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
>  	ret = intel_wait_for_register(dev_priv,
>  				      ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0,
>  				      500);
> -	if (ret)
> -		return ret;
> -
> +out:
>  	I915_WRITE(ILK_GDSR, 0);
> -
> -	return 0;
> +	POSTING_READ(ILK_GDSR);
> +	return ret;
>  }
>  
>  /* Reset the hardware domains (GENX_GRDOM_*) specified by mask */
> @@ -1758,8 +1755,11 @@ static reset_func intel_get_gpu_reset(struct drm_i915_private *dev_priv)
>  int intel_gpu_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>  {
>  	reset_func reset;
> +	int retry;
>  	int ret;
>  
> +	might_sleep();
> +
>  	reset = intel_get_gpu_reset(dev_priv);
>  	if (reset == NULL)
>  		return -ENODEV;
> @@ -1768,7 +1768,13 @@ int intel_gpu_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>  	 * request may be dropped and never completes (causing -EIO).
>  	 */
>  	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
> -	ret = reset(dev_priv, engine_mask);
> +	for (retry = 0; retry < 3; retry++) {
> +		ret = reset(dev_priv, engine_mask);
> +		if (ret != -ETIMEDOUT)
> +			break;
> +
> +		cond_resched();
> +	}
>  	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
>  
>  	return ret;
> -- 
> 2.11.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Try harder to reset the GPU
  2017-05-16 13:14 [PATCH 1/2] drm/i915: Try harder to reset the GPU Chris Wilson
  2017-05-16 13:14 ` [PATCH 2/2] drm/i915: Reorder media/render reset on g4x Chris Wilson
  2017-05-16 13:55 ` [PATCH 1/2] drm/i915: Try harder to reset the GPU Mika Kuoppala
@ 2017-05-16 14:16 ` Patchwork
  2 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2017-05-16 14:16 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Try harder to reset the GPU
URL   : https://patchwork.freedesktop.org/series/24505/
State : success

== Summary ==

Series 24505v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/24505/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:452s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:433s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:589s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:512s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:491s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:492s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:418s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:413s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time:423s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:498s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:474s
fi-kbl-7500u     total:278  pass:255  dwarn:5   dfail:0   fail:0   skip:18  time:462s
fi-kbl-7560u     total:278  pass:263  dwarn:5   dfail:0   fail:0   skip:10  time:582s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:463s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time:578s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:469s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:502s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:442s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:543s
fi-snb-2600      total:278  pass:248  dwarn:0   dfail:0   fail:1   skip:29  time:409s

1ccfa1579c1dd3e45e4d9d5ef44329f04a77910e drm-tip: 2017y-05m-16d-13h-14m-11s UTC integration manifest
82bf9db drm/i915: Reorder media/render reset on g4x

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4710/
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^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: Reorder media/render reset on g4x
  2017-05-16 13:38   ` Mika Kuoppala
@ 2017-05-17 11:40     ` Ville Syrjälä
  2017-05-17 11:48       ` Mika Kuoppala
  2017-05-17 12:05     ` Chris Wilson
  1 sibling, 1 reply; 9+ messages in thread
From: Ville Syrjälä @ 2017-05-17 11:40 UTC (permalink / raw)
  To: Mika Kuoppala; +Cc: intel-gfx

On Tue, May 16, 2017 at 04:38:01PM +0300, Mika Kuoppala wrote:
> Chris Wilson <chris@chris-wilson.co.uk> writes:
> 
> > Ville found a reference to WaMediaResetBeforeFullReset which we presume
> > means that we should simply do the media reset first.
> 
> Yesterday I reordered the resets but I recall it didnt help.
> I will retry but regardless yeah resetting media first makes
> sense.
> 
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=100942
> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> > index fc3da0a6fdbb..c3d0d81b50e4 100644
> > --- a/drivers/gpu/drm/i915/intel_uncore.c
> > +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > @@ -1504,12 +1504,6 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
> >  	struct pci_dev *pdev = dev_priv->drm.pdev;
> >  	int ret;
> >  
> > -	pci_write_config_byte(pdev, I915_GDRST,
> > -			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
> > -	ret =  wait_for(g4x_reset_complete(pdev), 500);
> > -	if (ret)
> > -		goto out;
> > -
> >  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
> >  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
> >  	POSTING_READ(VDECCLK_GATE_D);
> > @@ -1517,11 +1511,17 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
> >  	pci_write_config_byte(pdev, I915_GDRST,
> >  			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
> >  	ret =  wait_for(g4x_reset_complete(pdev), 500);
> > +	if (ret)
> > +		goto out;
> >
> 
> We should restore the WaVcp... state if we fail. Not that it
> was right to begin with.

I had it that way so that one could figure out which part of the reset
failed by examining the registers afterwards. If we change that then
we should add more debug/error prints to let us know exactly what failed.

> 
> -Mika
> 
> >  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
> >  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);
> >  	POSTING_READ(VDECCLK_GATE_D);
> >  
> > +	pci_write_config_byte(pdev, I915_GDRST,
> > +			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
> > +	ret =  wait_for(g4x_reset_complete(pdev), 500);
> > +
> >  out:
> >  	pci_write_config_byte(pdev, I915_GDRST, 0);
> >  	return ret;
> > -- 
> > 2.11.0

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: Reorder media/render reset on g4x
  2017-05-17 11:40     ` Ville Syrjälä
@ 2017-05-17 11:48       ` Mika Kuoppala
  0 siblings, 0 replies; 9+ messages in thread
From: Mika Kuoppala @ 2017-05-17 11:48 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

Ville Syrjälä <ville.syrjala@linux.intel.com> writes:

> On Tue, May 16, 2017 at 04:38:01PM +0300, Mika Kuoppala wrote:
>> Chris Wilson <chris@chris-wilson.co.uk> writes:
>> 
>> > Ville found a reference to WaMediaResetBeforeFullReset which we presume
>> > means that we should simply do the media reset first.
>> 
>> Yesterday I reordered the resets but I recall it didnt help.
>> I will retry but regardless yeah resetting media first makes
>> sense.
>> 
>> >
>> > References: https://bugs.freedesktop.org/show_bug.cgi?id=100942
>> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++------
>> >  1 file changed, 6 insertions(+), 6 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
>> > index fc3da0a6fdbb..c3d0d81b50e4 100644
>> > --- a/drivers/gpu/drm/i915/intel_uncore.c
>> > +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> > @@ -1504,12 +1504,6 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>> >  	struct pci_dev *pdev = dev_priv->drm.pdev;
>> >  	int ret;
>> >  
>> > -	pci_write_config_byte(pdev, I915_GDRST,
>> > -			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
>> > -	ret =  wait_for(g4x_reset_complete(pdev), 500);
>> > -	if (ret)
>> > -		goto out;
>> > -
>> >  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
>> >  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
>> >  	POSTING_READ(VDECCLK_GATE_D);
>> > @@ -1517,11 +1511,17 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>> >  	pci_write_config_byte(pdev, I915_GDRST,
>> >  			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
>> >  	ret =  wait_for(g4x_reset_complete(pdev), 500);
>> > +	if (ret)
>> > +		goto out;
>> >
>> 
>> We should restore the WaVcp... state if we fail. Not that it
>> was right to begin with.
>
> I had it that way so that one could figure out which part of the reset
> failed by examining the registers afterwards. If we change that then
> we should add more debug/error prints to let us know exactly what failed.
>

Well with that explanation,
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

Sadly, the reset can still fail even with this applied.
-Mika

>> 
>> -Mika
>> 
>> >  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
>> >  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);
>> >  	POSTING_READ(VDECCLK_GATE_D);
>> >  
>> > +	pci_write_config_byte(pdev, I915_GDRST,
>> > +			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
>> > +	ret =  wait_for(g4x_reset_complete(pdev), 500);
>> > +
>> >  out:
>> >  	pci_write_config_byte(pdev, I915_GDRST, 0);
>> >  	return ret;
>> > -- 
>> > 2.11.0
>
> -- 
> Ville Syrjälä
> Intel OTC
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: Try harder to reset the GPU
  2017-05-16 13:55 ` [PATCH 1/2] drm/i915: Try harder to reset the GPU Mika Kuoppala
@ 2017-05-17 11:51   ` Chris Wilson
  0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2017-05-17 11:51 UTC (permalink / raw)
  To: Mika Kuoppala; +Cc: intel-gfx

On Tue, May 16, 2017 at 04:55:29PM +0300, Mika Kuoppala wrote:
> Chris Wilson <chris@chris-wilson.co.uk> writes:
> 
> > Repeat the reset a couple of times if at first we do not succeed.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Link:
> > http://patchwork.freedesktop.org/patch/msgid/20170513083726.502-1-chris@chris-wilson.co.uk
> 
> Seems that this is already merged but FWIW.

No, just the only way to get it tested on the right machines was to
apply it into a topic branch.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: Reorder media/render reset on g4x
  2017-05-16 13:38   ` Mika Kuoppala
  2017-05-17 11:40     ` Ville Syrjälä
@ 2017-05-17 12:05     ` Chris Wilson
  1 sibling, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2017-05-17 12:05 UTC (permalink / raw)
  To: Mika Kuoppala; +Cc: intel-gfx

On Tue, May 16, 2017 at 04:38:01PM +0300, Mika Kuoppala wrote:
> Chris Wilson <chris@chris-wilson.co.uk> writes:
> 
> > Ville found a reference to WaMediaResetBeforeFullReset which we presume
> > means that we should simply do the media reset first.
> 
> Yesterday I reordered the resets but I recall it didnt help.
> I will retry but regardless yeah resetting media first makes
> sense.
> 
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=100942
> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> > index fc3da0a6fdbb..c3d0d81b50e4 100644
> > --- a/drivers/gpu/drm/i915/intel_uncore.c
> > +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > @@ -1504,12 +1504,6 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
> >  	struct pci_dev *pdev = dev_priv->drm.pdev;
> >  	int ret;
> >  
> > -	pci_write_config_byte(pdev, I915_GDRST,
> > -			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
> > -	ret =  wait_for(g4x_reset_complete(pdev), 500);
> > -	if (ret)
> > -		goto out;
> > -
> >  	/* WaVcpClkGateDisableForMediaReset:ctg,elk */
> >  	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
> >  	POSTING_READ(VDECCLK_GATE_D);
> > @@ -1517,11 +1511,17 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
> >  	pci_write_config_byte(pdev, I915_GDRST,
> >  			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
> >  	ret =  wait_for(g4x_reset_complete(pdev), 500);
> > +	if (ret)
> > +		goto out;
> >
> 
> We should restore the WaVcp... state if we fail. Not that it
> was right to begin with.

Did it right in the previous patch, then promptly undid it. I was
thinking if we should just do the clock gate tweak for the whole
function, it will look slightly easier to follow.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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^ permalink raw reply	[flat|nested] 9+ messages in thread
end of thread, other threads:[~2017-05-17 12:05 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-05-16 13:14 [PATCH 1/2] drm/i915: Try harder to reset the GPU Chris Wilson
2017-05-16 13:14 ` [PATCH 2/2] drm/i915: Reorder media/render reset on g4x Chris Wilson
2017-05-16 13:38   ` Mika Kuoppala
2017-05-17 11:40     ` Ville Syrjälä
2017-05-17 11:48       ` Mika Kuoppala
2017-05-17 12:05     ` Chris Wilson
2017-05-16 13:55 ` [PATCH 1/2] drm/i915: Try harder to reset the GPU Mika Kuoppala
2017-05-17 11:51   ` Chris Wilson
2017-05-16 14:16 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork

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