[PATCH 0/6] ARM: sun8i: a83t: Enable SPDIF output support

[PATCH 0/6] ARM: sun8i: a83t: Enable SPDIF output support

[Chen-Yu Tsai]

Hi everyone,

This series, apart from some minor fixes, adds SPDIF output support
with existing drivers.

The SPDIF transmitter block is the same as the one found on the H3.
There is no receiver support. The A83T pinctrl and DMA engine drivers
are already in the kernel.

Patches 1 & 2 fix some overlooked errors in the A83T's new clk driver.

Patch 3 fixes the name for the SPDIF pin function. We want to use
well known standard names. (In addition, I found some of our drivers
are using "s_twi" instead of "s_i2c". I will send fixes later.)

Patch 4 adds a device node for the DMA controller.

Patch 5 adds a device node and pinmux node for the SPDIF transmitter.

Patch 6 enables SPDIF output on the Cubietruck Plus.

Regards
ChenYu

Chen-Yu Tsai (6):
  clk: sunxi-ng: a83t: Fix PLL lock status register offset
  clk: sunxi-ng: a83t: Fix audio PLL divider offset
  pinctrl: sunxi: Fix SPDIF function name for A83T
  ARM: sun8i: a83t: Add device node for DMA controller
  ARM: sun8i: a83t: Add device node for SPDIF transmitter
  ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output

 arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 22 +++++++++++++++++
 arch/arm/boot/dts/sun8i-a83t.dtsi                | 30 ++++++++++++++++++++++++
 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c            |  4 ++--
 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c       |  2 +-
 4 files changed, 55 insertions(+), 3 deletions(-)

-- 
2.11.0

[PATCH 0/6] ARM: sun8i: a83t: Enable SPDIF output support

[Chen-Yu Tsai]

Hi everyone,

This series, apart from some minor fixes, adds SPDIF output support
with existing drivers.

The SPDIF transmitter block is the same as the one found on the H3.
There is no receiver support. The A83T pinctrl and DMA engine drivers
are already in the kernel.

Patches 1 & 2 fix some overlooked errors in the A83T's new clk driver.

Patch 3 fixes the name for the SPDIF pin function. We want to use
well known standard names. (In addition, I found some of our drivers
are using "s_twi" instead of "s_i2c". I will send fixes later.)

Patch 4 adds a device node for the DMA controller.

Patch 5 adds a device node and pinmux node for the SPDIF transmitter.

Patch 6 enables SPDIF output on the Cubietruck Plus.

Regards
ChenYu

Chen-Yu Tsai (6):
  clk: sunxi-ng: a83t: Fix PLL lock status register offset
  clk: sunxi-ng: a83t: Fix audio PLL divider offset
  pinctrl: sunxi: Fix SPDIF function name for A83T
  ARM: sun8i: a83t: Add device node for DMA controller
  ARM: sun8i: a83t: Add device node for SPDIF transmitter
  ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output

 arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 22 +++++++++++++++++
 arch/arm/boot/dts/sun8i-a83t.dtsi                | 30 ++++++++++++++++++++++++
 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c            |  4 ++--
 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c       |  2 +-
 4 files changed, 55 insertions(+), 3 deletions(-)

-- 
2.11.0

[PATCH 1/6] clk: sunxi-ng: a83t: Fix PLL lock status register offset

[Chen-Yu Tsai]

The offset for the PLL lock status register was incorrectly set to
0x208, which actually points to an unused register. The correct
register offset is 0x20c.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
index 4a201a7e03b8..a9c5cc87d9d0 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
@@ -28,7 +28,7 @@
 
 #include "ccu-sun8i-a83t.h"
 
-#define CCU_SUN8I_A83T_LOCK_REG	0x208
+#define CCU_SUN8I_A83T_LOCK_REG	0x20c
 
 /*
  * The CPU PLLs are actually NP clocks, with P being /1 or /4. However
-- 
2.11.0

[PATCH 1/6] clk: sunxi-ng: a83t: Fix PLL lock status register offset

[Chen-Yu Tsai]

The offset for the PLL lock status register was incorrectly set to
0x208, which actually points to an unused register. The correct
register offset is 0x20c.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
index 4a201a7e03b8..a9c5cc87d9d0 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
@@ -28,7 +28,7 @@
 
 #include "ccu-sun8i-a83t.h"
 
-#define CCU_SUN8I_A83T_LOCK_REG	0x208
+#define CCU_SUN8I_A83T_LOCK_REG	0x20c
 
 /*
  * The CPU PLLs are actually NP clocks, with P being /1 or /4. However
-- 
2.11.0

[PATCH 2/6] clk: sunxi-ng: a83t: Fix audio PLL divider offset

[Chen-Yu Tsai]

The divider of the audio PLL has an offset of 1.
Fix this in the driver.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
index a9c5cc87d9d0..947f9f6e05d2 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
@@ -80,7 +80,7 @@ static struct ccu_nm pll_audio_clk = {
 	.enable		= BIT(31),
 	.lock		= BIT(2),
 	.n		= _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 8, 0, 12, 0),
-	.m		= _SUNXI_CCU_DIV_OFFSET(0, 6, 0),
+	.m		= _SUNXI_CCU_DIV(0, 6),
 	.common		= {
 		.reg		= SUN8I_A83T_PLL_AUDIO_REG,
 		.lock_reg	= CCU_SUN8I_A83T_LOCK_REG,
-- 
2.11.0

[PATCH 2/6] clk: sunxi-ng: a83t: Fix audio PLL divider offset

[Chen-Yu Tsai]

The divider of the audio PLL has an offset of 1.
Fix this in the driver.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
index a9c5cc87d9d0..947f9f6e05d2 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
@@ -80,7 +80,7 @@ static struct ccu_nm pll_audio_clk = {
 	.enable		= BIT(31),
 	.lock		= BIT(2),
 	.n		= _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 8, 0, 12, 0),
-	.m		= _SUNXI_CCU_DIV_OFFSET(0, 6, 0),
+	.m		= _SUNXI_CCU_DIV(0, 6),
 	.common		= {
 		.reg		= SUN8I_A83T_PLL_AUDIO_REG,
 		.lock_reg	= CCU_SUN8I_A83T_LOCK_REG,
-- 
2.11.0

[PATCH 3/6] pinctrl: sunxi: Fix SPDIF function name for A83T

[Chen-Yu Tsai]

We use well known standard names for functions that have name, such as
I2C, SPI, SPDIF, etc..

Fix the function name of SPDIF, which was named OWA (One Wire Audio)
based on Allwinner datasheets.

Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
		      support")
Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index 9aec1d2232dd..6624499eae72 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -394,7 +394,7 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
-		  SUNXI_FUNCTION(0x3, "owa")),		/* DOUT */
+		  SUNXI_FUNCTION(0x3, "spdif")),	/* DOUT */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out")),
-- 
2.11.0

[PATCH 3/6] pinctrl: sunxi: Fix SPDIF function name for A83T

[Chen-Yu Tsai]

We use well known standard names for functions that have name, such as
I2C, SPI, SPDIF, etc..

Fix the function name of SPDIF, which was named OWA (One Wire Audio)
based on Allwinner datasheets.

Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
		      support")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index 9aec1d2232dd..6624499eae72 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -394,7 +394,7 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
-		  SUNXI_FUNCTION(0x3, "owa")),		/* DOUT */
+		  SUNXI_FUNCTION(0x3, "spdif")),	/* DOUT */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out")),
-- 
2.11.0

[PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Chen-Yu Tsai]

The A83T SoC has a DMA controller that supports 8 DMA channels
to and from various peripherals.

Add a device node for it.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index e12dd7170b8f..47196feda26b 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -163,6 +163,15 @@
 		#size-cells = <1>;
 		ranges;
 
+		dma: dma-controller@1c02000 {
+			compatible = "allwinner,sun8i-a83t-dma";
+			reg = <0x01c02000 0x1000>;
+			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu 21>;
+			resets = <&ccu 7>;
+			#dma-cells = <1>;
+		};
+
 		ccu: clock@1c20000 {
 			compatible = "allwinner,sun8i-a83t-ccu";
 			reg = <0x01c20000 0x400>;
-- 
2.11.0

[PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Chen-Yu Tsai]

The A83T SoC has a DMA controller that supports 8 DMA channels
to and from various peripherals.

Add a device node for it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index e12dd7170b8f..47196feda26b 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -163,6 +163,15 @@
 		#size-cells = <1>;
 		ranges;
 
+		dma: dma-controller at 1c02000 {
+			compatible = "allwinner,sun8i-a83t-dma";
+			reg = <0x01c02000 0x1000>;
+			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu 21>;
+			resets = <&ccu 7>;
+			#dma-cells = <1>;
+		};
+
 		ccu: clock at 1c20000 {
 			compatible = "allwinner,sun8i-a83t-ccu";
 			reg = <0x01c20000 0x400>;
-- 
2.11.0

[PATCH 5/6] ARM: sun8i: a83t: Add device node for SPDIF transmitter

[Chen-Yu Tsai]

The A83T SoC has an SPDIF transmitter block. According to the vendor
BSP kernel, it is compatible with the one found on the H3 SoC.

Add a device node and pinmux setting for it.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 47196feda26b..1dc4cfe81534 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -202,6 +202,11 @@
 				bias-pull-up;
 			};
 
+			spdif_tx_pin: spdif-tx-pin {
+				pins = "PE18";
+				function = "spdif";
+			};
+
 			uart0_pb_pins: uart0-pb-pins {
 				pins = "PB9", "PB10";
 				function = "uart0";
@@ -228,6 +233,22 @@
 			clocks = <&osc24M>;
 		};
 
+		spdif: spdif@1c21000 {
+			#sound-dai-cells = <0>;
+			compatible = "allwinner,sun8i-a83t-spdif",
+				     "allwinner,sun8i-h3-spdif";
+			reg = <0x01c21000 0x400>;
+			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu 44>, <&ccu 76>;
+			resets = <&ccu 32>;
+			clock-names = "apb", "spdif";
+			dmas = <&dma 2>;
+			dma-names = "tx";
+			pinctrl-names = "default";
+			pinctrl-0 = <&spdif_tx_pin>;
+			status = "disabled";
+		};
+
 		uart0: serial@01c28000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x01c28000 0x400>;
-- 
2.11.0

[PATCH 5/6] ARM: sun8i: a83t: Add device node for SPDIF transmitter

[Chen-Yu Tsai]

The A83T SoC has an SPDIF transmitter block. According to the vendor
BSP kernel, it is compatible with the one found on the H3 SoC.

Add a device node and pinmux setting for it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 47196feda26b..1dc4cfe81534 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -202,6 +202,11 @@
 				bias-pull-up;
 			};
 
+			spdif_tx_pin: spdif-tx-pin {
+				pins = "PE18";
+				function = "spdif";
+			};
+
 			uart0_pb_pins: uart0-pb-pins {
 				pins = "PB9", "PB10";
 				function = "uart0";
@@ -228,6 +233,22 @@
 			clocks = <&osc24M>;
 		};
 
+		spdif: spdif at 1c21000 {
+			#sound-dai-cells = <0>;
+			compatible = "allwinner,sun8i-a83t-spdif",
+				     "allwinner,sun8i-h3-spdif";
+			reg = <0x01c21000 0x400>;
+			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu 44>, <&ccu 76>;
+			resets = <&ccu 32>;
+			clock-names = "apb", "spdif";
+			dmas = <&dma 2>;
+			dma-names = "tx";
+			pinctrl-names = "default";
+			pinctrl-0 = <&spdif_tx_pin>;
+			status = "disabled";
+		};
+
 		uart0: serial at 01c28000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x01c28000 0x400>;
-- 
2.11.0

[PATCH 6/6] ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output

[Chen-Yu Tsai]

The Cubietruck Plus has an optical SPDIF out connector.
Enable SPDIF audio output for this board.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
index 9e10cc6f39d4..cff33454fc24 100644
--- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
@@ -82,6 +82,28 @@
 			gpios = <&pio 4 4 GPIO_ACTIVE_HIGH>; /* PE4 */
 		};
 	};
+
+	sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "On-board SPDIF";
+
+		simple-audio-card,cpu {
+			sound-dai = <&spdif>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&spdif_out>;
+		};
+	};
+
+	spdif_out: spdif-out {
+		#sound-dai-cells = <0>;
+		compatible = "linux,spdif-dit";
+	};
+};
+
+&spdif {
+	status = "okay";
 };
 
 &uart0 {
-- 
2.11.0

[PATCH 6/6] ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output

[Chen-Yu Tsai]

The Cubietruck Plus has an optical SPDIF out connector.
Enable SPDIF audio output for this board.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
index 9e10cc6f39d4..cff33454fc24 100644
--- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
@@ -82,6 +82,28 @@
 			gpios = <&pio 4 4 GPIO_ACTIVE_HIGH>; /* PE4 */
 		};
 	};
+
+	sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "On-board SPDIF";
+
+		simple-audio-card,cpu {
+			sound-dai = <&spdif>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&spdif_out>;
+		};
+	};
+
+	spdif_out: spdif-out {
+		#sound-dai-cells = <0>;
+		compatible = "linux,spdif-dit";
+	};
+};
+
+&spdif {
+	status = "okay";
 };
 
 &uart0 {
-- 
2.11.0

Re: [linux-sunxi] [PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Code Kipper]

On 22 May 2017 at 08:25, Chen-Yu Tsai <wens@csie.org> wrote:
> The A83T SoC has a DMA controller that supports 8 DMA channels
> to and from various peripherals.
>
> Add a device node for it.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index e12dd7170b8f..47196feda26b 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -163,6 +163,15 @@
>                 #size-cells = <1>;
>                 ranges;
>
> +               dma: dma-controller@1c02000 {
> +                       compatible = "allwinner,sun8i-a83t-dma";
> +                       reg = <0x01c02000 0x1000>;
> +                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&ccu 21>;
> +                       resets = <&ccu 7>;
Hi Wens,
these should be ccu defines, otherwise everything else looks great.
Great Work,
CK
> +                       #dma-cells = <1>;
> +               };
> +
>                 ccu: clock@1c20000 {
>                         compatible = "allwinner,sun8i-a83t-ccu";
>                         reg = <0x01c20000 0x400>;
> --
> 2.11.0
>
> --
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[linux-sunxi] [PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Code Kipper]

On 22 May 2017 at 08:25, Chen-Yu Tsai <wens@csie.org> wrote:
> The A83T SoC has a DMA controller that supports 8 DMA channels
> to and from various peripherals.
>
> Add a device node for it.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index e12dd7170b8f..47196feda26b 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -163,6 +163,15 @@
>                 #size-cells = <1>;
>                 ranges;
>
> +               dma: dma-controller at 1c02000 {
> +                       compatible = "allwinner,sun8i-a83t-dma";
> +                       reg = <0x01c02000 0x1000>;
> +                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&ccu 21>;
> +                       resets = <&ccu 7>;
Hi Wens,
these should be ccu defines, otherwise everything else looks great.
Great Work,
CK
> +                       #dma-cells = <1>;
> +               };
> +
>                 ccu: clock at 1c20000 {
>                         compatible = "allwinner,sun8i-a83t-ccu";
>                         reg = <0x01c20000 0x400>;
> --
> 2.11.0
>
> --
> You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe at googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Chen-Yu Tsai]

On Mon, May 22, 2017 at 3:18 PM, Code Kipper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On 22 May 2017 at 08:25, Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org> wrote:
>> The A83T SoC has a DMA controller that supports 8 DMA channels
>> to and from various peripherals.
>>
>> Add a device node for it.
>>
>> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
>> ---
>>  arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> index e12dd7170b8f..47196feda26b 100644
>> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> @@ -163,6 +163,15 @@
>>                 #size-cells = <1>;
>>                 ranges;
>>
>> +               dma: dma-controller@1c02000 {
>> +                       compatible = "allwinner,sun8i-a83t-dma";
>> +                       reg = <0x01c02000 0x1000>;
>> +                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
>> +                       clocks = <&ccu 21>;
>> +                       resets = <&ccu 7>;
> Hi Wens,
> these should be ccu defines, otherwise everything else looks great.

Correct. Since the CCU bindings was just introduced, I'm saving all the macros
for v4.13-rc2.

ChenYu

> Great Work,
> CK
>> +                       #dma-cells = <1>;
>> +               };
>> +
>>                 ccu: clock@1c20000 {
>>                         compatible = "allwinner,sun8i-a83t-ccu";
>>                         reg = <0x01c20000 0x400>;
>> --
>> 2.11.0
>>
>> --
>> You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
>> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org
>> For more options, visit https://groups.google.com/d/optout.

[linux-sunxi] [PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Chen-Yu Tsai]

On Mon, May 22, 2017 at 3:18 PM, Code Kipper <codekipper@gmail.com> wrote:
> On 22 May 2017 at 08:25, Chen-Yu Tsai <wens@csie.org> wrote:
>> The A83T SoC has a DMA controller that supports 8 DMA channels
>> to and from various peripherals.
>>
>> Add a device node for it.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>>  arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> index e12dd7170b8f..47196feda26b 100644
>> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> @@ -163,6 +163,15 @@
>>                 #size-cells = <1>;
>>                 ranges;
>>
>> +               dma: dma-controller at 1c02000 {
>> +                       compatible = "allwinner,sun8i-a83t-dma";
>> +                       reg = <0x01c02000 0x1000>;
>> +                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
>> +                       clocks = <&ccu 21>;
>> +                       resets = <&ccu 7>;
> Hi Wens,
> these should be ccu defines, otherwise everything else looks great.

Correct. Since the CCU bindings was just introduced, I'm saving all the macros
for v4.13-rc2.

ChenYu

> Great Work,
> CK
>> +                       #dma-cells = <1>;
>> +               };
>> +
>>                 ccu: clock at 1c20000 {
>>                         compatible = "allwinner,sun8i-a83t-ccu";
>>                         reg = <0x01c20000 0x400>;
>> --
>> 2.11.0
>>
>> --
>> You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
>> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe at googlegroups.com.
>> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH 2/6] clk: sunxi-ng: a83t: Fix audio PLL divider offset

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 331 bytes --]

On Mon, May 22, 2017 at 02:25:48PM +0800, Chen-Yu Tsai wrote:
> The divider of the audio PLL has an offset of 1.
> Fix this in the driver.
> 
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 2/6] clk: sunxi-ng: a83t: Fix audio PLL divider offset

[Maxime Ripard]

On Mon, May 22, 2017 at 02:25:48PM +0800, Chen-Yu Tsai wrote:
> The divider of the audio PLL has an offset of 1.
> Fix this in the driver.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [PATCH 1/6] clk: sunxi-ng: a83t: Fix PLL lock status register offset

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 417 bytes --]

On Mon, May 22, 2017 at 02:25:47PM +0800, Chen-Yu Tsai wrote:
> The offset for the PLL lock status register was incorrectly set to
> 0x208, which actually points to an unused register. The correct
> register offset is 0x20c.
> 
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 1/6] clk: sunxi-ng: a83t: Fix PLL lock status register offset

[Maxime Ripard]

On Mon, May 22, 2017 at 02:25:47PM +0800, Chen-Yu Tsai wrote:
> The offset for the PLL lock status register was incorrectly set to
> 0x208, which actually points to an unused register. The correct
> register offset is 0x20c.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [PATCH 3/6] pinctrl: sunxi: Fix SPDIF function name for A83T

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 627 bytes --]

On Mon, May 22, 2017 at 02:25:49PM +0800, Chen-Yu Tsai wrote:
> We use well known standard names for functions that have name, such as
> I2C, SPI, SPDIF, etc..
> 
> Fix the function name of SPDIF, which was named OWA (One Wire Audio)
> based on Allwinner datasheets.
> 
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
> 		      support")
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>

Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 3/6] pinctrl: sunxi: Fix SPDIF function name for A83T

[Maxime Ripard]

On Mon, May 22, 2017 at 02:25:49PM +0800, Chen-Yu Tsai wrote:
> We use well known standard names for functions that have name, such as
> I2C, SPI, SPDIF, etc..
> 
> Fix the function name of SPDIF, which was named OWA (One Wire Audio)
> based on Allwinner datasheets.
> 
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
> 		      support")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 385 bytes --]

On Mon, May 22, 2017 at 02:25:50PM +0800, Chen-Yu Tsai wrote:
> The A83T SoC has a DMA controller that supports 8 DMA channels
> to and from various peripherals.
> 
> Add a device node for it.
> 
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Maxime Ripard]

On Mon, May 22, 2017 at 02:25:50PM +0800, Chen-Yu Tsai wrote:
> The A83T SoC has a DMA controller that supports 8 DMA channels
> to and from various peripherals.
> 
> Add a device node for it.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [linux-sunxi] [PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 1549 bytes --]

Hi Markus,

On Mon, May 22, 2017 at 09:18:49AM +0200, Code Kipper wrote:
> On 22 May 2017 at 08:25, Chen-Yu Tsai <wens@csie.org> wrote:
> > The A83T SoC has a DMA controller that supports 8 DMA channels
> > to and from various peripherals.
> >
> > Add a device node for it.
> >
> > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> > ---
> >  arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > index e12dd7170b8f..47196feda26b 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > @@ -163,6 +163,15 @@
> >                 #size-cells = <1>;
> >                 ranges;
> >
> > +               dma: dma-controller@1c02000 {
> > +                       compatible = "allwinner,sun8i-a83t-dma";
> > +                       reg = <0x01c02000 0x1000>;
> > +                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&ccu 21>;
> > +                       resets = <&ccu 7>;
>
> these should be ccu defines, otherwise everything else looks great.

In general, yes. In this particular case however, this is made on
purpose, since Chen-Yu just introduced those defines that are part of
a commit that will go in a different tree.

We will switch to the defines once it reaches Linus' tree.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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[linux-sunxi] [PATCH 4/6] ARM: sun8i: a83t: Add device node for DMA controller

[Maxime Ripard]

Hi Markus,

On Mon, May 22, 2017 at 09:18:49AM +0200, Code Kipper wrote:
> On 22 May 2017 at 08:25, Chen-Yu Tsai <wens@csie.org> wrote:
> > The A83T SoC has a DMA controller that supports 8 DMA channels
> > to and from various peripherals.
> >
> > Add a device node for it.
> >
> > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> > ---
> >  arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > index e12dd7170b8f..47196feda26b 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > @@ -163,6 +163,15 @@
> >                 #size-cells = <1>;
> >                 ranges;
> >
> > +               dma: dma-controller at 1c02000 {
> > +                       compatible = "allwinner,sun8i-a83t-dma";
> > +                       reg = <0x01c02000 0x1000>;
> > +                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&ccu 21>;
> > +                       resets = <&ccu 7>;
>
> these should be ccu defines, otherwise everything else looks great.

In general, yes. In this particular case however, this is made on
purpose, since Chen-Yu just introduced those defines that are part of
a commit that will go in a different tree.

We will switch to the defines once it reaches Linus' tree.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [PATCH 5/6] ARM: sun8i: a83t: Add device node for SPDIF transmitter

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 440 bytes --]

On Mon, May 22, 2017 at 02:25:51PM +0800, Chen-Yu Tsai wrote:
> The A83T SoC has an SPDIF transmitter block. According to the vendor
> BSP kernel, it is compatible with the one found on the H3 SoC.
> 
> Add a device node and pinmux setting for it.
> 
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 5/6] ARM: sun8i: a83t: Add device node for SPDIF transmitter

[Maxime Ripard]

On Mon, May 22, 2017 at 02:25:51PM +0800, Chen-Yu Tsai wrote:
> The A83T SoC has an SPDIF transmitter block. According to the vendor
> BSP kernel, it is compatible with the one found on the H3 SoC.
> 
> Add a device node and pinmux setting for it.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [PATCH 6/6] ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 356 bytes --]

On Mon, May 22, 2017 at 02:25:52PM +0800, Chen-Yu Tsai wrote:
> The Cubietruck Plus has an optical SPDIF out connector.
> Enable SPDIF audio output for this board.
> 
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 6/6] ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output

[Maxime Ripard]

On Mon, May 22, 2017 at 02:25:52PM +0800, Chen-Yu Tsai wrote:
> The Cubietruck Plus has an optical SPDIF out connector.
> Enable SPDIF audio output for this board.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [PATCH 2/6] clk: sunxi-ng: a83t: Fix audio PLL divider offset

[Chen-Yu Tsai]

On Mon, May 22, 2017 at 3:20 PM, Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> On Mon, May 22, 2017 at 02:25:48PM +0800, Chen-Yu Tsai wrote:
>> The divider of the audio PLL has an offset of 1.
>> Fix this in the driver.
>>
>> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
>
> Applied, thanks!

So even with this patch applied, the audio is still slow and off pitch.
It's even worse without this patch...

Maybe it's time we added a special class of clks for the audio PLL
to deal with sigma-delta modulation of the divider?

ChenYu
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[PATCH 2/6] clk: sunxi-ng: a83t: Fix audio PLL divider offset

[Chen-Yu Tsai]

On Mon, May 22, 2017 at 3:20 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Mon, May 22, 2017 at 02:25:48PM +0800, Chen-Yu Tsai wrote:
>> The divider of the audio PLL has an offset of 1.
>> Fix this in the driver.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>
> Applied, thanks!

So even with this patch applied, the audio is still slow and off pitch.
It's even worse without this patch...

Maybe it's time we added a special class of clks for the audio PLL
to deal with sigma-delta modulation of the divider?

ChenYu

Re: [PATCH 2/6] clk: sunxi-ng: a83t: Fix audio PLL divider offset

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 885 bytes --]

On Mon, May 22, 2017 at 03:35:57PM +0800, Chen-Yu Tsai wrote:
> On Mon, May 22, 2017 at 3:20 PM, Maxime Ripard
> <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> > On Mon, May 22, 2017 at 02:25:48PM +0800, Chen-Yu Tsai wrote:
> >> The divider of the audio PLL has an offset of 1.
> >> Fix this in the driver.
> >>
> >> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> >
> > Applied, thanks!
> 
> So even with this patch applied, the audio is still slow and off pitch.
> It's even worse without this patch...
> 
> Maybe it's time we added a special class of clks for the audio PLL
> to deal with sigma-delta modulation of the divider?

I'm not sure how feasible that would be and what it would look like,
but you can give it a shot yes.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 2/6] clk: sunxi-ng: a83t: Fix audio PLL divider offset

[Maxime Ripard]

On Mon, May 22, 2017 at 03:35:57PM +0800, Chen-Yu Tsai wrote:
> On Mon, May 22, 2017 at 3:20 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > On Mon, May 22, 2017 at 02:25:48PM +0800, Chen-Yu Tsai wrote:
> >> The divider of the audio PLL has an offset of 1.
> >> Fix this in the driver.
> >>
> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> >
> > Applied, thanks!
> 
> So even with this patch applied, the audio is still slow and off pitch.
> It's even worse without this patch...
> 
> Maybe it's time we added a special class of clks for the audio PLL
> to deal with sigma-delta modulation of the divider?

I'm not sure how feasible that would be and what it would look like,
but you can give it a shot yes.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [PATCH 3/6] pinctrl: sunxi: Fix SPDIF function name for A83T

[Linus Walleij]

On Mon, May 22, 2017 at 8:25 AM, Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org> wrote:

> We use well known standard names for functions that have name, such as
> I2C, SPI, SPDIF, etc..
>
> Fix the function name of SPDIF, which was named OWA (One Wire Audio)
> based on Allwinner datasheets.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
>                       support")
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>

Patch applied for fixes with Maxime's ACK.

Yours,
Linus Walleij

[PATCH 3/6] pinctrl: sunxi: Fix SPDIF function name for A83T

[Linus Walleij]

On Mon, May 22, 2017 at 8:25 AM, Chen-Yu Tsai <wens@csie.org> wrote:

> We use well known standard names for functions that have name, such as
> I2C, SPI, SPDIF, etc..
>
> Fix the function name of SPDIF, which was named OWA (One Wire Audio)
> based on Allwinner datasheets.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
>                       support")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Patch applied for fixes with Maxime's ACK.

Yours,
Linus Walleij