* [PATCH 25/27] Drivers: ccree: cc_regs.h - align block comments
@ 2017-05-24 4:47 ` Derek Robson
0 siblings, 0 replies; 3+ messages in thread
From: Derek Robson @ 2017-05-24 4:47 UTC (permalink / raw)
To: gilad, gregkh
Cc: devel, Derek Robson, driverdev-devel, linux-crypto, linux-kernel
Fixed block comment alignment, Style fix only
Found using checkpatch
Signed-off-by: Derek Robson <robsonde@gmail.com>
---
drivers/staging/ccree/cc_regs.h | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h
index 8b89f0603f16..f4b3b5a23ae2 100644
--- a/drivers/staging/ccree/cc_regs.h
+++ b/drivers/staging/ccree/cc_regs.h
@@ -55,8 +55,9 @@ do { \
BITFIELD_GET(reg_val, CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
-/* yael TBD !!! - *
-* all HW includes should start with CC_ and not DX_ !! */
+/* yael TBD !!!
+ * all HW includes should start with CC_ and not DX_ !!
+ */
/*! Bit fields set */
@@ -86,10 +87,10 @@ do { \
} while (0)
/* Usage example:
- u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
- CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
- CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
- WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
+ * u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
+ * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
+ * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
+ * WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
*/
#endif /*_CC_REGS_H_*/
--
2.12.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 25/27] Drivers: ccree: cc_regs.h - align block comments
@ 2017-05-24 4:47 ` Derek Robson
0 siblings, 0 replies; 3+ messages in thread
From: Derek Robson @ 2017-05-24 4:47 UTC (permalink / raw)
To: gilad, gregkh
Cc: linux-crypto, driverdev-devel, devel, linux-kernel, Derek Robson
Fixed block comment alignment, Style fix only
Found using checkpatch
Signed-off-by: Derek Robson <robsonde@gmail.com>
---
drivers/staging/ccree/cc_regs.h | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h
index 8b89f0603f16..f4b3b5a23ae2 100644
--- a/drivers/staging/ccree/cc_regs.h
+++ b/drivers/staging/ccree/cc_regs.h
@@ -55,8 +55,9 @@ do { \
BITFIELD_GET(reg_val, CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
-/* yael TBD !!! - *
-* all HW includes should start with CC_ and not DX_ !! */
+/* yael TBD !!!
+ * all HW includes should start with CC_ and not DX_ !!
+ */
/*! Bit fields set */
@@ -86,10 +87,10 @@ do { \
} while (0)
/* Usage example:
- u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
- CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
- CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
- WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
+ * u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
+ * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
+ * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
+ * WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
*/
#endif /*_CC_REGS_H_*/
--
2.12.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 25/27] Drivers: ccree: cc_regs.h - align block comments
@ 2017-05-24 4:47 ` Derek Robson
0 siblings, 0 replies; 3+ messages in thread
From: Derek Robson @ 2017-05-24 4:47 UTC (permalink / raw)
To: gilad, gregkh
Cc: devel, Derek Robson, driverdev-devel, linux-crypto, linux-kernel
Fixed block comment alignment, Style fix only
Found using checkpatch
Signed-off-by: Derek Robson <robsonde@gmail.com>
---
drivers/staging/ccree/cc_regs.h | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h
index 8b89f0603f16..f4b3b5a23ae2 100644
--- a/drivers/staging/ccree/cc_regs.h
+++ b/drivers/staging/ccree/cc_regs.h
@@ -55,8 +55,9 @@ do { \
BITFIELD_GET(reg_val, CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
-/* yael TBD !!! - *
-* all HW includes should start with CC_ and not DX_ !! */
+/* yael TBD !!!
+ * all HW includes should start with CC_ and not DX_ !!
+ */
/*! Bit fields set */
@@ -86,10 +87,10 @@ do { \
} while (0)
/* Usage example:
- u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
- CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
- CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
- WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
+ * u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
+ * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
+ * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
+ * WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
*/
#endif /*_CC_REGS_H_*/
--
2.12.2
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2017-05-24 4:47 ` Derek Robson
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