[PATCH v2 0/6] clk: sunxi-ng: Add support for A83T's PRCM

[PATCH v2 0/6] clk: sunxi-ng: Add support for A83T's PRCM

[Chen-Yu Tsai]

Hi everyone,

This is the remaining parts of my A83T PRCM support series, along with
changes requested by Maxime.

Patch 1 updates the device tree bindings for the PRCM, adding pll-periph
to the list of required clocks

Patch 2 adds a device node for the PRCM on the A83T SoC, updated from v1
to include the pll-periph clock.

Patch 3 exports the PLL_PERIPH0 clock from the CCU on the H3/H5, for
consumption by the PRCM.

Patch 4 adds the pll-periph clock to the PRCM device node on the H3/H5.

Patch 5 / 6 are the same as 3 / 4, but for the A64.


Excerpt from v1 cover letter:

This series adds support for the A83T's PRCM to the existing sun8i-r-ccu
driver. When the sun8i-r-ccu driver was introduced, indices were reserved
for all the possible clocks and resets of the sun8i family. In patch 2
we simply pick existing clocks, and implement ones that are different or
missing.

Differences from other sun8i implementations include different clock parent
names, due to the A83T not having a proper 32.768 kHz oscillator, and
different predividers for the IR clock.


Still to come are support for R_PIO and RSB on the A83T.

Regards
ChenYu


Chen-Yu Tsai (6):
  dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
  ARM: sun8i: a83t: Add device node for PRCM
  clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
  ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
  clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
  arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU

 Documentation/devicetree/bindings/clock/sunxi-ccu.txt |  7 ++++---
 arch/arm/boot/dts/sun8i-a83t.dtsi                     | 10 ++++++++++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi                    |  5 +++--
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi         |  5 +++--
 drivers/clk/sunxi-ng/ccu-sun50i-a64.h                 |  4 +++-
 drivers/clk/sunxi-ng/ccu-sun8i-h3.h                   |  4 +++-
 include/dt-bindings/clock/sun50i-a64-ccu.h            |  2 ++
 include/dt-bindings/clock/sun8i-h3-ccu.h              |  2 ++
 8 files changed, 30 insertions(+), 9 deletions(-)

-- 
2.11.0

[PATCH v2 0/6] clk: sunxi-ng: Add support for A83T's PRCM

[Chen-Yu Tsai]

Hi everyone,

This is the remaining parts of my A83T PRCM support series, along with
changes requested by Maxime.

Patch 1 updates the device tree bindings for the PRCM, adding pll-periph
to the list of required clocks

Patch 2 adds a device node for the PRCM on the A83T SoC, updated from v1
to include the pll-periph clock.

Patch 3 exports the PLL_PERIPH0 clock from the CCU on the H3/H5, for
consumption by the PRCM.

Patch 4 adds the pll-periph clock to the PRCM device node on the H3/H5.

Patch 5 / 6 are the same as 3 / 4, but for the A64.


Excerpt from v1 cover letter:

This series adds support for the A83T's PRCM to the existing sun8i-r-ccu
driver. When the sun8i-r-ccu driver was introduced, indices were reserved
for all the possible clocks and resets of the sun8i family. In patch 2
we simply pick existing clocks, and implement ones that are different or
missing.

Differences from other sun8i implementations include different clock parent
names, due to the A83T not having a proper 32.768 kHz oscillator, and
different predividers for the IR clock.


Still to come are support for R_PIO and RSB on the A83T.

Regards
ChenYu


Chen-Yu Tsai (6):
  dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
  ARM: sun8i: a83t: Add device node for PRCM
  clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
  ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
  clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
  arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU

 Documentation/devicetree/bindings/clock/sunxi-ccu.txt |  7 ++++---
 arch/arm/boot/dts/sun8i-a83t.dtsi                     | 10 ++++++++++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi                    |  5 +++--
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi         |  5 +++--
 drivers/clk/sunxi-ng/ccu-sun50i-a64.h                 |  4 +++-
 drivers/clk/sunxi-ng/ccu-sun8i-h3.h                   |  4 +++-
 include/dt-bindings/clock/sun50i-a64-ccu.h            |  2 ++
 include/dt-bindings/clock/sun8i-h3-ccu.h              |  2 ++
 8 files changed, 30 insertions(+), 9 deletions(-)

-- 
2.11.0

[PATCH v2 0/6] clk: sunxi-ng: Add support for A83T's PRCM

[Chen-Yu Tsai]

Hi everyone,

This is the remaining parts of my A83T PRCM support series, along with
changes requested by Maxime.

Patch 1 updates the device tree bindings for the PRCM, adding pll-periph
to the list of required clocks

Patch 2 adds a device node for the PRCM on the A83T SoC, updated from v1
to include the pll-periph clock.

Patch 3 exports the PLL_PERIPH0 clock from the CCU on the H3/H5, for
consumption by the PRCM.

Patch 4 adds the pll-periph clock to the PRCM device node on the H3/H5.

Patch 5 / 6 are the same as 3 / 4, but for the A64.


Excerpt from v1 cover letter:

This series adds support for the A83T's PRCM to the existing sun8i-r-ccu
driver. When the sun8i-r-ccu driver was introduced, indices were reserved
for all the possible clocks and resets of the sun8i family. In patch 2
we simply pick existing clocks, and implement ones that are different or
missing.

Differences from other sun8i implementations include different clock parent
names, due to the A83T not having a proper 32.768 kHz oscillator, and
different predividers for the IR clock.


Still to come are support for R_PIO and RSB on the A83T.

Regards
ChenYu


Chen-Yu Tsai (6):
  dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
  ARM: sun8i: a83t: Add device node for PRCM
  clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
  ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
  clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
  arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU

 Documentation/devicetree/bindings/clock/sunxi-ccu.txt |  7 ++++---
 arch/arm/boot/dts/sun8i-a83t.dtsi                     | 10 ++++++++++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi                    |  5 +++--
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi         |  5 +++--
 drivers/clk/sunxi-ng/ccu-sun50i-a64.h                 |  4 +++-
 drivers/clk/sunxi-ng/ccu-sun8i-h3.h                   |  4 +++-
 include/dt-bindings/clock/sun50i-a64-ccu.h            |  2 ++
 include/dt-bindings/clock/sun8i-h3-ccu.h              |  2 ++
 8 files changed, 30 insertions(+), 9 deletions(-)

-- 
2.11.0

[PATCH v2 1/6] dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks

[Chen-Yu Tsai]

The AR100 clock in the PRCM has parents, one of which is pll-periph from
the main CCU.

Add it to the list of required clocks for the PRCM CCU.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
index 095a5807d874..966345972d83 100644
--- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
@@ -25,7 +25,8 @@ Required properties :
 - #clock-cells : must contain 1
 - #reset-cells : must contain 1
 
-For the PRCM CCUs on A83T/H3/A64, one more clock is needed:
+For the PRCM CCUs on A83T/H3/A64, two more clock is needed:
+- "pll-periph": the SoC's peripheral PLL from the main CCU
 - "iosc": the SoC's internal frequency oscillator
 
 Example for generic CCU:
@@ -42,8 +43,8 @@ Example for PRCM CCU:
 r_ccu: clock@01f01400 {
 	compatible = "allwinner,sun50i-a64-r-ccu";
 	reg = <0x01f01400 0x100>;
-	clocks = <&osc24M>, <&osc32k>, <&iosc>;
-	clock-names = "hosc", "losc", "iosc";
+	clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;
+	clock-names = "hosc", "losc", "iosc", "pll-periph";
 	#clock-cells = <1>;
 	#reset-cells = <1>;
 };
-- 
2.11.0

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[PATCH v2 1/6] dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks

[Chen-Yu Tsai]

The AR100 clock in the PRCM has parents, one of which is pll-periph from
the main CCU.

Add it to the list of required clocks for the PRCM CCU.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
index 095a5807d874..966345972d83 100644
--- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
@@ -25,7 +25,8 @@ Required properties :
 - #clock-cells : must contain 1
 - #reset-cells : must contain 1
 
-For the PRCM CCUs on A83T/H3/A64, one more clock is needed:
+For the PRCM CCUs on A83T/H3/A64, two more clock is needed:
+- "pll-periph": the SoC's peripheral PLL from the main CCU
 - "iosc": the SoC's internal frequency oscillator
 
 Example for generic CCU:
@@ -42,8 +43,8 @@ Example for PRCM CCU:
 r_ccu: clock@01f01400 {
 	compatible = "allwinner,sun50i-a64-r-ccu";
 	reg = <0x01f01400 0x100>;
-	clocks = <&osc24M>, <&osc32k>, <&iosc>;
-	clock-names = "hosc", "losc", "iosc";
+	clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;
+	clock-names = "hosc", "losc", "iosc", "pll-periph";
 	#clock-cells = <1>;
 	#reset-cells = <1>;
 };
-- 
2.11.0

[PATCH v2 1/6] dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks

[Chen-Yu Tsai]

The AR100 clock in the PRCM has parents, one of which is pll-periph from
the main CCU.

Add it to the list of required clocks for the PRCM CCU.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
index 095a5807d874..966345972d83 100644
--- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
@@ -25,7 +25,8 @@ Required properties :
 - #clock-cells : must contain 1
 - #reset-cells : must contain 1
 
-For the PRCM CCUs on A83T/H3/A64, one more clock is needed:
+For the PRCM CCUs on A83T/H3/A64, two more clock is needed:
+- "pll-periph": the SoC's peripheral PLL from the main CCU
 - "iosc": the SoC's internal frequency oscillator
 
 Example for generic CCU:
@@ -42,8 +43,8 @@ Example for PRCM CCU:
 r_ccu: clock at 01f01400 {
 	compatible = "allwinner,sun50i-a64-r-ccu";
 	reg = <0x01f01400 0x100>;
-	clocks = <&osc24M>, <&osc32k>, <&iosc>;
-	clock-names = "hosc", "losc", "iosc";
+	clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;
+	clock-names = "hosc", "losc", "iosc", "pll-periph";
 	#clock-cells = <1>;
 	#reset-cells = <1>;
 };
-- 
2.11.0

[PATCH v2 2/6] ARM: sun8i: a83t: Add device node for PRCM

[Chen-Yu Tsai]

The A83T's PRCM has the same set of clocks and resets as the A64.
However, a few dividers are different. And due to the lack of a low
speed 32.768 kHz oscillator, a few of the clock parents are different.

The PRCM also has controls for various power domains. These are not
supported yet, neither in software nor in the device tree binding.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 1dc4cfe81534..49aeb56970ba 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -270,5 +270,15 @@
 			#interrupt-cells = <3>;
 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
+
+		r_ccu: clock@1f01400 {
+			compatible = "allwinner,sun8i-a83t-r-ccu";
+			reg = <0x01f01400 0x400>;
+			clocks = <&osc24M>, <&osc16Md512>, <&osc16M>,
+				 <&ccu 6>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 	};
 };
-- 
2.11.0

--
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the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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[PATCH v2 2/6] ARM: sun8i: a83t: Add device node for PRCM

[Chen-Yu Tsai]

The A83T's PRCM has the same set of clocks and resets as the A64.
However, a few dividers are different. And due to the lack of a low
speed 32.768 kHz oscillator, a few of the clock parents are different.

The PRCM also has controls for various power domains. These are not
supported yet, neither in software nor in the device tree binding.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 1dc4cfe81534..49aeb56970ba 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -270,5 +270,15 @@
 			#interrupt-cells = <3>;
 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
+
+		r_ccu: clock@1f01400 {
+			compatible = "allwinner,sun8i-a83t-r-ccu";
+			reg = <0x01f01400 0x400>;
+			clocks = <&osc24M>, <&osc16Md512>, <&osc16M>,
+				 <&ccu 6>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 	};
 };
-- 
2.11.0

[PATCH v2 2/6] ARM: sun8i: a83t: Add device node for PRCM

[Chen-Yu Tsai]

The A83T's PRCM has the same set of clocks and resets as the A64.
However, a few dividers are different. And due to the lack of a low
speed 32.768 kHz oscillator, a few of the clock parents are different.

The PRCM also has controls for various power domains. These are not
supported yet, neither in software nor in the device tree binding.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 1dc4cfe81534..49aeb56970ba 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -270,5 +270,15 @@
 			#interrupt-cells = <3>;
 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
+
+		r_ccu: clock at 1f01400 {
+			compatible = "allwinner,sun8i-a83t-r-ccu";
+			reg = <0x01f01400 0x400>;
+			clocks = <&osc24M>, <&osc16Md512>, <&osc16M>,
+				 <&ccu 6>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 	};
 };
-- 
2.11.0

[PATCH v2 3/6] clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM

[Chen-Yu Tsai]

The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.h      | 4 +++-
 include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
index 85973d1e8165..1b4baea37d81 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
@@ -29,7 +29,9 @@
 #define CLK_PLL_VIDEO		6
 #define CLK_PLL_VE		7
 #define CLK_PLL_DDR		8
-#define CLK_PLL_PERIPH0		9
+
+/* PLL_PERIPH0 exported for PRCM */
+
 #define CLK_PLL_PERIPH0_2X	10
 #define CLK_PLL_GPU		11
 #define CLK_PLL_PERIPH1		12
diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h b/include/dt-bindings/clock/sun8i-h3-ccu.h
index c2afc41d6964..e139fe5c62ec 100644
--- a/include/dt-bindings/clock/sun8i-h3-ccu.h
+++ b/include/dt-bindings/clock/sun8i-h3-ccu.h
@@ -43,6 +43,8 @@
 #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
 #define _DT_BINDINGS_CLK_SUN8I_H3_H_
 
+#define CLK_PLL_PERIPH0		9
+
 #define CLK_CPUX		14
 
 #define CLK_BUS_CE		20
-- 
2.11.0

[PATCH v2 3/6] clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM

[Chen-Yu Tsai]

The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.h      | 4 +++-
 include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
index 85973d1e8165..1b4baea37d81 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
@@ -29,7 +29,9 @@
 #define CLK_PLL_VIDEO		6
 #define CLK_PLL_VE		7
 #define CLK_PLL_DDR		8
-#define CLK_PLL_PERIPH0		9
+
+/* PLL_PERIPH0 exported for PRCM */
+
 #define CLK_PLL_PERIPH0_2X	10
 #define CLK_PLL_GPU		11
 #define CLK_PLL_PERIPH1		12
diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h b/include/dt-bindings/clock/sun8i-h3-ccu.h
index c2afc41d6964..e139fe5c62ec 100644
--- a/include/dt-bindings/clock/sun8i-h3-ccu.h
+++ b/include/dt-bindings/clock/sun8i-h3-ccu.h
@@ -43,6 +43,8 @@
 #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
 #define _DT_BINDINGS_CLK_SUN8I_H3_H_
 
+#define CLK_PLL_PERIPH0		9
+
 #define CLK_CPUX		14
 
 #define CLK_BUS_CE		20
-- 
2.11.0

[PATCH v2 3/6] clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM

[Chen-Yu Tsai]

The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.h      | 4 +++-
 include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
index 85973d1e8165..1b4baea37d81 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
@@ -29,7 +29,9 @@
 #define CLK_PLL_VIDEO		6
 #define CLK_PLL_VE		7
 #define CLK_PLL_DDR		8
-#define CLK_PLL_PERIPH0		9
+
+/* PLL_PERIPH0 exported for PRCM */
+
 #define CLK_PLL_PERIPH0_2X	10
 #define CLK_PLL_GPU		11
 #define CLK_PLL_PERIPH1		12
diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h b/include/dt-bindings/clock/sun8i-h3-ccu.h
index c2afc41d6964..e139fe5c62ec 100644
--- a/include/dt-bindings/clock/sun8i-h3-ccu.h
+++ b/include/dt-bindings/clock/sun8i-h3-ccu.h
@@ -43,6 +43,8 @@
 #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
 #define _DT_BINDINGS_CLK_SUN8I_H3_H_
 
+#define CLK_PLL_PERIPH0		9
+
 #define CLK_CPUX		14
 
 #define CLK_BUS_CE		20
-- 
2.11.0

[PATCH v2 4/6] ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU

[Chen-Yu Tsai]

The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d0067fec99de..d4f600dbb7eb 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -560,8 +560,9 @@
 		r_ccu: clock@1f01400 {
 			compatible = "allwinner,sun8i-h3-r-ccu";
 			reg = <0x01f01400 0x100>;
-			clocks = <&osc24M>, <&osc32k>, <&iosc>;
-			clock-names = "hosc", "losc", "iosc";
+			clocks = <&osc24M>, <&osc32k>, <&iosc>,
+				 <&ccu 9>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
-- 
2.11.0

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[PATCH v2 4/6] ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU

[Chen-Yu Tsai]

The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d0067fec99de..d4f600dbb7eb 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -560,8 +560,9 @@
 		r_ccu: clock@1f01400 {
 			compatible = "allwinner,sun8i-h3-r-ccu";
 			reg = <0x01f01400 0x100>;
-			clocks = <&osc24M>, <&osc32k>, <&iosc>;
-			clock-names = "hosc", "losc", "iosc";
+			clocks = <&osc24M>, <&osc32k>, <&iosc>,
+				 <&ccu 9>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
-- 
2.11.0

[PATCH v2 4/6] ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU

[Chen-Yu Tsai]

The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d0067fec99de..d4f600dbb7eb 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -560,8 +560,9 @@
 		r_ccu: clock at 1f01400 {
 			compatible = "allwinner,sun8i-h3-r-ccu";
 			reg = <0x01f01400 0x100>;
-			clocks = <&osc24M>, <&osc32k>, <&iosc>;
-			clock-names = "hosc", "losc", "iosc";
+			clocks = <&osc24M>, <&osc32k>, <&iosc>,
+				 <&ccu 9>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
-- 
2.11.0

[PATCH v2 5/6] clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM

[Chen-Yu Tsai]

The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 drivers/clk/sunxi-ng/ccu-sun50i-a64.h      | 4 +++-
 include/dt-bindings/clock/sun50i-a64-ccu.h | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
index 9b3cd24b78d2..061b6fbb4f95 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
@@ -31,7 +31,9 @@
 #define CLK_PLL_VIDEO0_2X		8
 #define CLK_PLL_VE			9
 #define CLK_PLL_DDR0			10
-#define CLK_PLL_PERIPH0			11
+
+/* PLL_PERIPH0 exported for PRCM */
+
 #define CLK_PLL_PERIPH0_2X		12
 #define CLK_PLL_PERIPH1			13
 #define CLK_PLL_PERIPH1_2X		14
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h
index 370c0a0473fc..d66432c6e675 100644
--- a/include/dt-bindings/clock/sun50i-a64-ccu.h
+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
@@ -43,6 +43,8 @@
 #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
 #define _DT_BINDINGS_CLK_SUN50I_A64_H_
 
+#define CLK_PLL_PERIPH0		11
+
 #define CLK_BUS_MIPI_DSI	28
 #define CLK_BUS_CE		29
 #define CLK_BUS_DMA		30
-- 
2.11.0

[PATCH v2 5/6] clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM

[Chen-Yu Tsai]

The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi-ng/ccu-sun50i-a64.h      | 4 +++-
 include/dt-bindings/clock/sun50i-a64-ccu.h | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
index 9b3cd24b78d2..061b6fbb4f95 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
@@ -31,7 +31,9 @@
 #define CLK_PLL_VIDEO0_2X		8
 #define CLK_PLL_VE			9
 #define CLK_PLL_DDR0			10
-#define CLK_PLL_PERIPH0			11
+
+/* PLL_PERIPH0 exported for PRCM */
+
 #define CLK_PLL_PERIPH0_2X		12
 #define CLK_PLL_PERIPH1			13
 #define CLK_PLL_PERIPH1_2X		14
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h
index 370c0a0473fc..d66432c6e675 100644
--- a/include/dt-bindings/clock/sun50i-a64-ccu.h
+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
@@ -43,6 +43,8 @@
 #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
 #define _DT_BINDINGS_CLK_SUN50I_A64_H_
 
+#define CLK_PLL_PERIPH0		11
+
 #define CLK_BUS_MIPI_DSI	28
 #define CLK_BUS_CE		29
 #define CLK_BUS_DMA		30
-- 
2.11.0

[PATCH v2 5/6] clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM

[Chen-Yu Tsai]

The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi-ng/ccu-sun50i-a64.h      | 4 +++-
 include/dt-bindings/clock/sun50i-a64-ccu.h | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
index 9b3cd24b78d2..061b6fbb4f95 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
@@ -31,7 +31,9 @@
 #define CLK_PLL_VIDEO0_2X		8
 #define CLK_PLL_VE			9
 #define CLK_PLL_DDR0			10
-#define CLK_PLL_PERIPH0			11
+
+/* PLL_PERIPH0 exported for PRCM */
+
 #define CLK_PLL_PERIPH0_2X		12
 #define CLK_PLL_PERIPH1			13
 #define CLK_PLL_PERIPH1_2X		14
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h
index 370c0a0473fc..d66432c6e675 100644
--- a/include/dt-bindings/clock/sun50i-a64-ccu.h
+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
@@ -43,6 +43,8 @@
 #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
 #define _DT_BINDINGS_CLK_SUN50I_A64_H_
 
+#define CLK_PLL_PERIPH0		11
+
 #define CLK_BUS_MIPI_DSI	28
 #define CLK_BUS_CE		29
 #define CLK_BUS_DMA		30
-- 
2.11.0

[PATCH v2 6/6] arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU

[Chen-Yu Tsai]

The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 90dc4ec79485..4eb2f3ca602a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -448,8 +448,9 @@
 		r_ccu: clock@1f01400 {
 			compatible = "allwinner,sun50i-a64-r-ccu";
 			reg = <0x01f01400 0x100>;
-			clocks = <&osc24M>, <&osc32k>, <&iosc>;
-			clock-names = "hosc", "losc", "iosc";
+			clocks = <&osc24M>, <&osc32k>, <&iosc>,
+				 <&ccu 11>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
-- 
2.11.0

[PATCH v2 6/6] arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU

[Chen-Yu Tsai]

The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 90dc4ec79485..4eb2f3ca602a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -448,8 +448,9 @@
 		r_ccu: clock@1f01400 {
 			compatible = "allwinner,sun50i-a64-r-ccu";
 			reg = <0x01f01400 0x100>;
-			clocks = <&osc24M>, <&osc32k>, <&iosc>;
-			clock-names = "hosc", "losc", "iosc";
+			clocks = <&osc24M>, <&osc32k>, <&iosc>,
+				 <&ccu 11>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
-- 
2.11.0

[PATCH v2 6/6] arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU

[Chen-Yu Tsai]

The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 90dc4ec79485..4eb2f3ca602a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -448,8 +448,9 @@
 		r_ccu: clock at 1f01400 {
 			compatible = "allwinner,sun50i-a64-r-ccu";
 			reg = <0x01f01400 0x100>;
-			clocks = <&osc24M>, <&osc32k>, <&iosc>;
-			clock-names = "hosc", "losc", "iosc";
+			clocks = <&osc24M>, <&osc32k>, <&iosc>,
+				 <&ccu 11>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
-- 
2.11.0

Re: [linux-sunxi] [PATCH v2 1/6] dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks

[Jernej Škrabec]

Hi!

Dne sreda, 31. maj 2017 ob 09:58:19 CEST je Chen-Yu Tsai napisal(a):
> The AR100 clock in the PRCM has parents, one of which is pll-periph from
> the main CCU.
> 
> Add it to the list of required clocks for the PRCM CCU.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
> b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt index
> 095a5807d874..966345972d83 100644
> --- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
> +++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
> @@ -25,7 +25,8 @@ Required properties :
>  - #clock-cells : must contain 1
>  - #reset-cells : must contain 1
> 
> -For the PRCM CCUs on A83T/H3/A64, one more clock is needed:
> +For the PRCM CCUs on A83T/H3/A64, two more clock is needed:

nit: s/clock is/clocks are/

Best regards,
Jernej

> +- "pll-periph": the SoC's peripheral PLL from the main CCU
>  - "iosc": the SoC's internal frequency oscillator
> 
>  Example for generic CCU:
> @@ -42,8 +43,8 @@ Example for PRCM CCU:
>  r_ccu: clock@01f01400 {
>  	compatible = "allwinner,sun50i-a64-r-ccu";
>  	reg = <0x01f01400 0x100>;
> -	clocks = <&osc24M>, <&osc32k>, <&iosc>;
> -	clock-names = "hosc", "losc", "iosc";
> +	clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;
> +	clock-names = "hosc", "losc", "iosc", "pll-periph";
>  	#clock-cells = <1>;
>  	#reset-cells = <1>;
>  };
> --
> 2.11.0
> 
> --
> You received this message because you are subscribed to the Google Groups
> "linux-sunxi" group. To unsubscribe from this group and stop receiving
> emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

[linux-sunxi] [PATCH v2 1/6] dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks

[Jernej Škrabec]

Hi!

Dne sreda, 31. maj 2017 ob 09:58:19 CEST je Chen-Yu Tsai napisal(a):
> The AR100 clock in the PRCM has parents, one of which is pll-periph from
> the main CCU.
> 
> Add it to the list of required clocks for the PRCM CCU.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
> b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt index
> 095a5807d874..966345972d83 100644
> --- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
> +++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
> @@ -25,7 +25,8 @@ Required properties :
>  - #clock-cells : must contain 1
>  - #reset-cells : must contain 1
> 
> -For the PRCM CCUs on A83T/H3/A64, one more clock is needed:
> +For the PRCM CCUs on A83T/H3/A64, two more clock is needed:

nit: s/clock is/clocks are/

Best regards,
Jernej

> +- "pll-periph": the SoC's peripheral PLL from the main CCU
>  - "iosc": the SoC's internal frequency oscillator
> 
>  Example for generic CCU:
> @@ -42,8 +43,8 @@ Example for PRCM CCU:
>  r_ccu: clock at 01f01400 {
>  	compatible = "allwinner,sun50i-a64-r-ccu";
>  	reg = <0x01f01400 0x100>;
> -	clocks = <&osc24M>, <&osc32k>, <&iosc>;
> -	clock-names = "hosc", "losc", "iosc";
> +	clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;
> +	clock-names = "hosc", "losc", "iosc", "pll-periph";
>  	#clock-cells = <1>;
>  	#reset-cells = <1>;
>  };
> --
> 2.11.0
> 
> --
> You received this message because you are subscribed to the Google Groups
> "linux-sunxi" group. To unsubscribe from this group and stop receiving
> emails from it, send an email to linux-sunxi+unsubscribe at googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH v2 0/6] clk: sunxi-ng: Add support for A83T's PRCM

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 766 bytes --]

On Wed, May 31, 2017 at 03:58:18PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
> 
> This is the remaining parts of my A83T PRCM support series, along with
> changes requested by Maxime.
> 
> Patch 1 updates the device tree bindings for the PRCM, adding pll-periph
> to the list of required clocks
> 
> Patch 2 adds a device node for the PRCM on the A83T SoC, updated from v1
> to include the pll-periph clock.
> 
> Patch 3 exports the PLL_PERIPH0 clock from the CCU on the H3/H5, for
> consumption by the PRCM.
> 
> Patch 4 adds the pll-periph clock to the PRCM device node on the H3/H5.
> 
> Patch 5 / 6 are the same as 3 / 4, but for the A64.

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v2 0/6] clk: sunxi-ng: Add support for A83T's PRCM

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 793 bytes --]

On Wed, May 31, 2017 at 03:58:18PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
> 
> This is the remaining parts of my A83T PRCM support series, along with
> changes requested by Maxime.
> 
> Patch 1 updates the device tree bindings for the PRCM, adding pll-periph
> to the list of required clocks
> 
> Patch 2 adds a device node for the PRCM on the A83T SoC, updated from v1
> to include the pll-periph clock.
> 
> Patch 3 exports the PLL_PERIPH0 clock from the CCU on the H3/H5, for
> consumption by the PRCM.
> 
> Patch 4 adds the pll-periph clock to the PRCM device node on the H3/H5.
> 
> Patch 5 / 6 are the same as 3 / 4, but for the A64.

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 801 bytes --]

[PATCH v2 0/6] clk: sunxi-ng: Add support for A83T's PRCM

[Maxime Ripard]

On Wed, May 31, 2017 at 03:58:18PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
> 
> This is the remaining parts of my A83T PRCM support series, along with
> changes requested by Maxime.
> 
> Patch 1 updates the device tree bindings for the PRCM, adding pll-periph
> to the list of required clocks
> 
> Patch 2 adds a device node for the PRCM on the A83T SoC, updated from v1
> to include the pll-periph clock.
> 
> Patch 3 exports the PLL_PERIPH0 clock from the CCU on the H3/H5, for
> consumption by the PRCM.
> 
> Patch 4 adds the pll-periph clock to the PRCM device node on the H3/H5.
> 
> Patch 5 / 6 are the same as 3 / 4, but for the A64.

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [PATCH v2 1/6] dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks

[Rob Herring]

On Wed, May 31, 2017 at 03:58:19PM +0800, Chen-Yu Tsai wrote:
> The AR100 clock in the PRCM has parents, one of which is pll-periph from
> the main CCU.
> 
> Add it to the list of required clocks for the PRCM CCU.
> 
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

Re: [PATCH v2 1/6] dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks

[Rob Herring]

On Wed, May 31, 2017 at 03:58:19PM +0800, Chen-Yu Tsai wrote:
> The AR100 clock in the PRCM has parents, one of which is pll-periph from
> the main CCU.
> 
> Add it to the list of required clocks for the PRCM CCU.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH v2 1/6] dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks

[Rob Herring]

On Wed, May 31, 2017 at 03:58:19PM +0800, Chen-Yu Tsai wrote:
> The AR100 clock in the PRCM has parents, one of which is pll-periph from
> the main CCU.
> 
> Add it to the list of required clocks for the PRCM CCU.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>