[U-Boot] [PATCH v4 0/9] rockchip: video: rk3399: enable HDMI output

[U-Boot] [PATCH v4 0/9] rockchip: video: rk3399: enable HDMI output

[Philipp Tomsich]

This series provides HDMI enablement for the RK3399 and will support
video console on the RK3399 either with VOP-lit or VOP-big:
 - pinctrl and clk support for the hdmi node
 - a refactoring of rk_vop.c and rk_hdmi.c to allow for the minor
   differences between the RK3288 and RK3399 VOP and HDMI blocks

This has been tested (on top of sjg/master) using 'bmp display' and
'setenv stdout vidconsole' on the RK3399-Q7 with various HDMI monitors,
both for VOP-lit and VOP-big (setting the other one to 'disabled').

v4 splits the changes to the rk_vop and rk_hdmi components into more
manageable series of changes.

Changes in v4:
- added patch to break down into smaller changes
- added patch to break down into smaller changes
- added patch to break down into smaller changes
- split the massive "refactor, split and add RK3399 support"-change into
  smaller chunks that are more easily digestible
- new patch (split off from the earlier RK3399 HDMI encoder change)
- splits the large change into smaller changes

Changes in v3:
- splits the VOP driver into SOC-specific and common portions
- moves the "maximum x" and "maximum y" resolution config into Kconfig (instead
  of having hard-coded values that may need to be revised each time someone adds
  a new device or new features)
- split into separate drivers for the SOC-specific portion of the driver
- rebase to sjg/next

Changes in v2:
- removed DEBUG from the patch (as was done in our production branches,
  but missing from the patch-prep branch)
- updated SJG's comment (with a TODO for the RK3288) to reflect the
  new code structure

Philipp Tomsich (9):
  rockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIP
  rockchip: video: Kconfig: set MAX_XRES and MAX_YRES via Kconfig
  rockchip: video: refactor rk_vop and split RK3328-specific code off
  rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the
    RK3399
  rockchip: video: add mpixelclock settings from Linux driver
  rockchip: video: split RK3228-specific part off from rk_hdmi
  rockchip: video: rk3399: add HDMI TX support on the RK3399
  rockchip: dts: rk3399: enable HDMI output in the DTS
  rockchip: board: puma_rk3399: enable BMP_16BPP, BMP_24BPP and
    BMP_32BPP

 arch/arm/dts/rk3399.dtsi                        |  39 +++++
 arch/arm/include/asm/arch-rockchip/grf_rk3399.h |   3 +
 arch/arm/include/asm/arch-rockchip/vop_rk3288.h |  11 ++
 drivers/video/rockchip/Kconfig                  |  29 +++-
 drivers/video/rockchip/Makefile                 |   6 +-
 drivers/video/rockchip/rk3288_hdmi.c            | 116 +++++++++++++++
 drivers/video/rockchip/rk3288_vop.c             |  95 ++++++++++++
 drivers/video/rockchip/rk3399_hdmi.c            |  81 +++++++++++
 drivers/video/rockchip/rk3399_vop.c             | 105 ++++++++++++++
 drivers/video/rockchip/rk_hdmi.c                | 114 ++++-----------
 drivers/video/rockchip/rk_hdmi.h                |  32 ++++
 drivers/video/rockchip/rk_vop.c                 | 185 ++++++++++++------------
 drivers/video/rockchip/rk_vop.h                 |  32 ++++
 include/configs/puma_rk3399.h                   |   4 +
 14 files changed, 662 insertions(+), 190 deletions(-)
 create mode 100644 drivers/video/rockchip/rk3288_hdmi.c
 create mode 100644 drivers/video/rockchip/rk3288_vop.c
 create mode 100644 drivers/video/rockchip/rk3399_hdmi.c
 create mode 100644 drivers/video/rockchip/rk3399_vop.c
 create mode 100644 drivers/video/rockchip/rk_hdmi.h
 create mode 100644 drivers/video/rockchip/rk_vop.h

-- 
1.9.1

[U-Boot] [PATCH v4 1/9] rockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIP

[Philipp Tomsich]

For consistency sake (and as we are about to add new options to this
file), reformat the help for VIDEO_ROCKCHIP.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

---

Changes in v4:
- added to break down into smaller changes

Changes in v3: None
Changes in v2: None

 drivers/video/rockchip/Kconfig | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig
index 80e399f..4ad2da5 100644
--- a/drivers/video/rockchip/Kconfig
+++ b/drivers/video/rockchip/Kconfig
@@ -12,11 +12,12 @@ menuconfig VIDEO_ROCKCHIP
 	bool "Enable Rockchip Video Support"
 	depends on DM_VIDEO
 	help
-		Rockchip SoCs provide video output capabilities for High-Definition
-		Multimedia Interface (HDMI), Low-voltage Differential Signalling
-		(LVDS), embedded DisplayPort (eDP) and Display Serial Interface
-		(DSI). This driver supports the on-chip video output device, and
-		targets the Rockchip RK3288 and RK3399.
+	  Rockchip SoCs provide video output capabilities for High-Definition
+	  Multimedia Interface (HDMI), Low-voltage Differential Signalling
+	  (LVDS), embedded DisplayPort (eDP) and Display Serial Interface (DSI).
+
+	  This driver supports the on-chip video output device, and targets the
+	  Rockchip RK3288 and RK3399.
 
 if VIDEO_ROCKCHIP
 
-- 
1.9.1

[U-Boot] [PATCH v4 2/9] rockchip: video: Kconfig: set MAX_XRES and MAX_YRES via Kconfig

[Philipp Tomsich]

This introduces two new Kconfig options that configure the maximum
allowable framebuffer size (i.e. the memory reservation/allocation for
the framebuffer):
 - VIDEO_ROCKCHIP_MAX_XRES
 - VIDEO_ROCKCHIP_MAX_YRES
The resulting memory allocation will cover 4 byte per pixel for these
resolutions.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

---

Changes in v4:
- added to break down into smaller changes

Changes in v3: None
Changes in v2: None

 drivers/video/rockchip/Kconfig  | 18 ++++++++++++++++++
 drivers/video/rockchip/rk_vop.c |  3 ++-
 2 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig
index 4ad2da5..b1d7c62 100644
--- a/drivers/video/rockchip/Kconfig
+++ b/drivers/video/rockchip/Kconfig
@@ -19,6 +19,24 @@ menuconfig VIDEO_ROCKCHIP
 	  This driver supports the on-chip video output device, and targets the
 	  Rockchip RK3288 and RK3399.
 
+config VIDEO_ROCKCHIP_MAX_XRES
+        int "Maximum horizontal resolution (for memory allocation purposes)"
+	depends on VIDEO_ROCKCHIP
+	default 1920
+	help
+	  The maximum horizontal resolution to support for the framebuffer.
+	  This configuration is used for reserving/allocating memory for the
+	  framebuffer during device-model binding/probing.
+
+config VIDEO_ROCKCHIP_MAX_YRES
+        int "Maximum vertical resolution (for memory allocation purposes)"
+	depends on VIDEO_ROCKCHIP
+	default 1080
+	help
+	  The maximum vertical resolution to support for the framebuffer.
+	  This configuration is used for reserving/allocating memory for the
+	  framebuffer during device-model binding/probing.
+
 if VIDEO_ROCKCHIP
 
 config DISPLAY_ROCKCHIP_EDP
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index aa6ca8c..16d1484 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -357,7 +357,8 @@ static int rk_vop_bind(struct udevice *dev)
 {
 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
 
-	plat->size = 1920 * 1200 * 4;
+	plat->size = 4 * (CONFIG_VIDEO_ROCKCHIP_MAX_XRES *
+			  CONFIG_VIDEO_ROCKCHIP_MAX_YRES);
 
 	return 0;
 }
-- 
1.9.1

[U-Boot] [PATCH v4 3/9] rockchip: video: refactor rk_vop and split RK3328-specific code off

[Philipp Tomsich]

To prepare for adding the RK3399 VOP driver (which shares most of its
registers and config logic with the RK3228 VOP), this change refactors
the driver and splits the RK3288-specific driver off.

The changes in detail are:
- introduces a data-structure for chip-specific drivers to register
  features/callbacks with the common driver: at this time, this is
  limited to a callback for setting the pin polarities (between the
  VOP and the encoder modules) and a flag to signal 10bit RGB
  capability
- refactors the probing of regulators into a helper function that
  can take a list of regulator names to probe and autoset
- moves the priv data-structure into a (common) header file to be
  used by the chip-specific drivers to provide base addresses to
  the common driver
- uses a callback into the chip-specific driver to set pin polarities
  (replacing the direct register accesses previously used)
- splits enabling the output (towards an encoder) into a separate
  help function withint the common driver

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

---

Changes in v4:
- added to break down into smaller changes

Changes in v3: None
Changes in v2: None

 arch/arm/include/asm/arch-rockchip/vop_rk3288.h |   1 +
 drivers/video/rockchip/Makefile                 |   1 +
 drivers/video/rockchip/rk3288_vop.c             |  95 +++++++++++++
 drivers/video/rockchip/rk_vop.c                 | 182 ++++++++++++------------
 drivers/video/rockchip/rk_vop.h                 |  32 +++++
 5 files changed, 217 insertions(+), 94 deletions(-)
 create mode 100644 drivers/video/rockchip/rk3288_vop.c
 create mode 100644 drivers/video/rockchip/rk_vop.h

diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index d5599ec..049f192 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -197,6 +197,7 @@ enum vop_modes {
 #define V_DSP_DEN_POL(x)               (((x) & 1) << 6)
 #define V_DSP_VSYNC_POL(x)             (((x) & 1) << 5)
 #define V_DSP_HSYNC_POL(x)             (((x) & 1) << 4)
+#define V_DSP_PIN_POL(x)               (((x) & 0xf) << 4)
 #define V_DSP_OUT_MODE(x)              ((x) & 0xf)
 
 /* VOP_DSP_CTRL1 */
diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
index cd54b12..9477ad0 100644
--- a/drivers/video/rockchip/Makefile
+++ b/drivers/video/rockchip/Makefile
@@ -7,6 +7,7 @@
 
 ifdef CONFIG_VIDEO_ROCKCHIP
 obj-y += rk_vop.o
+obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o
diff --git a/drivers/video/rockchip/rk3288_vop.c b/drivers/video/rockchip/rk3288_vop.c
new file mode 100644
index 0000000..e3e1ec7
--- /dev/null
+++ b/drivers/video/rockchip/rk3288_vop.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2015 Google, Inc
+ * Copyright 2014 Rockchip Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <display.h>
+#include <dm.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <video.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3288.h>
+#include "rk_vop.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void rk3288_set_pin_polarity(struct udevice *dev,
+				    enum vop_modes mode, u32 polarity)
+{
+	struct rk_vop_priv *priv = dev_get_priv(dev);
+	struct rk3288_vop *regs = priv->regs;
+
+	/* The RK3328 VOP (v3.1) has its polarity configuration in ctrl0 */
+	clrsetbits_le32(&regs->dsp_ctrl0,
+			M_DSP_DCLK_POL | M_DSP_DEN_POL |
+			M_DSP_VSYNC_POL | M_DSP_HSYNC_POL,
+			V_DSP_PIN_POL(polarity));
+}
+
+static void rk3288_set_io_vsel(struct udevice *dev)
+{
+	struct rk3288_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/* lcdc(vop) iodomain select 1.8V */
+	rk_setreg(&grf->io_vsel, 1 << 0);
+}
+
+/*
+ * Try some common regulators. We should really get these from the
+ * device tree somehow.
+ */
+static const char * const rk3288_regulator_names[] = {
+	"vcc18_lcd",
+	"VCC18_LCD",
+	"vdd10_lcd_pwren_h",
+	"vdd10_lcd",
+	"VDD10_LCD",
+	"vcc33_lcd"
+};
+
+static int rk3288_vop_probe(struct udevice *dev)
+{
+	/* Before relocation we don't need to do anything */
+	if (!(gd->flags & GD_FLG_RELOC))
+		return 0;
+
+	/* Set the LCDC(vop) iodomain to 1.8V */
+	rk3288_set_io_vsel(dev);
+
+	/* Probe regulators required for the RK3288 VOP */
+	rk_vop_probe_regulators(dev, rk3288_regulator_names,
+				ARRAY_SIZE(rk3288_regulator_names));
+
+	return rk_vop_probe(dev);
+}
+
+struct rkvop_driverdata rk3288_driverdata = {
+	.features = VOP_FEATURE_OUTPUT_10BIT,
+	.set_pin_polarity = rk3288_set_pin_polarity,
+};
+
+static const struct udevice_id rk3288_vop_ids[] = {
+	{ .compatible = "rockchip,rk3288-vop",
+	  .data = (ulong)&rk3288_driverdata },
+	{ }
+};
+
+static const struct video_ops rk3288_vop_ops = {
+};
+
+U_BOOT_DRIVER(rk_vop) = {
+	.name	= "rk3288_vop",
+	.id	= UCLASS_VIDEO,
+	.of_match = rk3288_vop_ids,
+	.ops	= &rk3288_vop_ops,
+	.bind	= rk_vop_bind,
+	.probe	= rk3288_vop_probe,
+	.priv_auto_alloc_size	= sizeof(struct rk_vop_priv),
+};
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index 16d1484..c15f93d 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -17,24 +17,25 @@
 #include <asm/hardware.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
-#include <asm/arch/grf_rk3288.h>
 #include <asm/arch/edp_rk3288.h>
 #include <asm/arch/vop_rk3288.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
-#include <dt-bindings/clock/rk3288-cru.h>
 #include <power/regulator.h>
+#include "rk_vop.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct rk_vop_priv {
-	struct rk3288_vop *regs;
-	struct rk3288_grf *grf;
+enum vop_pol {
+	HSYNC_POSITIVE = 0,
+	VSYNC_POSITIVE = 1,
+	DEN_NEGATIVE   = 2,
+	DCLK_INVERT    = 3
 };
 
-void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,
-		  int fb_bits_per_pixel, const struct display_timing *edid)
+static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,
+			 int fb_bits_per_pixel,
+			 const struct display_timing *edid)
 {
 	u32 lb_mode;
 	u32 rgb_mode;
@@ -89,54 +90,83 @@ void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,
 	writel(0x01, &regs->reg_cfg_done); /* enable reg config */
 }
 
-void rkvop_mode_set(struct rk3288_vop *regs,
-		    const struct display_timing *edid, enum vop_modes mode)
+static void rkvop_set_pin_polarity(struct udevice *dev,
+				   enum vop_modes mode, u32 polarity)
 {
-	u32 hactive = edid->hactive.typ;
-	u32 vactive = edid->vactive.typ;
-	u32 hsync_len = edid->hsync_len.typ;
-	u32 hback_porch = edid->hback_porch.typ;
-	u32 vsync_len = edid->vsync_len.typ;
-	u32 vback_porch = edid->vback_porch.typ;
-	u32 hfront_porch = edid->hfront_porch.typ;
-	u32 vfront_porch = edid->vfront_porch.typ;
-	uint flags;
-	int mode_flags;
+	struct rkvop_driverdata *ops =
+		(struct rkvop_driverdata *)dev_get_driver_data(dev);
+
+	if (ops->set_pin_polarity)
+		ops->set_pin_polarity(dev, mode, polarity);
+}
+
+static void rkvop_enable_output(struct udevice *dev, enum vop_modes mode)
+{
+	struct rk_vop_priv *priv = dev_get_priv(dev);
+	struct rk3288_vop *regs = priv->regs;
 
 	switch (mode) {
 	case VOP_MODE_HDMI:
 		clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
 				V_HDMI_OUT_EN(1));
 		break;
+
 	case VOP_MODE_EDP:
-	default:
 		clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
 				V_EDP_OUT_EN(1));
 		break;
+
 	case VOP_MODE_LVDS:
 		clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
 				V_RGB_OUT_EN(1));
 		break;
+
 	case VOP_MODE_MIPI:
 		clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
 				V_MIPI_OUT_EN(1));
-		 break;
+		break;
+
+	default:
+		debug("%s: unsupported output mode %x\n", __func__, mode);
 	}
+}
 
-	if (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)
-		/* RGBaaa */
-		mode_flags = 15;
-	else
-		/* RGB888 */
-		mode_flags = 0;
+static void rkvop_mode_set(struct udevice *dev,
+			   const struct display_timing *edid,
+			   enum vop_modes mode)
+{
+	struct rk_vop_priv *priv = dev_get_priv(dev);
+	struct rk3288_vop *regs = priv->regs;
+	struct rkvop_driverdata *data =
+		(struct rkvop_driverdata *)dev_get_driver_data(dev);
 
-	flags = V_DSP_OUT_MODE(mode_flags) |
-		V_DSP_HSYNC_POL(!!(edid->flags & DISPLAY_FLAGS_HSYNC_HIGH)) |
-		V_DSP_VSYNC_POL(!!(edid->flags & DISPLAY_FLAGS_VSYNC_HIGH));
+	u32 hactive = edid->hactive.typ;
+	u32 vactive = edid->vactive.typ;
+	u32 hsync_len = edid->hsync_len.typ;
+	u32 hback_porch = edid->hback_porch.typ;
+	u32 vsync_len = edid->vsync_len.typ;
+	u32 vback_porch = edid->vback_porch.typ;
+	u32 hfront_porch = edid->hfront_porch.typ;
+	u32 vfront_porch = edid->vfront_porch.typ;
+	int mode_flags;
+	u32 pin_polarity;
+
+	pin_polarity = BIT(DCLK_INVERT);
+	if (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH)
+		pin_polarity |= BIT(HSYNC_POSITIVE);
+	if (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH)
+		pin_polarity |= BIT(VSYNC_POSITIVE);
+
+	rkvop_set_pin_polarity(dev, mode, pin_polarity);
+	rkvop_enable_output(dev, mode);
 
-	clrsetbits_le32(&regs->dsp_ctrl0,
-			M_DSP_OUT_MODE | M_DSP_VSYNC_POL | M_DSP_HSYNC_POL,
-			flags);
+	mode_flags = 0;  /* RGB888 */
+	if ((data->features & VOP_FEATURE_OUTPUT_10BIT) &&
+	    (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP))
+		mode_flags = 15;  /* RGBaaa */
+
+	clrsetbits_le32(&regs->dsp_ctrl0, M_DSP_OUT_MODE,
+			V_DSP_OUT_MODE(mode_flags));
 
 	writel(V_HSYNC(hsync_len) |
 	       V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch),
@@ -185,7 +215,7 @@ void rkvop_mode_set(struct rk3288_vop *regs,
  *		node within the VOP's 'port' list.
  * @return 0 if OK, -ve if something went wrong
  */
-int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
+static int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
 {
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
 	const void *blob = gd->fdt_blob;
@@ -255,18 +285,18 @@ int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
 	/* Set bitwidth for vop display according to vop mode */
 	switch (vop_id) {
 	case VOP_MODE_EDP:
-	case VOP_MODE_HDMI:
 	case VOP_MODE_LVDS:
 		l2bpp = VIDEO_BPP16;
 		break;
+	case VOP_MODE_HDMI:
 	case VOP_MODE_MIPI:
 		l2bpp = VIDEO_BPP32;
 		break;
 	default:
 		l2bpp = VIDEO_BPP16;
 	}
-	rkvop_mode_set(regs, &timing, vop_id);
 
+	rkvop_mode_set(dev, &timing, vop_id);
 	rkvop_enable(regs, fbbase, 1 << l2bpp, &timing);
 
 	ret = display_enable(disp, 1 << l2bpp, &timing);
@@ -281,53 +311,37 @@ int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
 	return 0;
 }
 
-static int rk_vop_probe(struct udevice *dev)
+void rk_vop_probe_regulators(struct udevice *dev,
+			     const char * const *names, int cnt)
+{
+	int i, ret;
+	const char *name;
+	struct udevice *reg;
+
+	for (i = 0; i < cnt; ++i) {
+		name = names[i];
+		debug("%s: probing regulator '%s'\n", dev->name, name);
+
+		ret = regulator_autoset_by_name(name, &reg);
+		if (!ret)
+			ret = regulator_set_enable(reg, true);
+	}
+}
+
+int rk_vop_probe(struct udevice *dev)
 {
 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
 	const void *blob = gd->fdt_blob;
 	struct rk_vop_priv *priv = dev_get_priv(dev);
-	struct udevice *reg;
-	int ret, port, node;
+	int ret = 0;
+	int port, node;
 
 	/* Before relocation we don't need to do anything */
 	if (!(gd->flags & GD_FLG_RELOC))
 		return 0;
 
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	priv->regs = (struct rk3288_vop *)dev_get_addr(dev);
 
-	/* lcdc(vop) iodomain select 1.8V */
-	rk_setreg(&priv->grf->io_vsel, 1 << 0);
-
-	/*
-	 * Try some common regulators. We should really get these from the
-	 * device tree somehow.
-	 */
-	ret = regulator_autoset_by_name("vcc18_lcd", &reg);
-	if (ret)
-		debug("%s: Cannot autoset regulator vcc18_lcd\n", __func__);
-	ret = regulator_autoset_by_name("VCC18_LCD", &reg);
-	if (ret)
-		debug("%s: Cannot autoset regulator VCC18_LCD\n", __func__);
-	ret = regulator_autoset_by_name("vdd10_lcd_pwren_h", &reg);
-	if (ret) {
-		debug("%s: Cannot autoset regulator vdd10_lcd_pwren_h\n",
-		      __func__);
-	}
-	ret = regulator_autoset_by_name("vdd10_lcd", &reg);
-	if (ret) {
-		debug("%s: Cannot autoset regulator vdd10_lcd\n",
-		      __func__);
-	}
-	ret = regulator_autoset_by_name("VDD10_LCD", &reg);
-	if (ret) {
-		debug("%s: Cannot autoset regulator VDD10_LCD\n",
-		      __func__);
-	}
-	ret = regulator_autoset_by_name("vcc33_lcd", &reg);
-	if (ret)
-		debug("%s: Cannot autoset regulator vcc33_lcd\n", __func__);
-
 	/*
 	 * Try all the ports until we find one that works. In practice this
 	 * tries EDP first if available, then HDMI.
@@ -353,7 +367,7 @@ static int rk_vop_probe(struct udevice *dev)
 	return ret;
 }
 
-static int rk_vop_bind(struct udevice *dev)
+int rk_vop_bind(struct udevice *dev)
 {
 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
 
@@ -362,23 +376,3 @@ static int rk_vop_bind(struct udevice *dev)
 
 	return 0;
 }
-
-static const struct video_ops rk_vop_ops = {
-};
-
-static const struct udevice_id rk_vop_ids[] = {
-	{ .compatible = "rockchip,rk3399-vop-big" },
-	{ .compatible = "rockchip,rk3399-vop-lit" },
-	{ .compatible = "rockchip,rk3288-vop" },
-	{ }
-};
-
-U_BOOT_DRIVER(rk_vop) = {
-	.name	= "rk_vop",
-	.id	= UCLASS_VIDEO,
-	.of_match = rk_vop_ids,
-	.ops	= &rk_vop_ops,
-	.bind	= rk_vop_bind,
-	.probe	= rk_vop_probe,
-	.priv_auto_alloc_size	= sizeof(struct rk_vop_priv),
-};
diff --git a/drivers/video/rockchip/rk_vop.h b/drivers/video/rockchip/rk_vop.h
new file mode 100644
index 0000000..f65ac17
--- /dev/null
+++ b/drivers/video/rockchip/rk_vop.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __RK_VOP_H__
+#define __RK_VOP_H__
+
+#include <asm/arch/vop_rk3288.h>
+
+struct rk_vop_priv {
+	void *regs;
+};
+
+enum vop_features {
+	VOP_FEATURE_OUTPUT_10BIT = (1 << 0),
+};
+
+struct rkvop_driverdata {
+	/* configuration */
+	u32 features;
+	/* block-specific setters/getters */
+	void (*set_pin_polarity)(struct udevice *, enum vop_modes, u32);
+};
+
+int rk_vop_probe(struct udevice *dev);
+int rk_vop_bind(struct udevice *dev);
+void rk_vop_probe_regulators(struct udevice *dev,
+			     const char * const *names, int cnt);
+
+#endif
-- 
1.9.1

[U-Boot] [PATCH v4 4/9] rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399

[Philipp Tomsich]

This commit adds a driver for the RK3399 VOPs capable and all the
necessary plumbing to feed the HDMI encoder. For the VOP-big, this
correctly tracks the ability to feed 10bit RGB data to the encoder.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

---

Changes in v4:
- split the massive "refactor, split and add RK3399 support"-change into
  smaller chunks that are more easily digestible

Changes in v3:
- splits the VOP driver into SOC-specific and common portions
- moves the "maximum x" and "maximum y" resolution config into Kconfig (instead
  of having hard-coded values that may need to be revised each time someone adds
  a new device or new features)

Changes in v2: None

 arch/arm/include/asm/arch-rockchip/vop_rk3288.h |  10 +++
 drivers/video/rockchip/Makefile                 |   1 +
 drivers/video/rockchip/rk3399_vop.c             | 105 ++++++++++++++++++++++++
 3 files changed, 116 insertions(+)
 create mode 100644 drivers/video/rockchip/rk3399_vop.c

diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 049f192..21e59be 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -201,6 +201,16 @@ enum vop_modes {
 #define V_DSP_OUT_MODE(x)              ((x) & 0xf)
 
 /* VOP_DSP_CTRL1 */
+#define V_RK3399_DSP_MIPI_POL(x)       ((x) << 28)
+#define V_RK3399_DSP_EDP_POL(x)        ((x) << 24)
+#define V_RK3399_DSP_HDMI_POL(x)       ((x) << 20)
+#define V_RK3399_DSP_LVDS_POL(x)       ((x) << 16)
+
+#define M_RK3399_DSP_MIPI_POL          (V_RK3399_DSP_MIPI_POL(0xf))
+#define M_RK3399_DSP_EDP_POL           (V_RK3399_DSP_EDP_POL(0xf))
+#define M_RK3399_DSP_HDMI_POL          (V_RK3399_DSP_HDMI_POL(0xf))
+#define M_RK3399_DSP_LVDS_POL          (V_RK3399_DSP_LVDS_POL(0xf))
+
 #define M_DSP_LAYER3_SEL               (3 << 14)
 #define M_DSP_LAYER2_SEL               (3 << 12)
 #define M_DSP_LAYER1_SEL               (3 << 10)
diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
index 9477ad0..495d5f7 100644
--- a/drivers/video/rockchip/Makefile
+++ b/drivers/video/rockchip/Makefile
@@ -8,6 +8,7 @@
 ifdef CONFIG_VIDEO_ROCKCHIP
 obj-y += rk_vop.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
+obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o
diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c
new file mode 100644
index 0000000..91a40ab
--- /dev/null
+++ b/drivers/video/rockchip/rk3399_vop.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2015 Google, Inc
+ * Copyright 2014 Rockchip Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <display.h>
+#include <dm.h>
+#include <regmap.h>
+#include <video.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include "rk_vop.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void rk3399_set_pin_polarity(struct udevice *dev,
+				    enum vop_modes mode, u32 polarity)
+{
+	struct rk_vop_priv *priv = dev_get_priv(dev);
+	struct rk3288_vop *regs = priv->regs;
+
+	/*
+	 * The RK3399 VOPs (v3.5 and v3.6) require a per-mode setting of
+	 * the polarity configuration (in ctrl1).
+	 */
+	switch (mode) {
+	case VOP_MODE_HDMI:
+		clrsetbits_le32(&regs->dsp_ctrl1,
+				M_RK3399_DSP_HDMI_POL,
+				V_RK3399_DSP_HDMI_POL(polarity));
+		break;
+
+	case VOP_MODE_EDP:
+		clrsetbits_le32(&regs->dsp_ctrl1,
+				M_RK3399_DSP_EDP_POL,
+				V_RK3399_DSP_EDP_POL(polarity));
+		break;
+
+	case VOP_MODE_MIPI:
+		clrsetbits_le32(&regs->dsp_ctrl1,
+				M_RK3399_DSP_MIPI_POL,
+				V_RK3399_DSP_MIPI_POL(polarity));
+		break;
+
+	case VOP_MODE_LVDS:
+		/* The RK3399 has neither parallel RGB nor LVDS output. */
+	default:
+		debug("%s: unsupported output mode %x\n", __func__, mode);
+	}
+}
+
+/*
+ * Try some common regulators. We should really get these from the
+ * device tree somehow.
+ */
+static const char * const rk3399_regulator_names[] = {
+	"vcc33_lcd"
+};
+
+static int rk3399_vop_probe(struct udevice *dev)
+{
+	/* Before relocation we don't need to do anything */
+	if (!(gd->flags & GD_FLG_RELOC))
+		return 0;
+
+	/* Probe regulators required for the RK3399 VOP */
+	rk_vop_probe_regulators(dev, rk3399_regulator_names,
+				ARRAY_SIZE(rk3399_regulator_names));
+
+	return rk_vop_probe(dev);
+}
+
+struct rkvop_driverdata rk3399_lit_driverdata = {
+	.set_pin_polarity = rk3399_set_pin_polarity,
+};
+
+struct rkvop_driverdata rk3399_big_driverdata = {
+	.features = VOP_FEATURE_OUTPUT_10BIT,
+	.set_pin_polarity = rk3399_set_pin_polarity,
+};
+
+static const struct udevice_id rk3399_vop_ids[] = {
+	{ .compatible = "rockchip,rk3399-vop-big",
+	  .data = (ulong)&rk3399_big_driverdata },
+	{ .compatible = "rockchip,rk3399-vop-lit",
+	  .data = (ulong)&rk3399_lit_driverdata },
+	{ }
+};
+
+static const struct video_ops rk3399_vop_ops = {
+};
+
+U_BOOT_DRIVER(rk3399_vop) = {
+	.name	= "rk3399_vop",
+	.id	= UCLASS_VIDEO,
+	.of_match = rk3399_vop_ids,
+	.ops	= &rk3399_vop_ops,
+	.bind	= rk_vop_bind,
+	.probe	= rk3399_vop_probe,
+	.priv_auto_alloc_size	= sizeof(struct rk_vop_priv),
+};
-- 
1.9.1

[U-Boot] [PATCH v4 5/9] rockchip: video: add mpixelclock settings from Linux driver

[Philipp Tomsich]

The Linux driver now supports higher mpixelclock settings.
Add these to rockchip_phy_config[] and rockchip_mpll_cfg[].

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

---

Changes in v4:
- new patch (split off from the earlier RK3399 HDMI encoder change)

Changes in v3: None
Changes in v2: None

 drivers/video/rockchip/rk_hdmi.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c
index db07588..2af4995 100644
--- a/drivers/video/rockchip/rk_hdmi.c
+++ b/drivers/video/rockchip/rk_hdmi.c
@@ -35,6 +35,9 @@ static const struct hdmi_phy_config rockchip_phy_config[] = {
 		.mpixelclock = 297000000,
 		.sym_ctr = 0x8039, .term = 0x0005, .vlev_ctr = 0x028d,
 	}, {
+		.mpixelclock = 584000000,
+		.sym_ctr = 0x8039, .term = 0x0000, .vlev_ctr = 0x019d,
+	}, {
 		.mpixelclock = ~0ul,
 		.sym_ctr = 0x0000, .term = 0x0000, .vlev_ctr = 0x0000,
 	}
@@ -60,6 +63,12 @@ static const struct hdmi_mpll_config rockchip_mpll_cfg[] = {
 		.mpixelclock = 148500000,
 		.cpce = 0x0051, .gmp = 0x0003, .curr = 0x0000,
 	}, {
+		.mpixelclock = 272000000,
+		.cpce = 0x0040, .gmp = 0x0003, .curr = 0x0000,
+	}, {
+		.mpixelclock = 340000000,
+		.cpce = 0x0040, .gmp = 0x0003, .curr = 0x0000,
+	}, {
 		.mpixelclock = ~0ul,
 		.cpce = 0x0051, .gmp = 0x0003, .curr = 0x0000,
 	}
-- 
1.9.1

[U-Boot] [PATCH v4 6/9] rockchip: video: split RK3228-specific part off from rk_hdmi

[Philipp Tomsich]

To prepare for the addition of RK3399 HDMI support, the HDMI driver is
refactored and broken into a chip-specific and a generic part.  This
change adds the internal interfaces, makes common/reusable functions
externally visible and splits the RK3228 driver into a separate file.

For the probing of regulators, we reuse the infrastructure created
during the VOP refactoring... i.e. we simply call into the helper
function defined for the VOP.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 4
- add this path (as part of breaking up the large HDMI change for the RK3399)

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/video/rockchip/Makefile      |   3 +-
 drivers/video/rockchip/rk3288_hdmi.c | 116 +++++++++++++++++++++++++++++++++++
 drivers/video/rockchip/rk_hdmi.c     | 105 +++++--------------------------
 drivers/video/rockchip/rk_hdmi.h     |  32 ++++++++++
 4 files changed, 166 insertions(+), 90 deletions(-)
 create mode 100644 drivers/video/rockchip/rk3288_hdmi.c
 create mode 100644 drivers/video/rockchip/rk_hdmi.h

diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
index 495d5f7..65d0ed6 100644
--- a/drivers/video/rockchip/Makefile
+++ b/drivers/video/rockchip/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
-obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o
+obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o
+obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y)
 obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o
 endif
diff --git a/drivers/video/rockchip/rk3288_hdmi.c b/drivers/video/rockchip/rk3288_hdmi.c
new file mode 100644
index 0000000..eae0dd2
--- /dev/null
+++ b/drivers/video/rockchip/rk3288_hdmi.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <display.h>
+#include <dm.h>
+#include <dw_hdmi.h>
+#include <edid.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3288.h>
+#include <power/regulator.h>
+#include "rk_hdmi.h"
+
+static int rk3288_hdmi_enable(struct udevice *dev, int panel_bpp,
+			      const struct display_timing *edid)
+{
+	struct rk_hdmi_priv *priv = dev_get_priv(dev);
+	struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
+	int vop_id = uc_plat->source_id;
+	struct rk3288_grf *grf = priv->grf;
+
+	/* hdmi source select hdmi controller */
+	rk_setreg(&grf->soc_con6, 1 << 15);
+
+	/* hdmi data from vop id */
+	rk_clrsetreg(&grf->soc_con6, 1 << 4, (vop_id == 1) ? (1 << 4) : 0);
+
+	return 0;
+}
+
+static int rk3288_hdmi_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk_hdmi_priv *priv = dev_get_priv(dev);
+	struct dw_hdmi *hdmi = &priv->hdmi;
+
+	hdmi->i2c_clk_high = 0x7a;
+	hdmi->i2c_clk_low = 0x8d;
+
+	/*
+	 * TODO(sjg at chromium.org): The above values don't work - these
+	 * ones work better, but generate lots of errors in the data.
+	 */
+	hdmi->i2c_clk_high = 0x0d;
+	hdmi->i2c_clk_low = 0x0d;
+
+	return rk_hdmi_ofdata_to_platdata(dev);
+}
+
+static int rk3288_clk_config(struct udevice *dev)
+{
+	struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
+	struct clk clk;
+	int ret;
+
+	/*
+	 * Configure the maximum clock to permit whatever resolution the
+	 * monitor wants
+	 */
+	ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
+	if (ret >= 0) {
+		ret = clk_set_rate(&clk, 384000000);
+		clk_free(&clk);
+	}
+	if (ret < 0) {
+		debug("%s: Failed to set clock in source device '%s': ret=%d\n",
+		      __func__, uc_plat->src_dev->name, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const char * const rk3288_regulator_names[] = {
+	"vcc50_hdmi"
+};
+
+static int rk3288_hdmi_probe(struct udevice *dev)
+{
+	/* Enable VOP clock for RK3288 */
+	rk3288_clk_config(dev);
+
+	/* Enable regulators required for HDMI */
+	rk_hdmi_probe_regulators(dev, rk3288_regulator_names,
+				 ARRAY_SIZE(rk3288_regulator_names));
+
+	return rk_hdmi_probe(dev);
+}
+
+static const struct dm_display_ops rk3288_hdmi_ops = {
+	.read_edid = rk_hdmi_read_edid,
+	.enable = rk3288_hdmi_enable,
+};
+
+static const struct udevice_id rk3288_hdmi_ids[] = {
+	{ .compatible = "rockchip,rk3288-dw-hdmi" },
+	{ }
+};
+
+U_BOOT_DRIVER(rk3288_hdmi_rockchip) = {
+	.name = "rk3288_hdmi_rockchip",
+	.id = UCLASS_DISPLAY,
+	.of_match = rk3288_hdmi_ids,
+	.ops = &rk3288_hdmi_ops,
+	.ofdata_to_platdata = rk3288_hdmi_ofdata_to_platdata,
+	.probe = rk3288_hdmi_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_hdmi_priv),
+};
diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c
index 2af4995..25f84a7 100644
--- a/drivers/video/rockchip/rk_hdmi.c
+++ b/drivers/video/rockchip/rk_hdmi.c
@@ -1,4 +1,5 @@
 /*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
  * Copyright (c) 2015 Google, Inc
  * Copyright 2014 Rockchip Inc.
  *
@@ -16,13 +17,9 @@
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3288.h>
-#include <power/regulator.h>
-
-struct rk_hdmi_priv {
-	struct dw_hdmi hdmi;
-	struct rk3288_grf *grf;
-};
+#include <asm/arch/hardware.h>
+#include "rk_hdmi.h"
+#include "rk_vop.h" /* for rk_vop_probe_regulators */
 
 static const struct hdmi_phy_config rockchip_phy_config[] = {
 	{
@@ -74,22 +71,14 @@ static const struct hdmi_mpll_config rockchip_mpll_cfg[] = {
 	}
 };
 
-static int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size)
+int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size)
 {
 	struct rk_hdmi_priv *priv = dev_get_priv(dev);
 
 	return dw_hdmi_read_edid(&priv->hdmi, buf, buf_size);
 }
 
-static int rk_hdmi_enable(struct udevice *dev, int panel_bpp,
-			  const struct display_timing *edid)
-{
-	struct rk_hdmi_priv *priv = dev_get_priv(dev);
-
-	return dw_hdmi_enable(&priv->hdmi, edid);
-}
-
-static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
+int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk_hdmi_priv *priv = dev_get_priv(dev);
 	struct dw_hdmi *hdmi = &priv->hdmi;
@@ -97,15 +86,9 @@ static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
 	hdmi->ioaddr = (ulong)dev_get_addr(dev);
 	hdmi->mpll_cfg = rockchip_mpll_cfg;
 	hdmi->phy_cfg = rockchip_phy_config;
-	hdmi->i2c_clk_high = 0x7a;
-	hdmi->i2c_clk_low = 0x8d;
-
-	/*
-	 * TODO(sjg at chromium.org): The above values don't work - these ones
-	 * work better, but generate lots of errors in the data.
-	 */
-	hdmi->i2c_clk_high = 0x0d;
-	hdmi->i2c_clk_low = 0x0d;
+
+	/* hdmi->i2c_clk_{high,low} are set up by the SoC driver */
+
 	hdmi->reg_io_width = 4;
 	hdmi->phy_set = dw_hdmi_phy_cfg;
 
@@ -114,53 +97,17 @@ static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int rk_hdmi_probe(struct udevice *dev)
+void rk_hdmi_probe_regulators(struct udevice *dev,
+			      const char * const *names, int cnt)
+{
+	rk_vop_probe_regulators(dev, names, cnt);
+}
+
+int rk_hdmi_probe(struct udevice *dev)
 {
-	struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
 	struct rk_hdmi_priv *priv = dev_get_priv(dev);
 	struct dw_hdmi *hdmi = &priv->hdmi;
-	struct udevice *reg;
-	struct clk clk;
 	int ret;
-	int vop_id = uc_plat->source_id;
-
-	ret = clk_get_by_index(dev, 0, &clk);
-	if (ret >= 0) {
-		ret = clk_set_rate(&clk, 0);
-		clk_free(&clk);
-	}
-	if (ret) {
-		debug("%s: Failed to set hdmi clock: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	/*
-	 * Configure the maximum clock to permit whatever resolution the
-	 * monitor wants
-	 */
-	ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
-	if (ret >= 0) {
-		ret = clk_set_rate(&clk, 384000000);
-		clk_free(&clk);
-	}
-	if (ret < 0) {
-		debug("%s: Failed to set clock in source device '%s': ret=%d\n",
-		      __func__, uc_plat->src_dev->name, ret);
-		return ret;
-	}
-
-	ret = regulator_get_by_platname("vcc50_hdmi", &reg);
-	if (!ret)
-		ret = regulator_set_enable(reg, true);
-	if (ret)
-		debug("%s: Cannot set regulator vcc50_hdmi\n", __func__);
-
-	/* hdmi source select hdmi controller */
-	rk_setreg(&priv->grf->soc_con6, 1 << 15);
-
-	/* hdmi data from vop id */
-	rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
-		     (vop_id == 1) ? (1 << 4) : 0);
 
 	ret = dw_hdmi_phy_wait_for_hpd(hdmi);
 	if (ret < 0) {
@@ -173,23 +120,3 @@ static int rk_hdmi_probe(struct udevice *dev)
 
 	return 0;
 }
-
-static const struct dm_display_ops rk_hdmi_ops = {
-	.read_edid = rk_hdmi_read_edid,
-	.enable = rk_hdmi_enable,
-};
-
-static const struct udevice_id rk_hdmi_ids[] = {
-	{ .compatible = "rockchip,rk3288-dw-hdmi" },
-	{ }
-};
-
-U_BOOT_DRIVER(hdmi_rockchip) = {
-	.name	= "hdmi_rockchip",
-	.id	= UCLASS_DISPLAY,
-	.of_match = rk_hdmi_ids,
-	.ops	= &rk_hdmi_ops,
-	.ofdata_to_platdata	= rk_hdmi_ofdata_to_platdata,
-	.probe	= rk_hdmi_probe,
-	.priv_auto_alloc_size	 = sizeof(struct rk_hdmi_priv),
-};
diff --git a/drivers/video/rockchip/rk_hdmi.h b/drivers/video/rockchip/rk_hdmi.h
new file mode 100644
index 0000000..501ed3a
--- /dev/null
+++ b/drivers/video/rockchip/rk_hdmi.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __RK_HDMI_H__
+#define __RK_HDMI_H__
+
+struct rkhdmi_driverdata {
+	/* configuration */
+	u8 i2c_clk_high;
+	u8 i2c_clk_low;
+	const char * const *regulator_names;
+	u32 regulator_names_cnt;
+	/* setters/getters */
+	int (*set_input_vop)(struct udevice *dev);
+	int (*clk_config)(struct udevice *dev);
+};
+
+struct rk_hdmi_priv {
+	struct dw_hdmi hdmi;
+	void *grf;
+};
+
+int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size);
+void rk_hdmi_probe_regulators(struct udevice *dev,
+			      const char * const *names, int cnt);
+int rk_hdmi_ofdata_to_platdata(struct udevice *dev);
+int rk_hdmi_probe(struct udevice *dev);
+
+#endif
-- 
1.9.1

[U-Boot] [PATCH v4 7/9] rockchip: video: rk3399: add HDMI TX support on the RK3399

[Philipp Tomsich]

This commit enables the RK3399 HDMI TX, which is very similar to the
one found on the RK3288.  As requested by Simon, this splits the HDMI
driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and
a common portion (rk_hdmi.c).

Note that the I2C communication for reading the EDID works well with
the default settings, but does not with the alternate settings used on
the RK3288... this configuration aspect is reflected by the driverdata
for the RK3399 driver.

Having some sort of DTS-based configuration for the regulator
dependencies would be nice for the future, but for now we simply use
lists of regulator names (also via driverdata) that we probe.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
---

Changes in v4:
- splits the large change into smaller changes

Changes in v3:
- split into separate drivers for the SOC-specific portion of the driver
- rebase to sjg/next

Changes in v2:
- removed DEBUG from the patch (as was done in our production branches,
  but missing from the patch-prep branch)
- updated SJG's comment (with a TODO for the RK3288) to reflect the
  new code structure


---
 arch/arm/include/asm/arch-rockchip/grf_rk3399.h |  3 +
 drivers/video/rockchip/Makefile                 |  1 +
 drivers/video/rockchip/rk3399_hdmi.c            | 81 +++++++++++++++++++++++++
 3 files changed, 85 insertions(+)
 create mode 100644 drivers/video/rockchip/rk3399_hdmi.c

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index eda9956..8d21eb7 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -534,6 +534,9 @@ enum {
 	GRF_DSI0_VOP_SEL_MASK   = 1 << GRF_DSI0_VOP_SEL_SHIFT,
 	GRF_DSI0_VOP_SEL_B      = 0,
 	GRF_DSI0_VOP_SEL_L      = 1,
+	GRF_RK3399_HDMI_VOP_SEL_MASK = 1 << 6,
+	GRF_RK3399_HDMI_VOP_SEL_B = 0 << 6,
+	GRF_RK3399_HDMI_VOP_SEL_L = 1 << 6,
 
 	/* GRF_SOC_CON22 */
 	GRF_DPHY_TX0_RXMODE_SHIFT = 0,
diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
index 65d0ed6..872dc0f 100644
--- a/drivers/video/rockchip/Makefile
+++ b/drivers/video/rockchip/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
 obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o
+obj-hdmi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_hdmi.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y)
 obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o
 endif
diff --git a/drivers/video/rockchip/rk3399_hdmi.c b/drivers/video/rockchip/rk3399_hdmi.c
new file mode 100644
index 0000000..b1e5097
--- /dev/null
+++ b/drivers/video/rockchip/rk3399_hdmi.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <display.h>
+#include <dm.h>
+#include <dw_hdmi.h>
+#include <edid.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3399.h>
+#include <power/regulator.h>
+#include "rk_hdmi.h"
+
+static int rk3399_hdmi_enable(struct udevice *dev, int panel_bpp,
+			      const struct display_timing *edid)
+{
+	struct rk_hdmi_priv *priv = dev_get_priv(dev);
+	struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
+	int vop_id = uc_plat->source_id;
+	struct rk3399_grf_regs *grf = priv->grf;
+
+	/* select the hdmi encoder input data from our source_id */
+	rk_clrsetreg(&grf->soc_con20, GRF_RK3399_HDMI_VOP_SEL_MASK,
+		     (vop_id == 1) ? GRF_RK3399_HDMI_VOP_SEL_L : 0);
+
+	return dw_hdmi_enable(&priv->hdmi, edid);
+}
+
+static int rk3399_hdmi_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk_hdmi_priv *priv = dev_get_priv(dev);
+	struct dw_hdmi *hdmi = &priv->hdmi;
+
+	hdmi->i2c_clk_high = 0x7a;
+	hdmi->i2c_clk_low = 0x8d;
+
+	return rk_hdmi_ofdata_to_platdata(dev);
+}
+
+static const char * const rk3399_regulator_names[] = {
+	"vcc1v8_hdmi",
+	"vcc0v9_hdmi"
+};
+
+static int rk3399_hdmi_probe(struct udevice *dev)
+{
+	/* Enable regulators required for HDMI */
+	rk_hdmi_probe_regulators(dev, rk3399_regulator_names,
+				 ARRAY_SIZE(rk3399_regulator_names));
+
+	return rk_hdmi_probe(dev);
+}
+
+static const struct dm_display_ops rk3399_hdmi_ops = {
+	.read_edid = rk_hdmi_read_edid,
+	.enable = rk3399_hdmi_enable,
+};
+
+static const struct udevice_id rk3399_hdmi_ids[] = {
+	{ .compatible = "rockchip,rk3399-dw-hdmi" },
+	{ }
+};
+
+U_BOOT_DRIVER(rk3399_hdmi_rockchip) = {
+	.name = "rk3399_hdmi_rockchip",
+	.id = UCLASS_DISPLAY,
+	.of_match = rk3399_hdmi_ids,
+	.ops = &rk3399_hdmi_ops,
+	.ofdata_to_platdata = rk3399_hdmi_ofdata_to_platdata,
+	.probe = rk3399_hdmi_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_hdmi_priv),
+};
-- 
1.9.1

[U-Boot] [PATCH v4 8/9] rockchip: dts: rk3399: enable HDMI output in the DTS

[Philipp Tomsich]

This commit enables HDMI output in the DTS by adding the necessary
nodes to vopl/vopb and by adding the HDMI node.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/dts/rk3399.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index f3d3f53..7f1fc50 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1419,6 +1419,11 @@
 				reg = <3>;
 				remote-endpoint = <&mipi_in_vopl>;
 			};
+
+			vopl_out_hdmi: endpoint at 1 {
+				reg = <1>;
+				remote-endpoint = <&hdmi_in_vopl>;
+			};
 		};
 	};
 
@@ -1440,6 +1445,40 @@
 				reg = <3>;
 				remote-endpoint = <&mipi_in_vopb>;
 			};
+
+			vopb_out_hdmi: endpoint at 1 {
+				reg = <1>;
+				remote-endpoint = <&hdmi_in_vopb>;
+			};
+		};
+	};
+
+	hdmi: hdmi at ff940000 {
+		compatible = "rockchip,rk3399-dw-hdmi";
+		reg = <0x0 0xff940000 0x0 0x20000>;
+		reg-io-width = <4>;
+		rockchip,grf = <&grf>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmi_i2c_xfer>;
+		power-domains = <&power RK3399_PD_HDCP>;
+		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru PLL_VPLL>, <&cru PCLK_VIO_GRF>;
+		clock-names = "iahb", "isfr", "vpll", "grf";
+		status = "disabled";
+
+		ports {
+			hdmi_in: port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				hdmi_in_vopb: endpoint at 0 {
+					reg = <0>;
+					remote-endpoint = <&vopb_out_hdmi>;
+				};
+				hdmi_in_vopl: endpoint at 1 {
+					reg = <1>;
+					remote-endpoint = <&vopl_out_hdmi>;
+				};
+			};
 		};
 	};
 
-- 
1.9.1

[U-Boot] [PATCH v4 9/9] rockchip: board: puma_rk3399: enable BMP_16BPP, BMP_24BPP and BMP_32BPP

[Philipp Tomsich]

With video output support for the RK3399-Q7 (Puma) available, we want
CMD_BMP enabled and the support for 16bit, 24bit and 32bit BMPs
defined.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 2
- enable SYS_WHITE_ON_BLACK via defconfig

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 include/configs/puma_rk3399.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index ece8bba..af1dae8 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -26,4 +26,8 @@
 #define CONFIG_SERIAL_TAG
 #define CONFIG_ENV_OVERWRITE
 
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+
 #endif
-- 
1.9.1

[U-Boot] [PATCH v4 1/9] rockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIP

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
>
> For consistency sake (and as we are about to add new options to this
> file), reformat the help for VIDEO_ROCKCHIP.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> ---
>
> Changes in v4:
> - added to break down into smaller changes
>
> Changes in v3: None
> Changes in v2: None
>
>  drivers/video/rockchip/Kconfig | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v4 2/9] rockchip: video: Kconfig: set MAX_XRES and MAX_YRES via Kconfig

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> This introduces two new Kconfig options that configure the maximum
> allowable framebuffer size (i.e. the memory reservation/allocation for
> the framebuffer):
>  - VIDEO_ROCKCHIP_MAX_XRES
>  - VIDEO_ROCKCHIP_MAX_YRES
> The resulting memory allocation will cover 4 byte per pixel for these
> resolutions.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> ---
>
> Changes in v4:
> - added to break down into smaller changes
>
> Changes in v3: None
> Changes in v2: None
>
>  drivers/video/rockchip/Kconfig  | 18 ++++++++++++++++++
>  drivers/video/rockchip/rk_vop.c |  3 ++-
>  2 files changed, 20 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v4 3/9] rockchip: video: refactor rk_vop and split RK3328-specific code off

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> To prepare for adding the RK3399 VOP driver (which shares most of its
> registers and config logic with the RK3228 VOP), this change refactors
> the driver and splits the RK3288-specific driver off.
>
> The changes in detail are:
> - introduces a data-structure for chip-specific drivers to register
>   features/callbacks with the common driver: at this time, this is
>   limited to a callback for setting the pin polarities (between the
>   VOP and the encoder modules) and a flag to signal 10bit RGB
>   capability
> - refactors the probing of regulators into a helper function that
>   can take a list of regulator names to probe and autoset
> - moves the priv data-structure into a (common) header file to be
>   used by the chip-specific drivers to provide base addresses to
>   the common driver
> - uses a callback into the chip-specific driver to set pin polarities
>   (replacing the direct register accesses previously used)
> - splits enabling the output (towards an encoder) into a separate
>   help function withint the common driver
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> ---
>
> Changes in v4:
> - added to break down into smaller changes
>
> Changes in v3: None
> Changes in v2: None
>
>  arch/arm/include/asm/arch-rockchip/vop_rk3288.h |   1 +
>  drivers/video/rockchip/Makefile                 |   1 +
>  drivers/video/rockchip/rk3288_vop.c             |  95 +++++++++++++
>  drivers/video/rockchip/rk_vop.c                 | 182 ++++++++++++------------
>  drivers/video/rockchip/rk_vop.h                 |  32 +++++
>  5 files changed, 217 insertions(+), 94 deletions(-)
>  create mode 100644 drivers/video/rockchip/rk3288_vop.c
>  create mode 100644 drivers/video/rockchip/rk_vop.h

Reviewed-by: Simon Glass <sjg@chromium.org>

But please comment the functions in the header files:

> +
> +int rk_vop_probe(struct udevice *dev);
> +int rk_vop_bind(struct udevice *dev);
> +void rk_vop_probe_regulators(struct udevice *dev,
> +                            const char * const *names, int cnt);
> +
> +#endif
> --
> 1.9.1
>

[U-Boot] [PATCH v4 4/9] rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> This commit adds a driver for the RK3399 VOPs capable and all the
> necessary plumbing to feed the HDMI encoder. For the VOP-big, this
> correctly tracks the ability to feed 10bit RGB data to the encoder.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> ---
>
> Changes in v4:
> - split the massive "refactor, split and add RK3399 support"-change into
>   smaller chunks that are more easily digestible
>
> Changes in v3:
> - splits the VOP driver into SOC-specific and common portions
> - moves the "maximum x" and "maximum y" resolution config into Kconfig (instead
>   of having hard-coded values that may need to be revised each time someone adds
>   a new device or new features)
>
> Changes in v2: None
>
>  arch/arm/include/asm/arch-rockchip/vop_rk3288.h |  10 +++
>  drivers/video/rockchip/Makefile                 |   1 +
>  drivers/video/rockchip/rk3399_vop.c             | 105 ++++++++++++++++++++++++
>  3 files changed, 116 insertions(+)
>  create mode 100644 drivers/video/rockchip/rk3399_vop.c

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v4 5/9] rockchip: video: add mpixelclock settings from Linux driver

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> The Linux driver now supports higher mpixelclock settings.
> Add these to rockchip_phy_config[] and rockchip_mpll_cfg[].
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> ---
>
> Changes in v4:
> - new patch (split off from the earlier RK3399 HDMI encoder change)
>
> Changes in v3: None
> Changes in v2: None
>
>  drivers/video/rockchip/rk_hdmi.c | 9 +++++++++
>  1 file changed, 9 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v4 6/9] rockchip: video: split RK3228-specific part off from rk_hdmi

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> To prepare for the addition of RK3399 HDMI support, the HDMI driver is
> refactored and broken into a chip-specific and a generic part.  This
> change adds the internal interfaces, makes common/reusable functions
> externally visible and splits the RK3228 driver into a separate file.
>
> For the probing of regulators, we reuse the infrastructure created
> during the VOP refactoring... i.e. we simply call into the helper
> function defined for the VOP.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> Version-changes: 4
> - add this path (as part of breaking up the large HDMI change for the RK3399)
>
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
>  drivers/video/rockchip/Makefile      |   3 +-
>  drivers/video/rockchip/rk3288_hdmi.c | 116 +++++++++++++++++++++++++++++++++++
>  drivers/video/rockchip/rk_hdmi.c     | 105 +++++--------------------------
>  drivers/video/rockchip/rk_hdmi.h     |  32 ++++++++++
>  4 files changed, 166 insertions(+), 90 deletions(-)
>  create mode 100644 drivers/video/rockchip/rk3288_hdmi.c
>  create mode 100644 drivers/video/rockchip/rk_hdmi.h
>

Reviewed-by: Simon Glass <sjg@chromium.org>

Again please comment the header-file functions:

> +int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size);
> +void rk_hdmi_probe_regulators(struct udevice *dev,
> +                             const char * const *names, int cnt);
> +int rk_hdmi_ofdata_to_platdata(struct udevice *dev);
> +int rk_hdmi_probe(struct udevice *dev);
> +
> +#endif
> --
> 1.9.1
>

[U-Boot] [PATCH v4 7/9] rockchip: video: rk3399: add HDMI TX support on the RK3399

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> This commit enables the RK3399 HDMI TX, which is very similar to the
> one found on the RK3288.  As requested by Simon, this splits the HDMI
> driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and
> a common portion (rk_hdmi.c).
>
> Note that the I2C communication for reading the EDID works well with
> the default settings, but does not with the alternate settings used on
> the RK3288... this configuration aspect is reflected by the driverdata
> for the RK3399 driver.
>
> Having some sort of DTS-based configuration for the regulator
> dependencies would be nice for the future, but for now we simply use
> lists of regulator names (also via driverdata) that we probe.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
>
> Changes in v4:
> - splits the large change into smaller changes
>
> Changes in v3:
> - split into separate drivers for the SOC-specific portion of the driver
> - rebase to sjg/next
>
> Changes in v2:
> - removed DEBUG from the patch (as was done in our production branches,
>   but missing from the patch-prep branch)
> - updated SJG's comment (with a TODO for the RK3288) to reflect the
>   new code structure
>
>
> ---
>  arch/arm/include/asm/arch-rockchip/grf_rk3399.h |  3 +
>  drivers/video/rockchip/Makefile                 |  1 +
>  drivers/video/rockchip/rk3399_hdmi.c            | 81 +++++++++++++++++++++++++
>  3 files changed, 85 insertions(+)
>  create mode 100644 drivers/video/rockchip/rk3399_hdmi.c
>

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v4 8/9] rockchip: dts: rk3399: enable HDMI output in the DTS

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> This commit enables HDMI output in the DTS by adding the necessary
> nodes to vopl/vopb and by adding the HDMI node.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
>  arch/arm/dts/rk3399.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 39 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v4 9/9] rockchip: board: puma_rk3399: enable BMP_16BPP, BMP_24BPP and BMP_32BPP

[Simon Glass]

On 31 May 2017 at 09:59, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> With video output support for the RK3399-Q7 (Puma) available, we want
> CMD_BMP enabled and the support for 16bit, 24bit and 32bit BMPs
> defined.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> Version-changes: 2
> - enable SYS_WHITE_ON_BLACK via defconfig
>
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
>  include/configs/puma_rk3399.h | 4 ++++
>  1 file changed, 4 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v4 3/9] rockchip: video: refactor rk_vop and split RK3328-specific code off

[Eric]

headline  is wrong. it  should be  "rockchip: video: refactor rk_vop and 
split RK3288-specific code off


On 2017年05月31日 23:59, Philipp Tomsich wrote:
> To prepare for adding the RK3399 VOP driver (which shares most of its
> registers and config logic with the RK3228 VOP), this change refactors
> the driver and splits the RK3288-specific driver off.
>
> The changes in detail are:
> - introduces a data-structure for chip-specific drivers to register
>    features/callbacks with the common driver: at this time, this is
>    limited to a callback for setting the pin polarities (between the
>    VOP and the encoder modules) and a flag to signal 10bit RGB
>    capability
> - refactors the probing of regulators into a helper function that
>    can take a list of regulator names to probe and autoset
> - moves the priv data-structure into a (common) header file to be
>    used by the chip-specific drivers to provide base addresses to
>    the common driver
> - uses a callback into the chip-specific driver to set pin polarities
>    (replacing the direct register accesses previously used)
> - splits enabling the output (towards an encoder) into a separate
>    help function withint the common driver
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> ---
>
> Changes in v4:
> - added to break down into smaller changes
>
> Changes in v3: None
> Changes in v2: None
>
>   arch/arm/include/asm/arch-rockchip/vop_rk3288.h |   1 +
>   drivers/video/rockchip/Makefile                 |   1 +
>   drivers/video/rockchip/rk3288_vop.c             |  95 +++++++++++++
>   drivers/video/rockchip/rk_vop.c                 | 182 ++++++++++++------------
>   drivers/video/rockchip/rk_vop.h                 |  32 +++++
>   5 files changed, 217 insertions(+), 94 deletions(-)
>   create mode 100644 drivers/video/rockchip/rk3288_vop.c
>   create mode 100644 drivers/video/rockchip/rk_vop.h
>
> diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
> index d5599ec..049f192 100644
> --- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
> +++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
> @@ -197,6 +197,7 @@ enum vop_modes {
>   #define V_DSP_DEN_POL(x)               (((x) & 1) << 6)
>   #define V_DSP_VSYNC_POL(x)             (((x) & 1) << 5)
>   #define V_DSP_HSYNC_POL(x)             (((x) & 1) << 4)
> +#define V_DSP_PIN_POL(x)               (((x) & 0xf) << 4)
>   #define V_DSP_OUT_MODE(x)              ((x) & 0xf)
>   
>   /* VOP_DSP_CTRL1 */
> diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
> index cd54b12..9477ad0 100644
> --- a/drivers/video/rockchip/Makefile
> +++ b/drivers/video/rockchip/Makefile
> @@ -7,6 +7,7 @@
>   
>   ifdef CONFIG_VIDEO_ROCKCHIP
>   obj-y += rk_vop.o
> +obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
>   obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
>   obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
>   obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o
> diff --git a/drivers/video/rockchip/rk3288_vop.c b/drivers/video/rockchip/rk3288_vop.c
> new file mode 100644
> index 0000000..e3e1ec7
> --- /dev/null
> +++ b/drivers/video/rockchip/rk3288_vop.c
> @@ -0,0 +1,95 @@
> +/*
> + * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
> + * Copyright (c) 2015 Google, Inc
> + * Copyright 2014 Rockchip Inc.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <display.h>
> +#include <dm.h>
> +#include <regmap.h>
> +#include <syscon.h>
> +#include <video.h>
> +#include <asm/hardware.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/grf_rk3288.h>
> +#include "rk_vop.h"
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static void rk3288_set_pin_polarity(struct udevice *dev,
> +				    enum vop_modes mode, u32 polarity)
> +{
> +	struct rk_vop_priv *priv = dev_get_priv(dev);
> +	struct rk3288_vop *regs = priv->regs;
> +
> +	/* The RK3328 VOP (v3.1) has its polarity configuration in ctrl0 */
> +	clrsetbits_le32(&regs->dsp_ctrl0,
> +			M_DSP_DCLK_POL | M_DSP_DEN_POL |
> +			M_DSP_VSYNC_POL | M_DSP_HSYNC_POL,
> +			V_DSP_PIN_POL(polarity));
> +}
> +
> +static void rk3288_set_io_vsel(struct udevice *dev)
> +{
> +	struct rk3288_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
> +
> +	/* lcdc(vop) iodomain select 1.8V */
> +	rk_setreg(&grf->io_vsel, 1 << 0);
> +}
> +
> +/*
> + * Try some common regulators. We should really get these from the
> + * device tree somehow.
> + */
> +static const char * const rk3288_regulator_names[] = {
> +	"vcc18_lcd",
> +	"VCC18_LCD",
> +	"vdd10_lcd_pwren_h",
> +	"vdd10_lcd",
> +	"VDD10_LCD",
> +	"vcc33_lcd"
> +};
> +
> +static int rk3288_vop_probe(struct udevice *dev)
> +{
> +	/* Before relocation we don't need to do anything */
> +	if (!(gd->flags & GD_FLG_RELOC))
> +		return 0;
> +
> +	/* Set the LCDC(vop) iodomain to 1.8V */
> +	rk3288_set_io_vsel(dev);
> +
> +	/* Probe regulators required for the RK3288 VOP */
> +	rk_vop_probe_regulators(dev, rk3288_regulator_names,
> +				ARRAY_SIZE(rk3288_regulator_names));
> +
> +	return rk_vop_probe(dev);
> +}
> +
> +struct rkvop_driverdata rk3288_driverdata = {
> +	.features = VOP_FEATURE_OUTPUT_10BIT,
> +	.set_pin_polarity = rk3288_set_pin_polarity,
> +};
> +
> +static const struct udevice_id rk3288_vop_ids[] = {
> +	{ .compatible = "rockchip,rk3288-vop",
> +	  .data = (ulong)&rk3288_driverdata },
> +	{ }
> +};
> +
> +static const struct video_ops rk3288_vop_ops = {
> +};
> +
> +U_BOOT_DRIVER(rk_vop) = {
> +	.name	= "rk3288_vop",
> +	.id	= UCLASS_VIDEO,
> +	.of_match = rk3288_vop_ids,
> +	.ops	= &rk3288_vop_ops,
> +	.bind	= rk_vop_bind,
> +	.probe	= rk3288_vop_probe,
> +	.priv_auto_alloc_size	= sizeof(struct rk_vop_priv),
> +};
> diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
> index 16d1484..c15f93d 100644
> --- a/drivers/video/rockchip/rk_vop.c
> +++ b/drivers/video/rockchip/rk_vop.c
> @@ -17,24 +17,25 @@
>   #include <asm/hardware.h>
>   #include <asm/io.h>
>   #include <asm/arch/clock.h>
> -#include <asm/arch/cru_rk3288.h>
> -#include <asm/arch/grf_rk3288.h>
>   #include <asm/arch/edp_rk3288.h>
>   #include <asm/arch/vop_rk3288.h>
>   #include <dm/device-internal.h>
>   #include <dm/uclass-internal.h>
> -#include <dt-bindings/clock/rk3288-cru.h>
>   #include <power/regulator.h>
> +#include "rk_vop.h"
>   
>   DECLARE_GLOBAL_DATA_PTR;
>   
> -struct rk_vop_priv {
> -	struct rk3288_vop *regs;
> -	struct rk3288_grf *grf;
> +enum vop_pol {
> +	HSYNC_POSITIVE = 0,
> +	VSYNC_POSITIVE = 1,
> +	DEN_NEGATIVE   = 2,
> +	DCLK_INVERT    = 3
>   };
>   
> -void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,
> -		  int fb_bits_per_pixel, const struct display_timing *edid)
> +static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,
> +			 int fb_bits_per_pixel,
> +			 const struct display_timing *edid)
>   {
>   	u32 lb_mode;
>   	u32 rgb_mode;
> @@ -89,54 +90,83 @@ void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,
>   	writel(0x01, &regs->reg_cfg_done); /* enable reg config */
>   }
>   
> -void rkvop_mode_set(struct rk3288_vop *regs,
> -		    const struct display_timing *edid, enum vop_modes mode)
> +static void rkvop_set_pin_polarity(struct udevice *dev,
> +				   enum vop_modes mode, u32 polarity)
>   {
> -	u32 hactive = edid->hactive.typ;
> -	u32 vactive = edid->vactive.typ;
> -	u32 hsync_len = edid->hsync_len.typ;
> -	u32 hback_porch = edid->hback_porch.typ;
> -	u32 vsync_len = edid->vsync_len.typ;
> -	u32 vback_porch = edid->vback_porch.typ;
> -	u32 hfront_porch = edid->hfront_porch.typ;
> -	u32 vfront_porch = edid->vfront_porch.typ;
> -	uint flags;
> -	int mode_flags;
> +	struct rkvop_driverdata *ops =
> +		(struct rkvop_driverdata *)dev_get_driver_data(dev);
> +
> +	if (ops->set_pin_polarity)
> +		ops->set_pin_polarity(dev, mode, polarity);
> +}
> +
> +static void rkvop_enable_output(struct udevice *dev, enum vop_modes mode)
> +{
> +	struct rk_vop_priv *priv = dev_get_priv(dev);
> +	struct rk3288_vop *regs = priv->regs;
>   
>   	switch (mode) {
>   	case VOP_MODE_HDMI:
>   		clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
>   				V_HDMI_OUT_EN(1));
>   		break;
> +
>   	case VOP_MODE_EDP:
> -	default:
>   		clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
>   				V_EDP_OUT_EN(1));
>   		break;
> +
>   	case VOP_MODE_LVDS:
>   		clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
>   				V_RGB_OUT_EN(1));
>   		break;
> +
>   	case VOP_MODE_MIPI:
>   		clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
>   				V_MIPI_OUT_EN(1));
> -		 break;
> +		break;
> +
> +	default:
> +		debug("%s: unsupported output mode %x\n", __func__, mode);
>   	}
> +}
>   
> -	if (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)
> -		/* RGBaaa */
> -		mode_flags = 15;
> -	else
> -		/* RGB888 */
> -		mode_flags = 0;
> +static void rkvop_mode_set(struct udevice *dev,
> +			   const struct display_timing *edid,
> +			   enum vop_modes mode)
> +{
> +	struct rk_vop_priv *priv = dev_get_priv(dev);
> +	struct rk3288_vop *regs = priv->regs;
> +	struct rkvop_driverdata *data =
> +		(struct rkvop_driverdata *)dev_get_driver_data(dev);
>   
> -	flags = V_DSP_OUT_MODE(mode_flags) |
> -		V_DSP_HSYNC_POL(!!(edid->flags & DISPLAY_FLAGS_HSYNC_HIGH)) |
> -		V_DSP_VSYNC_POL(!!(edid->flags & DISPLAY_FLAGS_VSYNC_HIGH));
> +	u32 hactive = edid->hactive.typ;
> +	u32 vactive = edid->vactive.typ;
> +	u32 hsync_len = edid->hsync_len.typ;
> +	u32 hback_porch = edid->hback_porch.typ;
> +	u32 vsync_len = edid->vsync_len.typ;
> +	u32 vback_porch = edid->vback_porch.typ;
> +	u32 hfront_porch = edid->hfront_porch.typ;
> +	u32 vfront_porch = edid->vfront_porch.typ;
> +	int mode_flags;
> +	u32 pin_polarity;
> +
> +	pin_polarity = BIT(DCLK_INVERT);
> +	if (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH)
> +		pin_polarity |= BIT(HSYNC_POSITIVE);
> +	if (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH)
> +		pin_polarity |= BIT(VSYNC_POSITIVE);
> +
> +	rkvop_set_pin_polarity(dev, mode, pin_polarity);
> +	rkvop_enable_output(dev, mode);
>   
> -	clrsetbits_le32(&regs->dsp_ctrl0,
> -			M_DSP_OUT_MODE | M_DSP_VSYNC_POL | M_DSP_HSYNC_POL,
> -			flags);
> +	mode_flags = 0;  /* RGB888 */
> +	if ((data->features & VOP_FEATURE_OUTPUT_10BIT) &&
> +	    (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP))
> +		mode_flags = 15;  /* RGBaaa */
> +
> +	clrsetbits_le32(&regs->dsp_ctrl0, M_DSP_OUT_MODE,
> +			V_DSP_OUT_MODE(mode_flags));
>   
>   	writel(V_HSYNC(hsync_len) |
>   	       V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch),
> @@ -185,7 +215,7 @@ void rkvop_mode_set(struct rk3288_vop *regs,
>    *		node within the VOP's 'port' list.
>    * @return 0 if OK, -ve if something went wrong
>    */
> -int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
> +static int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
>   {
>   	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
>   	const void *blob = gd->fdt_blob;
> @@ -255,18 +285,18 @@ int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
>   	/* Set bitwidth for vop display according to vop mode */
>   	switch (vop_id) {
>   	case VOP_MODE_EDP:
> -	case VOP_MODE_HDMI:
>   	case VOP_MODE_LVDS:
>   		l2bpp = VIDEO_BPP16;
>   		break;
> +	case VOP_MODE_HDMI:
>   	case VOP_MODE_MIPI:
>   		l2bpp = VIDEO_BPP32;
>   		break;
>   	default:
>   		l2bpp = VIDEO_BPP16;
>   	}
> -	rkvop_mode_set(regs, &timing, vop_id);
>   
> +	rkvop_mode_set(dev, &timing, vop_id);
>   	rkvop_enable(regs, fbbase, 1 << l2bpp, &timing);
>   
>   	ret = display_enable(disp, 1 << l2bpp, &timing);
> @@ -281,53 +311,37 @@ int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
>   	return 0;
>   }
>   
> -static int rk_vop_probe(struct udevice *dev)
> +void rk_vop_probe_regulators(struct udevice *dev,
> +			     const char * const *names, int cnt)
> +{
> +	int i, ret;
> +	const char *name;
> +	struct udevice *reg;
> +
> +	for (i = 0; i < cnt; ++i) {
> +		name = names[i];
> +		debug("%s: probing regulator '%s'\n", dev->name, name);
> +
> +		ret = regulator_autoset_by_name(name, &reg);
> +		if (!ret)
> +			ret = regulator_set_enable(reg, true);
> +	}
> +}
> +
> +int rk_vop_probe(struct udevice *dev)
>   {
>   	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
>   	const void *blob = gd->fdt_blob;
>   	struct rk_vop_priv *priv = dev_get_priv(dev);
> -	struct udevice *reg;
> -	int ret, port, node;
> +	int ret = 0;
> +	int port, node;
>   
>   	/* Before relocation we don't need to do anything */
>   	if (!(gd->flags & GD_FLG_RELOC))
>   		return 0;
>   
> -	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
>   	priv->regs = (struct rk3288_vop *)dev_get_addr(dev);
>   
> -	/* lcdc(vop) iodomain select 1.8V */
> -	rk_setreg(&priv->grf->io_vsel, 1 << 0);
> -
> -	/*
> -	 * Try some common regulators. We should really get these from the
> -	 * device tree somehow.
> -	 */
> -	ret = regulator_autoset_by_name("vcc18_lcd", &reg);
> -	if (ret)
> -		debug("%s: Cannot autoset regulator vcc18_lcd\n", __func__);
> -	ret = regulator_autoset_by_name("VCC18_LCD", &reg);
> -	if (ret)
> -		debug("%s: Cannot autoset regulator VCC18_LCD\n", __func__);
> -	ret = regulator_autoset_by_name("vdd10_lcd_pwren_h", &reg);
> -	if (ret) {
> -		debug("%s: Cannot autoset regulator vdd10_lcd_pwren_h\n",
> -		      __func__);
> -	}
> -	ret = regulator_autoset_by_name("vdd10_lcd", &reg);
> -	if (ret) {
> -		debug("%s: Cannot autoset regulator vdd10_lcd\n",
> -		      __func__);
> -	}
> -	ret = regulator_autoset_by_name("VDD10_LCD", &reg);
> -	if (ret) {
> -		debug("%s: Cannot autoset regulator VDD10_LCD\n",
> -		      __func__);
> -	}
> -	ret = regulator_autoset_by_name("vcc33_lcd", &reg);
> -	if (ret)
> -		debug("%s: Cannot autoset regulator vcc33_lcd\n", __func__);
> -
>   	/*
>   	 * Try all the ports until we find one that works. In practice this
>   	 * tries EDP first if available, then HDMI.
> @@ -353,7 +367,7 @@ static int rk_vop_probe(struct udevice *dev)
>   	return ret;
>   }
>   
> -static int rk_vop_bind(struct udevice *dev)
> +int rk_vop_bind(struct udevice *dev)
>   {
>   	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
>   
> @@ -362,23 +376,3 @@ static int rk_vop_bind(struct udevice *dev)
>   
>   	return 0;
>   }
> -
> -static const struct video_ops rk_vop_ops = {
> -};
> -
> -static const struct udevice_id rk_vop_ids[] = {
> -	{ .compatible = "rockchip,rk3399-vop-big" },
> -	{ .compatible = "rockchip,rk3399-vop-lit" },
> -	{ .compatible = "rockchip,rk3288-vop" },
> -	{ }
> -};
> -
> -U_BOOT_DRIVER(rk_vop) = {
> -	.name	= "rk_vop",
> -	.id	= UCLASS_VIDEO,
> -	.of_match = rk_vop_ids,
> -	.ops	= &rk_vop_ops,
> -	.bind	= rk_vop_bind,
> -	.probe	= rk_vop_probe,
> -	.priv_auto_alloc_size	= sizeof(struct rk_vop_priv),
> -};
> diff --git a/drivers/video/rockchip/rk_vop.h b/drivers/video/rockchip/rk_vop.h
> new file mode 100644
> index 0000000..f65ac17
> --- /dev/null
> +++ b/drivers/video/rockchip/rk_vop.h
> @@ -0,0 +1,32 @@
> +/*
> + * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef __RK_VOP_H__
> +#define __RK_VOP_H__
> +
> +#include <asm/arch/vop_rk3288.h>
> +
> +struct rk_vop_priv {
> +	void *regs;
> +};
> +
> +enum vop_features {
> +	VOP_FEATURE_OUTPUT_10BIT = (1 << 0),
> +};
> +
> +struct rkvop_driverdata {
> +	/* configuration */
> +	u32 features;
> +	/* block-specific setters/getters */
> +	void (*set_pin_polarity)(struct udevice *, enum vop_modes, u32);
> +};
> +
> +int rk_vop_probe(struct udevice *dev);
> +int rk_vop_bind(struct udevice *dev);
> +void rk_vop_probe_regulators(struct udevice *dev,
> +			     const char * const *names, int cnt);
> +
> +#endif

[U-Boot] [PATCH v4 6/9] rockchip: video: split RK3228-specific part off from rk_hdmi

[Eric]

headline  is wrong. it  should be  "rockchip: video: 
splitRK3288-specific part off from rk_hdmi"


On 2017年05月31日 23:59, Philipp Tomsich wrote:
> To prepare for the addition of RK3399 HDMI support, the HDMI driver is
> refactored and broken into a chip-specific and a generic part.  This
> change adds the internal interfaces, makes common/reusable functions
> externally visible and splits the RK3228 driver into a separate file.
>
> For the probing of regulators, we reuse the infrastructure created
> during the VOP refactoring... i.e. we simply call into the helper
> function defined for the VOP.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> Version-changes: 4
> - add this path (as part of breaking up the large HDMI change for the RK3399)
>
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
>   drivers/video/rockchip/Makefile      |   3 +-
>   drivers/video/rockchip/rk3288_hdmi.c | 116 +++++++++++++++++++++++++++++++++++
>   drivers/video/rockchip/rk_hdmi.c     | 105 +++++--------------------------
>   drivers/video/rockchip/rk_hdmi.h     |  32 ++++++++++
>   4 files changed, 166 insertions(+), 90 deletions(-)
>   create mode 100644 drivers/video/rockchip/rk3288_hdmi.c
>   create mode 100644 drivers/video/rockchip/rk_hdmi.h
>
> diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
> index 495d5f7..65d0ed6 100644
> --- a/drivers/video/rockchip/Makefile
> +++ b/drivers/video/rockchip/Makefile
> @@ -11,6 +11,7 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
>   obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o
>   obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
>   obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
> -obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o
> +obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o
> +obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y)
>   obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o
>   endif
> diff --git a/drivers/video/rockchip/rk3288_hdmi.c b/drivers/video/rockchip/rk3288_hdmi.c
> new file mode 100644
> index 0000000..eae0dd2
> --- /dev/null
> +++ b/drivers/video/rockchip/rk3288_hdmi.c
> @@ -0,0 +1,116 @@
> +/*
> + * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <clk.h>
> +#include <display.h>
> +#include <dm.h>
> +#include <dw_hdmi.h>
> +#include <edid.h>
> +#include <regmap.h>
> +#include <syscon.h>
> +#include <asm/gpio.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/hardware.h>
> +#include <asm/arch/grf_rk3288.h>
> +#include <power/regulator.h>
> +#include "rk_hdmi.h"
> +
> +static int rk3288_hdmi_enable(struct udevice *dev, int panel_bpp,
> +			      const struct display_timing *edid)
> +{
> +	struct rk_hdmi_priv *priv = dev_get_priv(dev);
> +	struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
> +	int vop_id = uc_plat->source_id;
> +	struct rk3288_grf *grf = priv->grf;
> +
> +	/* hdmi source select hdmi controller */
> +	rk_setreg(&grf->soc_con6, 1 << 15);
> +
> +	/* hdmi data from vop id */
> +	rk_clrsetreg(&grf->soc_con6, 1 << 4, (vop_id == 1) ? (1 << 4) : 0);
> +
> +	return 0;
> +}
> +
> +static int rk3288_hdmi_ofdata_to_platdata(struct udevice *dev)
> +{
> +	struct rk_hdmi_priv *priv = dev_get_priv(dev);
> +	struct dw_hdmi *hdmi = &priv->hdmi;
> +
> +	hdmi->i2c_clk_high = 0x7a;
> +	hdmi->i2c_clk_low = 0x8d;
> +
> +	/*
> +	 * TODO(sjg at chromium.org): The above values don't work - these
> +	 * ones work better, but generate lots of errors in the data.
> +	 */
> +	hdmi->i2c_clk_high = 0x0d;
> +	hdmi->i2c_clk_low = 0x0d;
> +
> +	return rk_hdmi_ofdata_to_platdata(dev);
> +}
> +
> +static int rk3288_clk_config(struct udevice *dev)
> +{
> +	struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
> +	struct clk clk;
> +	int ret;
> +
> +	/*
> +	 * Configure the maximum clock to permit whatever resolution the
> +	 * monitor wants
> +	 */
> +	ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
> +	if (ret >= 0) {
> +		ret = clk_set_rate(&clk, 384000000);
> +		clk_free(&clk);
> +	}
> +	if (ret < 0) {
> +		debug("%s: Failed to set clock in source device '%s': ret=%d\n",
> +		      __func__, uc_plat->src_dev->name, ret);
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static const char * const rk3288_regulator_names[] = {
> +	"vcc50_hdmi"
> +};
> +
> +static int rk3288_hdmi_probe(struct udevice *dev)
> +{
> +	/* Enable VOP clock for RK3288 */
> +	rk3288_clk_config(dev);
> +
> +	/* Enable regulators required for HDMI */
> +	rk_hdmi_probe_regulators(dev, rk3288_regulator_names,
> +				 ARRAY_SIZE(rk3288_regulator_names));
> +
> +	return rk_hdmi_probe(dev);
> +}
> +
> +static const struct dm_display_ops rk3288_hdmi_ops = {
> +	.read_edid = rk_hdmi_read_edid,
> +	.enable = rk3288_hdmi_enable,
> +};
> +
> +static const struct udevice_id rk3288_hdmi_ids[] = {
> +	{ .compatible = "rockchip,rk3288-dw-hdmi" },
> +	{ }
> +};
> +
> +U_BOOT_DRIVER(rk3288_hdmi_rockchip) = {
> +	.name = "rk3288_hdmi_rockchip",
> +	.id = UCLASS_DISPLAY,
> +	.of_match = rk3288_hdmi_ids,
> +	.ops = &rk3288_hdmi_ops,
> +	.ofdata_to_platdata = rk3288_hdmi_ofdata_to_platdata,
> +	.probe = rk3288_hdmi_probe,
> +	.priv_auto_alloc_size = sizeof(struct rk_hdmi_priv),
> +};
> diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c
> index 2af4995..25f84a7 100644
> --- a/drivers/video/rockchip/rk_hdmi.c
> +++ b/drivers/video/rockchip/rk_hdmi.c
> @@ -1,4 +1,5 @@
>   /*
> + * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
>    * Copyright (c) 2015 Google, Inc
>    * Copyright 2014 Rockchip Inc.
>    *
> @@ -16,13 +17,9 @@
>   #include <asm/gpio.h>
>   #include <asm/io.h>
>   #include <asm/arch/clock.h>
> -#include <asm/arch/grf_rk3288.h>
> -#include <power/regulator.h>
> -
> -struct rk_hdmi_priv {
> -	struct dw_hdmi hdmi;
> -	struct rk3288_grf *grf;
> -};
> +#include <asm/arch/hardware.h>
> +#include "rk_hdmi.h"
> +#include "rk_vop.h" /* for rk_vop_probe_regulators */
>   
>   static const struct hdmi_phy_config rockchip_phy_config[] = {
>   	{
> @@ -74,22 +71,14 @@ static const struct hdmi_mpll_config rockchip_mpll_cfg[] = {
>   	}
>   };
>   
> -static int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size)
> +int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size)
>   {
>   	struct rk_hdmi_priv *priv = dev_get_priv(dev);
>   
>   	return dw_hdmi_read_edid(&priv->hdmi, buf, buf_size);
>   }
>   
> -static int rk_hdmi_enable(struct udevice *dev, int panel_bpp,
> -			  const struct display_timing *edid)
> -{
> -	struct rk_hdmi_priv *priv = dev_get_priv(dev);
> -
> -	return dw_hdmi_enable(&priv->hdmi, edid);
> -}
> -
> -static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
> +int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
>   {
>   	struct rk_hdmi_priv *priv = dev_get_priv(dev);
>   	struct dw_hdmi *hdmi = &priv->hdmi;
> @@ -97,15 +86,9 @@ static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
>   	hdmi->ioaddr = (ulong)dev_get_addr(dev);
>   	hdmi->mpll_cfg = rockchip_mpll_cfg;
>   	hdmi->phy_cfg = rockchip_phy_config;
> -	hdmi->i2c_clk_high = 0x7a;
> -	hdmi->i2c_clk_low = 0x8d;
> -
> -	/*
> -	 * TODO(sjg at chromium.org): The above values don't work - these ones
> -	 * work better, but generate lots of errors in the data.
> -	 */
> -	hdmi->i2c_clk_high = 0x0d;
> -	hdmi->i2c_clk_low = 0x0d;
> +
> +	/* hdmi->i2c_clk_{high,low} are set up by the SoC driver */
> +
>   	hdmi->reg_io_width = 4;
>   	hdmi->phy_set = dw_hdmi_phy_cfg;
>   
> @@ -114,53 +97,17 @@ static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
>   	return 0;
>   }
>   
> -static int rk_hdmi_probe(struct udevice *dev)
> +void rk_hdmi_probe_regulators(struct udevice *dev,
> +			      const char * const *names, int cnt)
> +{
> +	rk_vop_probe_regulators(dev, names, cnt);
> +}
> +
> +int rk_hdmi_probe(struct udevice *dev)
>   {
> -	struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
>   	struct rk_hdmi_priv *priv = dev_get_priv(dev);
>   	struct dw_hdmi *hdmi = &priv->hdmi;
> -	struct udevice *reg;
> -	struct clk clk;
>   	int ret;
> -	int vop_id = uc_plat->source_id;
> -
> -	ret = clk_get_by_index(dev, 0, &clk);
> -	if (ret >= 0) {
> -		ret = clk_set_rate(&clk, 0);
> -		clk_free(&clk);
> -	}
> -	if (ret) {
> -		debug("%s: Failed to set hdmi clock: ret=%d\n", __func__, ret);
> -		return ret;
> -	}
> -
> -	/*
> -	 * Configure the maximum clock to permit whatever resolution the
> -	 * monitor wants
> -	 */
> -	ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
> -	if (ret >= 0) {
> -		ret = clk_set_rate(&clk, 384000000);
> -		clk_free(&clk);
> -	}
> -	if (ret < 0) {
> -		debug("%s: Failed to set clock in source device '%s': ret=%d\n",
> -		      __func__, uc_plat->src_dev->name, ret);
> -		return ret;
> -	}
> -
> -	ret = regulator_get_by_platname("vcc50_hdmi", &reg);
> -	if (!ret)
> -		ret = regulator_set_enable(reg, true);
> -	if (ret)
> -		debug("%s: Cannot set regulator vcc50_hdmi\n", __func__);
> -
> -	/* hdmi source select hdmi controller */
> -	rk_setreg(&priv->grf->soc_con6, 1 << 15);
> -
> -	/* hdmi data from vop id */
> -	rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
> -		     (vop_id == 1) ? (1 << 4) : 0);
>   
>   	ret = dw_hdmi_phy_wait_for_hpd(hdmi);
>   	if (ret < 0) {
> @@ -173,23 +120,3 @@ static int rk_hdmi_probe(struct udevice *dev)
>   
>   	return 0;
>   }
> -
> -static const struct dm_display_ops rk_hdmi_ops = {
> -	.read_edid = rk_hdmi_read_edid,
> -	.enable = rk_hdmi_enable,
> -};
> -
> -static const struct udevice_id rk_hdmi_ids[] = {
> -	{ .compatible = "rockchip,rk3288-dw-hdmi" },
> -	{ }
> -};
> -
> -U_BOOT_DRIVER(hdmi_rockchip) = {
> -	.name	= "hdmi_rockchip",
> -	.id	= UCLASS_DISPLAY,
> -	.of_match = rk_hdmi_ids,
> -	.ops	= &rk_hdmi_ops,
> -	.ofdata_to_platdata	= rk_hdmi_ofdata_to_platdata,
> -	.probe	= rk_hdmi_probe,
> -	.priv_auto_alloc_size	 = sizeof(struct rk_hdmi_priv),
> -};
> diff --git a/drivers/video/rockchip/rk_hdmi.h b/drivers/video/rockchip/rk_hdmi.h
> new file mode 100644
> index 0000000..501ed3a
> --- /dev/null
> +++ b/drivers/video/rockchip/rk_hdmi.h
> @@ -0,0 +1,32 @@
> +/*
> + * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef __RK_HDMI_H__
> +#define __RK_HDMI_H__
> +
> +struct rkhdmi_driverdata {
> +	/* configuration */
> +	u8 i2c_clk_high;
> +	u8 i2c_clk_low;
> +	const char * const *regulator_names;
> +	u32 regulator_names_cnt;
> +	/* setters/getters */
> +	int (*set_input_vop)(struct udevice *dev);
> +	int (*clk_config)(struct udevice *dev);
> +};
> +
> +struct rk_hdmi_priv {
> +	struct dw_hdmi hdmi;
> +	void *grf;
> +};
> +
> +int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size);
> +void rk_hdmi_probe_regulators(struct udevice *dev,
> +			      const char * const *names, int cnt);
> +int rk_hdmi_ofdata_to_platdata(struct udevice *dev);
> +int rk_hdmi_probe(struct udevice *dev);
> +
> +#endif

[U-Boot] [PATCH v4 1/9] rockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIP

[Anatolij Gustschin]

Hi Philipp,

On Wed, 31 May 2017 17:59:28 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:

> For consistency sake (and as we are about to add new options to this
> file), reformat the help for VIDEO_ROCKCHIP.
> 
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> 
> ---
> 
> Changes in v4:
> - added to break down into smaller changes
> 
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/video/rockchip/Kconfig | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)

applied to u-boot-video/master, thanks!

--
Anatolij

[U-Boot] [PATCH v4 2/9] rockchip: video: Kconfig: set MAX_XRES and MAX_YRES via Kconfig

[Anatolij Gustschin]

On Wed, 31 May 2017 17:59:29 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:
...
> Changes in v4:
> - added to break down into smaller changes
> 
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/video/rockchip/Kconfig  | 18 ++++++++++++++++++
>  drivers/video/rockchip/rk_vop.c |  3 ++-
>  2 files changed, 20 insertions(+), 1 deletion(-)

applied to u-boot-video/master, thanks!

--
Anatolij

[U-Boot] [PATCH v4 3/9] rockchip: video: refactor rk_vop and split RK3328-specific code off

[Anatolij Gustschin]

On Wed, 31 May 2017 17:59:30 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:
...
> Changes in v4:
> - added to break down into smaller changes
> 
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/include/asm/arch-rockchip/vop_rk3288.h |   1 +
>  drivers/video/rockchip/Makefile                 |   1 +
>  drivers/video/rockchip/rk3288_vop.c             |  95 +++++++++++++
>  drivers/video/rockchip/rk_vop.c                 | 182 ++++++++++++------------
>  drivers/video/rockchip/rk_vop.h                 |  32 +++++
>  5 files changed, 217 insertions(+), 94 deletions(-)
>  create mode 100644 drivers/video/rockchip/rk3288_vop.c
>  create mode 100644 drivers/video/rockchip/rk_vop.h

Rebased on master and applied to u-boot-video/master (with
s/RK3328/RK3288/ in the subject. Thanks!

--
Anatolij

[U-Boot] [PATCH v4 4/9] rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399

[Anatolij Gustschin]

On Wed, 31 May 2017 17:59:31 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:
...
> Changes in v4:
> - split the massive "refactor, split and add RK3399 support"-change into
>   smaller chunks that are more easily digestible
> 
> Changes in v3:
> - splits the VOP driver into SOC-specific and common portions
> - moves the "maximum x" and "maximum y" resolution config into Kconfig (instead
>   of having hard-coded values that may need to be revised each time someone adds
>   a new device or new features)
> 
> Changes in v2: None
> 
>  arch/arm/include/asm/arch-rockchip/vop_rk3288.h |  10 +++
>  drivers/video/rockchip/Makefile                 |   1 +
>  drivers/video/rockchip/rk3399_vop.c             | 105 ++++++++++++++++++++++++
>  3 files changed, 116 insertions(+)
>  create mode 100644 drivers/video/rockchip/rk3399_vop.c

applied to u-boot-video/master, thanks!

--
Anatolij

[U-Boot] [PATCH v4 5/9] rockchip: video: add mpixelclock settings from Linux driver

[Anatolij Gustschin]

On Wed, 31 May 2017 17:59:32 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:
...
> Changes in v4:
> - new patch (split off from the earlier RK3399 HDMI encoder change)
> 
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/video/rockchip/rk_hdmi.c | 9 +++++++++
>  1 file changed, 9 insertions(+)

applied to u-boot-video/master, thanks!

--
Anatolij

[U-Boot] [PATCH v4 6/9] rockchip: video: split RK3228-specific part off from rk_hdmi

[Anatolij Gustschin]

On Wed, 31 May 2017 17:59:33 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:

> Version-changes: 4
> - add this path (as part of breaking up the large HDMI change for the RK3399)
> 
> ---
> 
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/video/rockchip/Makefile      |   3 +-
>  drivers/video/rockchip/rk3288_hdmi.c | 116 +++++++++++++++++++++++++++++++++++
>  drivers/video/rockchip/rk_hdmi.c     | 105 +++++--------------------------
>  drivers/video/rockchip/rk_hdmi.h     |  32 ++++++++++
>  4 files changed, 166 insertions(+), 90 deletions(-)
>  create mode 100644 drivers/video/rockchip/rk3288_hdmi.c
>  create mode 100644 drivers/video/rockchip/rk_hdmi.h

Rebased on master and applied to u-boot-video/master
(with s/RK3228/RK3288/ in commit message).

Please send a subsequent path adding comments for the header-file
functions, as Simon noted. Thanks!



--
Anatolij

[U-Boot] [PATCH v4 7/9] rockchip: video: rk3399: add HDMI TX support on the RK3399

[Anatolij Gustschin]

On Wed, 31 May 2017 17:59:34 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:
... 
> Changes in v4:
> - splits the large change into smaller changes
> 
> Changes in v3:
> - split into separate drivers for the SOC-specific portion of the driver
> - rebase to sjg/next
> 
> Changes in v2:
> - removed DEBUG from the patch (as was done in our production branches,
>   but missing from the patch-prep branch)
> - updated SJG's comment (with a TODO for the RK3288) to reflect the
>   new code structure
> 
> 
> ---
>  arch/arm/include/asm/arch-rockchip/grf_rk3399.h |  3 +
>  drivers/video/rockchip/Makefile                 |  1 +
>  drivers/video/rockchip/rk3399_hdmi.c            | 81 +++++++++++++++++++++++++
>  3 files changed, 85 insertions(+)
>  create mode 100644 drivers/video/rockchip/rk3399_hdmi.c

applied to u-boot-video/master, thanks!

--
Anatolij

[U-Boot] [PATCH v4 8/9] rockchip: dts: rk3399: enable HDMI output in the DTS

[Anatolij Gustschin]

On Wed, 31 May 2017 17:59:35 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:

> This commit enables HDMI output in the DTS by adding the necessary
> nodes to vopl/vopb and by adding the HDMI node.
> 
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> 
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/dts/rk3399.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 39 insertions(+)

applied to u-boot-video/master, thanks!

--
Anatolij

[U-Boot] [PATCH v4 9/9] rockchip: board: puma_rk3399: enable BMP_16BPP, BMP_24BPP and BMP_32BPP

[Anatolij Gustschin]

On Wed, 31 May 2017 17:59:36 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:
...
> diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
> index ece8bba..af1dae8 100644
> --- a/include/configs/puma_rk3399.h
> +++ b/include/configs/puma_rk3399.h
> @@ -26,4 +26,8 @@
>  #define CONFIG_SERIAL_TAG
>  #define CONFIG_ENV_OVERWRITE
>  
> +#define CONFIG_BMP_16BPP
> +#define CONFIG_BMP_24BPP
> +#define CONFIG_BMP_32BPP
> +
>  #endif

this one depends on committed changes in rockchip repo, I'll
apply this patch after u-boot-rockchip.git is merged to master.

--
Anatolij

[U-Boot] [PATCH v4 8/9] rockchip: dts: rk3399: enable HDMI output in the DTS

[Simon Glass]

Hi Anatolij,

On 2 June 2017 at 07:24, Anatolij Gustschin <agust@denx.de> wrote:
> On Wed, 31 May 2017 17:59:35 +0200
> Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:
>
>> This commit enables HDMI output in the DTS by adding the necessary
>> nodes to vopl/vopb and by adding the HDMI node.
>>
>> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>> ---
>>
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2: None
>>
>>  arch/arm/dts/rk3399.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 39 insertions(+)
>
> applied to u-boot-video/master, thanks!
>

I cannot see this patch there. Can you please point me to it? I'd like
to bring in some more patches but they depend on this series.

Regards,
Simon

[U-Boot] [PATCH v4 8/9] rockchip: dts: rk3399: enable HDMI output in the DTS

[Anatolij Gustschin]

Hi Simon,

On Wed, 7 Jun 2017 06:51:19 -0600
Simon Glass sjg at chromium.org wrote:
...
> I cannot see this patch there. Can you please point me to it? I'd like
> to bring in some more patches but they depend on this series.

it is here  http://patchwork.ozlabs.org/patch/769240/

I applied patches 1-8 here:

 http://git.denx.de/?p=u-boot/u-boot-video.git;a=shortlog;h=refs/heads/merge

But patch 9 depends on changes in u-boot-rockchip.git. I can rebase when
u-boot-rockchip.git is merged in u-boot.git/master and then also can add
patch 9. Or you can merge this series into u-boot-rockchip if it is easier.

Thanks,

Anatolij

[U-Boot] [PATCH v4 8/9] rockchip: dts: rk3399: enable HDMI output in the DTS

[Simon Glass]

Hi Anatolij,

On 7 June 2017 at 07:05, Anatolij Gustschin <agust@denx.de> wrote:
> Hi Simon,
>
> On Wed, 7 Jun 2017 06:51:19 -0600
> Simon Glass sjg at chromium.org wrote:
> ...
>> I cannot see this patch there. Can you please point me to it? I'd like
>> to bring in some more patches but they depend on this series.
>
> it is here  http://patchwork.ozlabs.org/patch/769240/
>
> I applied patches 1-8 here:
>
>  http://git.denx.de/?p=u-boot/u-boot-video.git;a=shortlog;h=refs/heads/merge
>
> But patch 9 depends on changes in u-boot-rockchip.git. I can rebase when
> u-boot-rockchip.git is merged in u-boot.git/master and then also can add
> patch 9. Or you can merge this series into u-boot-rockchip if it is easier.

OK I will go ahead and merge them again to rockchip since I have other
patches that rely on these. This is getting tricky!

Regards,
Simon

[U-Boot] [PATCH v4 9/9] rockchip: board: puma_rk3399: enable BMP_16BPP, BMP_24BPP and BMP_32BPP

[sjg at google.com]

On Wed, 31 May 2017 17:59:36 +0200
Philipp Tomsich philipp.tomsich at theobroma-systems.com wrote:
...
Applied to u-boot-rockchip, thanks!

[U-Boot] [PATCH v4 8/9] rockchip: dts: rk3399: enable HDMI output in the DTS

[Anatolij Gustschin]

Hi Simon,

On Wed, 7 Jun 2017 21:30:15 -0600
Simon Glass sjg at chromium.org wrote:
...
> > But patch 9 depends on changes in u-boot-rockchip.git. I can rebase when
> > u-boot-rockchip.git is merged in u-boot.git/master and then also can add
> > patch 9. Or you can merge this series into u-boot-rockchip if it is easier.  
> 
> OK I will go ahead and merge them again to rockchip since I have other
> patches that rely on these. This is getting tricky!

OK, thanks!

--
Anatolij