* [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family
@ 2017-05-15 7:50 ` Linus Walleij
0 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2017-05-15 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-arm-msm, Andy Gross, Bjorn Andersson
Cc: Stephen Boyd, Linus Walleij
This defines the memory location and interrupt used by the GSBI8
I2C adapter on the MSM8660 SoCs. We add it as "disabled" by
default so that boards using this I2C can enable it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/qcom-msm8660.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 747669a62aa8..a53c0f9970bd 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -107,6 +107,31 @@
reg = <0x900000 0x4000>;
};
+
+ gsbi8: gsbi@19800000 {
+ compatible = "qcom,gsbi-v1.0.0";
+ cell-index = <12>;
+ reg = <0x19800000 0x100>;
+ clocks = <&gcc GSBI8_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ syscon-tcsr = <&tcsr>;
+
+ gsbi8_i2c: i2c@19880000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ reg = <0x19880000 0x1000>;
+ interrupts = <0 161 IRQ_TYPE_NONE>;
+ clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>;
+ clock-names = "core", "iface";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
+
gsbi12: gsbi@19c00000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <12>;
--
2.9.3
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family
@ 2017-05-15 7:50 ` Linus Walleij
0 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2017-05-15 7:50 UTC (permalink / raw)
To: linux-arm-kernel
This defines the memory location and interrupt used by the GSBI8
I2C adapter on the MSM8660 SoCs. We add it as "disabled" by
default so that boards using this I2C can enable it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/qcom-msm8660.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 747669a62aa8..a53c0f9970bd 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -107,6 +107,31 @@
reg = <0x900000 0x4000>;
};
+
+ gsbi8: gsbi at 19800000 {
+ compatible = "qcom,gsbi-v1.0.0";
+ cell-index = <12>;
+ reg = <0x19800000 0x100>;
+ clocks = <&gcc GSBI8_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ syscon-tcsr = <&tcsr>;
+
+ gsbi8_i2c: i2c at 19880000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ reg = <0x19880000 0x1000>;
+ interrupts = <0 161 IRQ_TYPE_NONE>;
+ clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>;
+ clock-names = "core", "iface";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
+
gsbi12: gsbi at 19c00000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <12>;
--
2.9.3
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family
2017-05-15 7:50 ` Linus Walleij
@ 2017-05-24 22:19 ` Bjorn Andersson
-1 siblings, 0 replies; 8+ messages in thread
From: Bjorn Andersson @ 2017-05-24 22:19 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-arm-kernel, linux-arm-msm, Andy Gross, Stephen Boyd
On Mon 15 May 00:50 PDT 2017, Linus Walleij wrote:
> This defines the memory location and interrupt used by the GSBI8
> I2C adapter on the MSM8660 SoCs. We add it as "disabled" by
> default so that boards using this I2C can enable it.
>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family
@ 2017-05-24 22:19 ` Bjorn Andersson
0 siblings, 0 replies; 8+ messages in thread
From: Bjorn Andersson @ 2017-05-24 22:19 UTC (permalink / raw)
To: linux-arm-kernel
On Mon 15 May 00:50 PDT 2017, Linus Walleij wrote:
> This defines the memory location and interrupt used by the GSBI8
> I2C adapter on the MSM8660 SoCs. We add it as "disabled" by
> default so that boards using this I2C can enable it.
>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family
2017-05-15 7:50 ` Linus Walleij
@ 2017-06-02 22:02 ` Stephen Boyd
-1 siblings, 0 replies; 8+ messages in thread
From: Stephen Boyd @ 2017-06-02 22:02 UTC (permalink / raw)
To: Linus Walleij
Cc: linux-arm-kernel, linux-arm-msm, Andy Gross, Bjorn Andersson
On 05/15, Linus Walleij wrote:
> diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
> index 747669a62aa8..a53c0f9970bd 100644
> --- a/arch/arm/boot/dts/qcom-msm8660.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
> @@ -107,6 +107,31 @@
> reg = <0x900000 0x4000>;
> };
>
> +
> + gsbi8: gsbi@19800000 {
> + compatible = "qcom,gsbi-v1.0.0";
> + cell-index = <12>;
> + reg = <0x19800000 0x100>;
> + clocks = <&gcc GSBI8_H_CLK>;
> + clock-names = "iface";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + syscon-tcsr = <&tcsr>;
> +
> + gsbi8_i2c: i2c@19880000 {
> + compatible = "qcom,i2c-qup-v1.1.1";
> + reg = <0x19880000 0x1000>;
> + interrupts = <0 161 IRQ_TYPE_NONE>;
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>?
> + clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>;
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family
@ 2017-06-02 22:02 ` Stephen Boyd
0 siblings, 0 replies; 8+ messages in thread
From: Stephen Boyd @ 2017-06-02 22:02 UTC (permalink / raw)
To: linux-arm-kernel
On 05/15, Linus Walleij wrote:
> diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
> index 747669a62aa8..a53c0f9970bd 100644
> --- a/arch/arm/boot/dts/qcom-msm8660.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
> @@ -107,6 +107,31 @@
> reg = <0x900000 0x4000>;
> };
>
> +
> + gsbi8: gsbi at 19800000 {
> + compatible = "qcom,gsbi-v1.0.0";
> + cell-index = <12>;
> + reg = <0x19800000 0x100>;
> + clocks = <&gcc GSBI8_H_CLK>;
> + clock-names = "iface";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + syscon-tcsr = <&tcsr>;
> +
> + gsbi8_i2c: i2c at 19880000 {
> + compatible = "qcom,i2c-qup-v1.1.1";
> + reg = <0x19880000 0x1000>;
> + interrupts = <0 161 IRQ_TYPE_NONE>;
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>?
> + clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>;
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family
2017-06-02 22:02 ` Stephen Boyd
@ 2017-06-06 2:11 ` Andy Gross
-1 siblings, 0 replies; 8+ messages in thread
From: Andy Gross @ 2017-06-06 2:11 UTC (permalink / raw)
To: Stephen Boyd
Cc: Linus Walleij, linux-arm-msm, linux-arm-kernel, Bjorn Andersson
On Fri, Jun 02, 2017 at 03:02:23PM -0700, Stephen Boyd wrote:
> On 05/15, Linus Walleij wrote:
> > diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
> > index 747669a62aa8..a53c0f9970bd 100644
> > --- a/arch/arm/boot/dts/qcom-msm8660.dtsi
> > +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
> > @@ -107,6 +107,31 @@
> > reg = <0x900000 0x4000>;
> > };
> >
> > +
> > + gsbi8: gsbi@19800000 {
> > + compatible = "qcom,gsbi-v1.0.0";
> > + cell-index = <12>;
> > + reg = <0x19800000 0x100>;
> > + clocks = <&gcc GSBI8_H_CLK>;
> > + clock-names = "iface";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + syscon-tcsr = <&tcsr>;
> > +
> > + gsbi8_i2c: i2c@19880000 {
> > + compatible = "qcom,i2c-qup-v1.1.1";
> > + reg = <0x19880000 0x1000>;
> > + interrupts = <0 161 IRQ_TYPE_NONE>;
>
> interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>?
I'll fix this up. No need for resend
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family
@ 2017-06-06 2:11 ` Andy Gross
0 siblings, 0 replies; 8+ messages in thread
From: Andy Gross @ 2017-06-06 2:11 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jun 02, 2017 at 03:02:23PM -0700, Stephen Boyd wrote:
> On 05/15, Linus Walleij wrote:
> > diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
> > index 747669a62aa8..a53c0f9970bd 100644
> > --- a/arch/arm/boot/dts/qcom-msm8660.dtsi
> > +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
> > @@ -107,6 +107,31 @@
> > reg = <0x900000 0x4000>;
> > };
> >
> > +
> > + gsbi8: gsbi at 19800000 {
> > + compatible = "qcom,gsbi-v1.0.0";
> > + cell-index = <12>;
> > + reg = <0x19800000 0x100>;
> > + clocks = <&gcc GSBI8_H_CLK>;
> > + clock-names = "iface";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + syscon-tcsr = <&tcsr>;
> > +
> > + gsbi8_i2c: i2c at 19880000 {
> > + compatible = "qcom,i2c-qup-v1.1.1";
> > + reg = <0x19880000 0x1000>;
> > + interrupts = <0 161 IRQ_TYPE_NONE>;
>
> interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>?
I'll fix this up. No need for resend
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-06-06 2:11 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
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2017-05-15 7:50 [PATCH 1/2] ARM: dts: add GSBI8 defines to the MSM8660 family Linus Walleij
2017-05-15 7:50 ` Linus Walleij
2017-05-24 22:19 ` Bjorn Andersson
2017-05-24 22:19 ` Bjorn Andersson
2017-06-02 22:02 ` Stephen Boyd
2017-06-02 22:02 ` Stephen Boyd
2017-06-06 2:11 ` Andy Gross
2017-06-06 2:11 ` Andy Gross
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