From: Christoffer Dall <cdall@linaro.org> To: Marc Zyngier <marc.zyngier@arm.com> Cc: kvm@vger.kernel.org, David Daney <david.daney@cavium.com>, Catalin Marinas <catalin.marinas@arm.com>, Robert Richter <rrichter@cavium.com>, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Subject: Re: [PATCH v2 04/25] KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2 Date: Sun, 4 Jun 2017 16:59:05 +0200 [thread overview] Message-ID: <20170604145905.GG9464@cbox> (raw) In-Reply-To: <20170601102117.17750-5-marc.zyngier@arm.com> On Thu, Jun 01, 2017 at 11:20:56AM +0100, Marc Zyngier wrote: > In order to start handling guest access to GICv3 system registers, > let's add a hook that will get called when we trap a system register > access. This is gated by a new static key (vgic_v3_cpuif_trap). > > Reviewed-by: Eric Auger <eric.auger@redhat.com> > Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> > --- > arch/arm64/include/asm/kvm_hyp.h | 1 + > arch/arm64/kvm/hyp/switch.c | 14 ++++++++++++++ > include/kvm/arm_vgic.h | 1 + > virt/kvm/arm/hyp/vgic-v3-sr.c | 38 ++++++++++++++++++++++++++++++++++++++ > virt/kvm/arm/vgic/vgic-v3.c | 2 ++ > 5 files changed, 56 insertions(+) > > diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h > index b18e852d27e8..4572a9b560fa 100644 > --- a/arch/arm64/include/asm/kvm_hyp.h > +++ b/arch/arm64/include/asm/kvm_hyp.h > @@ -127,6 +127,7 @@ int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu); > > void __vgic_v3_save_state(struct kvm_vcpu *vcpu); > void __vgic_v3_restore_state(struct kvm_vcpu *vcpu); > +int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu); > > void __timer_save_state(struct kvm_vcpu *vcpu); > void __timer_restore_state(struct kvm_vcpu *vcpu); > diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c > index aede1658aeda..dfd8ca16601b 100644 > --- a/arch/arm64/kvm/hyp/switch.c > +++ b/arch/arm64/kvm/hyp/switch.c > @@ -350,6 +350,20 @@ int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu) > } > } > > + if (static_branch_unlikely(&vgic_v3_cpuif_trap) && > + exit_code == ARM_EXCEPTION_TRAP && > + (kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_SYS64 || > + kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_CP15_32)) { > + int ret = __vgic_v3_perform_cpuif_access(vcpu); > + > + if (ret == 1) { > + __skip_instr(vcpu); > + goto again; > + } > + > + /* 0 falls through to be handled out of EL2 */ > + } > + > fp_enabled = __fpsimd_enabled(); > > __sysreg_save_guest_state(guest_ctxt); > diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h > index ef718586321c..39b9fc4dc65d 100644 > --- a/include/kvm/arm_vgic.h > +++ b/include/kvm/arm_vgic.h > @@ -285,6 +285,7 @@ struct vgic_cpu { > }; > > extern struct static_key_false vgic_v2_cpuif_trap; > +extern struct static_key_false vgic_v3_cpuif_trap; > > int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write); > void kvm_vgic_early_init(struct kvm *kvm); > diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c > index 990d9d1e85d0..943bf11252d9 100644 > --- a/virt/kvm/arm/hyp/vgic-v3-sr.c > +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c > @@ -19,6 +19,7 @@ > #include <linux/irqchip/arm-gic-v3.h> > #include <linux/kvm_host.h> > > +#include <asm/kvm_emulate.h> > #include <asm/kvm_hyp.h> > > #define vtr_to_max_lr_idx(v) ((v) & 0xf) > @@ -371,3 +372,40 @@ void __hyp_text __vgic_v3_write_vmcr(u32 vmcr) > { > write_gicreg(vmcr, ICH_VMCR_EL2); > } > + > +#ifdef CONFIG_ARM64 > + > +int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu) > +{ > + int rt; > + u32 esr; > + u32 vmcr; > + void (*fn)(struct kvm_vcpu *, u32, int); > + bool is_read; > + u32 sysreg; > + > + esr = kvm_vcpu_get_hsr(vcpu); > + if (vcpu_mode_is_32bit(vcpu)) { > + if (!kvm_condition_valid(vcpu)) > + return 1; > + > + sysreg = esr_cp15_to_sysreg(esr); > + } else { > + sysreg = esr_sys64_to_sysreg(esr); > + } > + > + is_read = (esr & ESR_ELx_SYS64_ISS_DIR_MASK) == ESR_ELx_SYS64_ISS_DIR_READ; > + > + switch (sysreg) { > + default: > + return 0; > + } > + > + vmcr = __vgic_v3_read_vmcr(); > + rt = kvm_vcpu_sys_get_rt(vcpu); > + fn(vcpu, vmcr, rt); > + > + return 1; > +} > + > +#endif > diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c > index 6fe3f003636a..88d9bd9bf468 100644 > --- a/virt/kvm/arm/vgic/vgic-v3.c > +++ b/virt/kvm/arm/vgic/vgic-v3.c > @@ -410,6 +410,8 @@ int vgic_v3_map_resources(struct kvm *kvm) > return ret; > } > > +DEFINE_STATIC_KEY_FALSE(vgic_v3_cpuif_trap); > + > /** > * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT > * @node: pointer to the DT node > -- > 2.11.0 >
WARNING: multiple messages have this Message-ID (diff)
From: cdall@linaro.org (Christoffer Dall) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 04/25] KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2 Date: Sun, 4 Jun 2017 16:59:05 +0200 [thread overview] Message-ID: <20170604145905.GG9464@cbox> (raw) In-Reply-To: <20170601102117.17750-5-marc.zyngier@arm.com> On Thu, Jun 01, 2017 at 11:20:56AM +0100, Marc Zyngier wrote: > In order to start handling guest access to GICv3 system registers, > let's add a hook that will get called when we trap a system register > access. This is gated by a new static key (vgic_v3_cpuif_trap). > > Reviewed-by: Eric Auger <eric.auger@redhat.com> > Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> > --- > arch/arm64/include/asm/kvm_hyp.h | 1 + > arch/arm64/kvm/hyp/switch.c | 14 ++++++++++++++ > include/kvm/arm_vgic.h | 1 + > virt/kvm/arm/hyp/vgic-v3-sr.c | 38 ++++++++++++++++++++++++++++++++++++++ > virt/kvm/arm/vgic/vgic-v3.c | 2 ++ > 5 files changed, 56 insertions(+) > > diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h > index b18e852d27e8..4572a9b560fa 100644 > --- a/arch/arm64/include/asm/kvm_hyp.h > +++ b/arch/arm64/include/asm/kvm_hyp.h > @@ -127,6 +127,7 @@ int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu); > > void __vgic_v3_save_state(struct kvm_vcpu *vcpu); > void __vgic_v3_restore_state(struct kvm_vcpu *vcpu); > +int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu); > > void __timer_save_state(struct kvm_vcpu *vcpu); > void __timer_restore_state(struct kvm_vcpu *vcpu); > diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c > index aede1658aeda..dfd8ca16601b 100644 > --- a/arch/arm64/kvm/hyp/switch.c > +++ b/arch/arm64/kvm/hyp/switch.c > @@ -350,6 +350,20 @@ int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu) > } > } > > + if (static_branch_unlikely(&vgic_v3_cpuif_trap) && > + exit_code == ARM_EXCEPTION_TRAP && > + (kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_SYS64 || > + kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_CP15_32)) { > + int ret = __vgic_v3_perform_cpuif_access(vcpu); > + > + if (ret == 1) { > + __skip_instr(vcpu); > + goto again; > + } > + > + /* 0 falls through to be handled out of EL2 */ > + } > + > fp_enabled = __fpsimd_enabled(); > > __sysreg_save_guest_state(guest_ctxt); > diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h > index ef718586321c..39b9fc4dc65d 100644 > --- a/include/kvm/arm_vgic.h > +++ b/include/kvm/arm_vgic.h > @@ -285,6 +285,7 @@ struct vgic_cpu { > }; > > extern struct static_key_false vgic_v2_cpuif_trap; > +extern struct static_key_false vgic_v3_cpuif_trap; > > int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write); > void kvm_vgic_early_init(struct kvm *kvm); > diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c > index 990d9d1e85d0..943bf11252d9 100644 > --- a/virt/kvm/arm/hyp/vgic-v3-sr.c > +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c > @@ -19,6 +19,7 @@ > #include <linux/irqchip/arm-gic-v3.h> > #include <linux/kvm_host.h> > > +#include <asm/kvm_emulate.h> > #include <asm/kvm_hyp.h> > > #define vtr_to_max_lr_idx(v) ((v) & 0xf) > @@ -371,3 +372,40 @@ void __hyp_text __vgic_v3_write_vmcr(u32 vmcr) > { > write_gicreg(vmcr, ICH_VMCR_EL2); > } > + > +#ifdef CONFIG_ARM64 > + > +int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu) > +{ > + int rt; > + u32 esr; > + u32 vmcr; > + void (*fn)(struct kvm_vcpu *, u32, int); > + bool is_read; > + u32 sysreg; > + > + esr = kvm_vcpu_get_hsr(vcpu); > + if (vcpu_mode_is_32bit(vcpu)) { > + if (!kvm_condition_valid(vcpu)) > + return 1; > + > + sysreg = esr_cp15_to_sysreg(esr); > + } else { > + sysreg = esr_sys64_to_sysreg(esr); > + } > + > + is_read = (esr & ESR_ELx_SYS64_ISS_DIR_MASK) == ESR_ELx_SYS64_ISS_DIR_READ; > + > + switch (sysreg) { > + default: > + return 0; > + } > + > + vmcr = __vgic_v3_read_vmcr(); > + rt = kvm_vcpu_sys_get_rt(vcpu); > + fn(vcpu, vmcr, rt); > + > + return 1; > +} > + > +#endif > diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c > index 6fe3f003636a..88d9bd9bf468 100644 > --- a/virt/kvm/arm/vgic/vgic-v3.c > +++ b/virt/kvm/arm/vgic/vgic-v3.c > @@ -410,6 +410,8 @@ int vgic_v3_map_resources(struct kvm *kvm) > return ret; > } > > +DEFINE_STATIC_KEY_FALSE(vgic_v3_cpuif_trap); > + > /** > * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT > * @node: pointer to the DT node > -- > 2.11.0 >
next prev parent reply other threads:[~2017-06-04 14:59 UTC|newest] Thread overview: 152+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-06-01 10:20 [PATCH v2 00/25] arm64: KVM: Mediate access to GICv3 sysregs at EL2 Marc Zyngier 2017-06-01 10:20 ` Marc Zyngier 2017-06-01 10:20 ` [PATCH v2 01/25] arm64: Add a facility to turn an ESR syndrome into a sysreg encoding Marc Zyngier 2017-06-01 10:20 ` Marc Zyngier 2017-06-01 10:20 ` [PATCH v2 02/25] KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers Marc Zyngier 2017-06-01 10:20 ` Marc Zyngier 2017-06-01 10:20 ` [PATCH v2 03/25] KVM: arm64: Make kvm_condition_valid32() accessible from EL2 Marc Zyngier 2017-06-01 10:20 ` Marc Zyngier 2017-06-04 12:11 ` Christoffer Dall 2017-06-04 12:11 ` Christoffer Dall 2017-06-05 8:13 ` Marc Zyngier 2017-06-05 8:13 ` Marc Zyngier 2017-06-05 8:23 ` Christoffer Dall 2017-06-05 8:23 ` Christoffer Dall 2017-06-05 9:10 ` Marc Zyngier 2017-06-05 9:10 ` Marc Zyngier 2017-06-01 10:20 ` [PATCH v2 04/25] KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2 Marc Zyngier 2017-06-01 10:20 ` Marc Zyngier 2017-06-04 14:59 ` Christoffer Dall [this message] 2017-06-04 14:59 ` Christoffer Dall 2017-06-01 10:20 ` [PATCH v2 05/25] KVM: arm64: vgic-v3: Add ICV_BPR1_EL1 handler Marc Zyngier 2017-06-01 10:20 ` Marc Zyngier 2017-06-04 20:25 ` Christoffer Dall 2017-06-04 20:25 ` Christoffer Dall 2017-06-05 9:58 ` Marc Zyngier 2017-06-05 9:58 ` Marc Zyngier 2017-06-05 10:16 ` Christoffer Dall 2017-06-05 10:16 ` Christoffer Dall 2017-06-05 10:27 ` Peter Maydell 2017-06-05 10:27 ` Peter Maydell 2017-06-06 9:41 ` Christoffer Dall 2017-06-06 9:41 ` Christoffer Dall 2017-06-01 10:20 ` [PATCH v2 06/25] KVM: arm64: vgic-v3: Add ICV_IGRPEN1_EL1 handler Marc Zyngier 2017-06-01 10:20 ` Marc Zyngier 2017-06-06 13:22 ` Christoffer Dall 2017-06-06 13:22 ` Christoffer Dall 2017-06-01 10:20 ` [PATCH v2 07/25] KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler Marc Zyngier 2017-06-01 10:20 ` Marc Zyngier 2017-06-05 9:21 ` Christoffer Dall 2017-06-05 9:21 ` Christoffer Dall 2017-06-05 10:33 ` Marc Zyngier 2017-06-05 10:33 ` Marc Zyngier 2017-06-06 11:09 ` Christoffer Dall 2017-06-06 11:09 ` Christoffer Dall 2017-06-06 13:35 ` Marc Zyngier 2017-06-06 13:35 ` Marc Zyngier 2017-06-06 13:50 ` Christoffer Dall 2017-06-06 13:50 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 08/25] KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-05 10:32 ` Christoffer Dall 2017-06-05 10:32 ` Christoffer Dall 2017-06-05 11:00 ` Marc Zyngier 2017-06-05 11:00 ` Marc Zyngier 2017-06-06 13:19 ` Christoffer Dall 2017-06-06 13:19 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 09/25] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:22 ` Christoffer Dall 2017-06-06 13:22 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 10/25] KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 11:51 ` Christoffer Dall 2017-06-06 11:51 ` Christoffer Dall 2017-06-06 13:57 ` Marc Zyngier 2017-06-06 13:57 ` Marc Zyngier 2017-06-06 14:41 ` Christoffer Dall 2017-06-06 14:41 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 11/25] KVM: arm64: vgic-v3: Enable trapping of Group-1 system registers Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:22 ` Christoffer Dall 2017-06-06 13:22 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 12/25] KVM: arm64: Enable GICv3 Group-1 sysreg trapping via command-line Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 12:06 ` Christoffer Dall 2017-06-06 12:06 ` Christoffer Dall 2017-06-06 13:59 ` Marc Zyngier 2017-06-06 13:59 ` Marc Zyngier 2017-06-06 14:42 ` Christoffer Dall 2017-06-06 14:42 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 13/25] KVM: arm64: vgic-v3: Add ICV_BPR0_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 12:11 ` Christoffer Dall 2017-06-06 12:11 ` Christoffer Dall 2017-06-06 15:15 ` Marc Zyngier 2017-06-06 15:15 ` Marc Zyngier 2017-06-06 15:46 ` Christoffer Dall 2017-06-06 15:46 ` Christoffer Dall 2017-06-06 15:56 ` Peter Maydell 2017-06-06 15:56 ` Peter Maydell 2017-06-06 16:56 ` Marc Zyngier 2017-06-06 16:56 ` Marc Zyngier 2017-06-06 17:23 ` Christoffer Dall 2017-06-06 17:23 ` Christoffer Dall 2017-06-06 17:36 ` Peter Maydell 2017-06-06 17:36 ` Peter Maydell 2017-06-01 10:21 ` [PATCH v2 14/25] KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:22 ` Christoffer Dall 2017-06-06 13:22 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 15/25] KVM: arm64: vgic-v3: Add misc Group-0 handlers Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:22 ` Christoffer Dall 2017-06-06 13:22 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 16/25] KVM: arm64: vgic-v3: Enable trapping of Group-0 system registers Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:22 ` Christoffer Dall 2017-06-06 13:22 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 17/25] KVM: arm64: Enable GICv3 Group-0 sysreg trapping via command-line Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 12:44 ` Christoffer Dall 2017-06-06 12:44 ` Christoffer Dall 2017-06-06 15:15 ` Marc Zyngier 2017-06-06 15:15 ` Marc Zyngier 2017-06-01 10:21 ` [PATCH v2 18/25] arm64: Add MIDR values for Cavium cn83XX SoCs Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-01 10:21 ` [PATCH v2 19/25] arm64: Add workaround for Cavium Thunder erratum 30115 Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 12:48 ` Christoffer Dall 2017-06-06 12:48 ` Christoffer Dall 2017-06-06 15:18 ` Marc Zyngier 2017-06-06 15:18 ` Marc Zyngier 2017-06-01 10:21 ` [PATCH v2 20/25] KVM: arm64: vgic-v3: Add ICV_DIR_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 12:59 ` Christoffer Dall 2017-06-06 12:59 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 21/25] KVM: arm64: vgic-v3: Add ICV_RPR_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:23 ` Christoffer Dall 2017-06-06 13:23 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 22/25] KVM: arm64: vgic-v3: Add ICV_CTLR_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:23 ` Christoffer Dall 2017-06-06 13:23 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 23/25] KVM: arm64: vgic-v3: Add ICV_PMR_EL1 handler Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:23 ` Christoffer Dall 2017-06-06 13:23 ` Christoffer Dall 2017-06-01 10:21 ` [PATCH v2 24/25] KVM: arm64: Enable GICv3 common sysreg trapping via command-line Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-01 10:21 ` [PATCH v2 25/25] KVM: arm64: vgic-v3: Log which GICv3 system registers are trapped Marc Zyngier 2017-06-01 10:21 ` Marc Zyngier 2017-06-06 13:23 ` Christoffer Dall 2017-06-06 13:23 ` Christoffer Dall 2017-06-01 21:00 ` [PATCH v2 00/25] arm64: KVM: Mediate access to GICv3 sysregs at EL2 David Daney 2017-06-01 21:00 ` David Daney 2017-06-02 9:11 ` Marc Zyngier 2017-06-02 9:11 ` Marc Zyngier 2017-06-02 16:24 ` David Daney 2017-06-02 16:24 ` David Daney 2017-06-08 14:35 ` Alexander Graf 2017-06-08 14:35 ` Alexander Graf
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20170604145905.GG9464@cbox \ --to=cdall@linaro.org \ --cc=catalin.marinas@arm.com \ --cc=david.daney@cavium.com \ --cc=kvm@vger.kernel.org \ --cc=kvmarm@lists.cs.columbia.edu \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=marc.zyngier@arm.com \ --cc=rrichter@cavium.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.