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* [PATCH v5 0/4] MIPS Boston support
@ 2017-06-17 20:52 ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips; +Cc: Ralf Baechle, Paul Burton

This series introduces support for the MIPS Boston development board,
allowing generic kernels to run on it. Typically a Boston board will be
running the U-Boot bootloader & we make use of the Flattened Image Tree
(FIT) image format for the kernel.

If physical Boston hardware is unavailable this series can be tested
using QEMU built from the master branch (or v2.9 onwards). To do so,
configure the kernel for the generic 64r6el_defconfig & run QEMU like
so:

  $ make ARCH=mips 64r6el_defconfig
  $ make ARCH=mips CROSS_COMPILE=my-toolchain-
  $ qemu-system-mips64el -M boston \
      -kernel arch/mips/boot/vmlinux.gz.itb \
      serial stdio

Applies atop v4.12-rc5.

Paul Burton (4):
  dt-bindings: Document img,boston-clock binding
  clk: boston: Add a driver for MIPS Boston board clocks
  MIPS: DTS: img: Don't attempt to build-in all .dtb files
  MIPS: generic: Support MIPS Boston development boards

 .../devicetree/bindings/clock/img,boston-clock.txt |  31 +++
 MAINTAINERS                                        |  10 +
 arch/mips/boot/dts/img/Makefile                    |   5 +-
 arch/mips/boot/dts/img/boston.dts                  | 224 +++++++++++++++++++++
 arch/mips/configs/generic/board-boston.config      |  48 +++++
 arch/mips/generic/Kconfig                          |  12 ++
 arch/mips/generic/vmlinux.its.S                    |  25 +++
 drivers/clk/Kconfig                                |   1 +
 drivers/clk/Makefile                               |   1 +
 drivers/clk/imgtec/Kconfig                         |   9 +
 drivers/clk/imgtec/Makefile                        |   1 +
 drivers/clk/imgtec/clk-boston.c                    | 103 ++++++++++
 include/dt-bindings/clock/boston-clock.h           |  14 ++
 13 files changed, 482 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/img,boston-clock.txt
 create mode 100644 arch/mips/boot/dts/img/boston.dts
 create mode 100644 arch/mips/configs/generic/board-boston.config
 create mode 100644 drivers/clk/imgtec/Kconfig
 create mode 100644 drivers/clk/imgtec/Makefile
 create mode 100644 drivers/clk/imgtec/clk-boston.c
 create mode 100644 include/dt-bindings/clock/boston-clock.h

-- 
2.13.1

^ permalink raw reply	[flat|nested] 21+ messages in thread

* [PATCH v5 0/4] MIPS Boston support
@ 2017-06-17 20:52 ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips; +Cc: Ralf Baechle, Paul Burton

This series introduces support for the MIPS Boston development board,
allowing generic kernels to run on it. Typically a Boston board will be
running the U-Boot bootloader & we make use of the Flattened Image Tree
(FIT) image format for the kernel.

If physical Boston hardware is unavailable this series can be tested
using QEMU built from the master branch (or v2.9 onwards). To do so,
configure the kernel for the generic 64r6el_defconfig & run QEMU like
so:

  $ make ARCH=mips 64r6el_defconfig
  $ make ARCH=mips CROSS_COMPILE=my-toolchain-
  $ qemu-system-mips64el -M boston \
      -kernel arch/mips/boot/vmlinux.gz.itb \
      serial stdio

Applies atop v4.12-rc5.

Paul Burton (4):
  dt-bindings: Document img,boston-clock binding
  clk: boston: Add a driver for MIPS Boston board clocks
  MIPS: DTS: img: Don't attempt to build-in all .dtb files
  MIPS: generic: Support MIPS Boston development boards

 .../devicetree/bindings/clock/img,boston-clock.txt |  31 +++
 MAINTAINERS                                        |  10 +
 arch/mips/boot/dts/img/Makefile                    |   5 +-
 arch/mips/boot/dts/img/boston.dts                  | 224 +++++++++++++++++++++
 arch/mips/configs/generic/board-boston.config      |  48 +++++
 arch/mips/generic/Kconfig                          |  12 ++
 arch/mips/generic/vmlinux.its.S                    |  25 +++
 drivers/clk/Kconfig                                |   1 +
 drivers/clk/Makefile                               |   1 +
 drivers/clk/imgtec/Kconfig                         |   9 +
 drivers/clk/imgtec/Makefile                        |   1 +
 drivers/clk/imgtec/clk-boston.c                    | 103 ++++++++++
 include/dt-bindings/clock/boston-clock.h           |  14 ++
 13 files changed, 482 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/img,boston-clock.txt
 create mode 100644 arch/mips/boot/dts/img/boston.dts
 create mode 100644 arch/mips/configs/generic/board-boston.config
 create mode 100644 drivers/clk/imgtec/Kconfig
 create mode 100644 drivers/clk/imgtec/Makefile
 create mode 100644 drivers/clk/imgtec/clk-boston.c
 create mode 100644 include/dt-bindings/clock/boston-clock.h

-- 
2.13.1

^ permalink raw reply	[flat|nested] 21+ messages in thread

* [PATCH v5 1/4] dt-bindings: Document img,boston-clock binding
  2017-06-17 20:52 ` Paul Burton
@ 2017-06-17 20:52   ` Paul Burton
  -1 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips
  Cc: Ralf Baechle, Paul Burton, Frank Rowand, Michael Turquette,
	Rob Herring, Stephen Boyd, devicetree, linux-clk

Add device tree binding documentation for the clocks provided by the
MIPS Boston development board from Imagination Technologies, and a
header file describing the available clocks for use by device trees &
driver.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org

---

Changes in v5: None

Changes in v4:
- Move img,boston-clock node under platform register syscon node.
- Add MAINTAINERS entry.

Changes in v3: None

Changes in v2:
- Add BOSTON_CLK_INPUT to expose the input clock.

 .../devicetree/bindings/clock/img,boston-clock.txt | 31 ++++++++++++++++++++++
 MAINTAINERS                                        |  7 +++++
 include/dt-bindings/clock/boston-clock.h           | 14 ++++++++++
 3 files changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/img,boston-clock.txt
 create mode 100644 include/dt-bindings/clock/boston-clock.h

diff --git a/Documentation/devicetree/bindings/clock/img,boston-clock.txt b/Documentation/devicetree/bindings/clock/img,boston-clock.txt
new file mode 100644
index 000000000000..7bc5e9ffb624
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/img,boston-clock.txt
@@ -0,0 +1,31 @@
+Binding for Imagination Technologies MIPS Boston clock sources.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The device node must be a child node of the syscon node corresponding to the
+Boston system's platform registers.
+
+Required properties:
+- compatible : Should be "img,boston-clock".
+- #clock-cells : Should be set to 1.
+  Values available for clock consumers can be found in the header file:
+    <dt-bindings/clock/boston-clock.h>
+
+Example:
+
+	system-controller@17ffd000 {
+		compatible = "img,boston-platform-regs", "syscon";
+		reg = <0x17ffd000 0x1000>;
+
+		clk_boston: clock {
+			compatible = "img,boston-clock";
+			#clock-cells = <1>;
+		};
+	};
+
+	uart0: uart@17ffe000 {
+		/* ... */
+		clocks = <&clk_boston BOSTON_CLK_SYS>;
+	};
diff --git a/MAINTAINERS b/MAINTAINERS
index 09b5ab6a8a5c..6a341862f5d6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8498,6 +8498,13 @@ F:	arch/mips/include/asm/mach-loongson32/
 F:	drivers/*/*loongson1*
 F:	drivers/*/*/*loongson1*
 
+MIPS BOSTON DEVELOPMENT BOARD
+M:	Paul Burton <paul.burton@imgtec.com>
+L:	linux-mips@linux-mips.org
+S:	Maintained
+F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
+F:	include/dt-bindings/clock/boston-clock.h
+
 MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
 M:	Hans Verkuil <hverkuil@xs4all.nl>
 L:	linux-media@vger.kernel.org
diff --git a/include/dt-bindings/clock/boston-clock.h b/include/dt-bindings/clock/boston-clock.h
new file mode 100644
index 000000000000..a6f009821137
--- /dev/null
+++ b/include/dt-bindings/clock/boston-clock.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__
+#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__
+
+#define BOSTON_CLK_INPUT 0
+#define BOSTON_CLK_SYS 1
+#define BOSTON_CLK_CPU 2
+
+#endif /* __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ */
-- 
2.13.1


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [PATCH v5 1/4] dt-bindings: Document img,boston-clock binding
@ 2017-06-17 20:52   ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips
  Cc: Ralf Baechle, Paul Burton, Frank Rowand, Michael Turquette,
	Rob Herring, Stephen Boyd, devicetree, linux-clk

Add device tree binding documentation for the clocks provided by the
MIPS Boston development board from Imagination Technologies, and a
header file describing the available clocks for use by device trees &
driver.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org

---

Changes in v5: None

Changes in v4:
- Move img,boston-clock node under platform register syscon node.
- Add MAINTAINERS entry.

Changes in v3: None

Changes in v2:
- Add BOSTON_CLK_INPUT to expose the input clock.

 .../devicetree/bindings/clock/img,boston-clock.txt | 31 ++++++++++++++++++++++
 MAINTAINERS                                        |  7 +++++
 include/dt-bindings/clock/boston-clock.h           | 14 ++++++++++
 3 files changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/img,boston-clock.txt
 create mode 100644 include/dt-bindings/clock/boston-clock.h

diff --git a/Documentation/devicetree/bindings/clock/img,boston-clock.txt b/Documentation/devicetree/bindings/clock/img,boston-clock.txt
new file mode 100644
index 000000000000..7bc5e9ffb624
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/img,boston-clock.txt
@@ -0,0 +1,31 @@
+Binding for Imagination Technologies MIPS Boston clock sources.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The device node must be a child node of the syscon node corresponding to the
+Boston system's platform registers.
+
+Required properties:
+- compatible : Should be "img,boston-clock".
+- #clock-cells : Should be set to 1.
+  Values available for clock consumers can be found in the header file:
+    <dt-bindings/clock/boston-clock.h>
+
+Example:
+
+	system-controller@17ffd000 {
+		compatible = "img,boston-platform-regs", "syscon";
+		reg = <0x17ffd000 0x1000>;
+
+		clk_boston: clock {
+			compatible = "img,boston-clock";
+			#clock-cells = <1>;
+		};
+	};
+
+	uart0: uart@17ffe000 {
+		/* ... */
+		clocks = <&clk_boston BOSTON_CLK_SYS>;
+	};
diff --git a/MAINTAINERS b/MAINTAINERS
index 09b5ab6a8a5c..6a341862f5d6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8498,6 +8498,13 @@ F:	arch/mips/include/asm/mach-loongson32/
 F:	drivers/*/*loongson1*
 F:	drivers/*/*/*loongson1*
 
+MIPS BOSTON DEVELOPMENT BOARD
+M:	Paul Burton <paul.burton@imgtec.com>
+L:	linux-mips@linux-mips.org
+S:	Maintained
+F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
+F:	include/dt-bindings/clock/boston-clock.h
+
 MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
 M:	Hans Verkuil <hverkuil@xs4all.nl>
 L:	linux-media@vger.kernel.org
diff --git a/include/dt-bindings/clock/boston-clock.h b/include/dt-bindings/clock/boston-clock.h
new file mode 100644
index 000000000000..a6f009821137
--- /dev/null
+++ b/include/dt-bindings/clock/boston-clock.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__
+#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__
+
+#define BOSTON_CLK_INPUT 0
+#define BOSTON_CLK_SYS 1
+#define BOSTON_CLK_CPU 2
+
+#endif /* __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ */
-- 
2.13.1

^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
@ 2017-06-17 20:52   ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips
  Cc: Ralf Baechle, Paul Burton, Michael Turquette, Stephen Boyd, linux-clk

Add a driver for the clocks provided by the MIPS Boston board from
Imagination Technologies. 2 clocks are provided - the system clock & the
CPU clock - and each is a simple fixed rate clock whose frequency can be
determined by reading a register provided by the board.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org

---

Changes in v5:
- Use struct clk_hw rather than struct clk.
- Comment on reasoning for use of CLK_OF_DECLARE.
- Drop depends on OF from Kconfig.
- Define pr_fmt to get clearer error messages.

Changes in v4:
- Adjust to expect the parent node to be the syscon.
- Update MAINTAINERS entry.

Changes in v3: None

Changes in v2:
- Support BOSTON_CLK_INPUT.
- Register clocks with clk_register_fixed_rate during boot, removing need for clk_ops.
- s/uint32_t/u32/.
- Move driver to a vendor directory.

 MAINTAINERS                     |   1 +
 drivers/clk/Kconfig             |   1 +
 drivers/clk/Makefile            |   1 +
 drivers/clk/imgtec/Kconfig      |   9 ++++
 drivers/clk/imgtec/Makefile     |   1 +
 drivers/clk/imgtec/clk-boston.c | 103 ++++++++++++++++++++++++++++++++++++++++
 6 files changed, 116 insertions(+)
 create mode 100644 drivers/clk/imgtec/Kconfig
 create mode 100644 drivers/clk/imgtec/Makefile
 create mode 100644 drivers/clk/imgtec/clk-boston.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 6a341862f5d6..2749877a4574 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8503,6 +8503,7 @@ M:	Paul Burton <paul.burton@imgtec.com>
 L:	linux-mips@linux-mips.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
+F:	drivers/clk/imgtec/clk-boston.c
 F:	include/dt-bindings/clock/boston-clock.h
 
 MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 36cfea38135f..251a22139e73 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -219,6 +219,7 @@ config COMMON_CLK_VC5
 
 source "drivers/clk/bcm/Kconfig"
 source "drivers/clk/hisilicon/Kconfig"
+source "drivers/clk/imgtec/Kconfig"
 source "drivers/clk/mediatek/Kconfig"
 source "drivers/clk/meson/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index c19983afcb81..a4a7c5df8b93 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -59,6 +59,7 @@ obj-y					+= bcm/
 obj-$(CONFIG_ARCH_BERLIN)		+= berlin/
 obj-$(CONFIG_H8300)			+= h8300/
 obj-$(CONFIG_ARCH_HISI)			+= hisilicon/
+obj-y					+= imgtec/
 obj-$(CONFIG_ARCH_MXC)			+= imx/
 obj-$(CONFIG_MACH_INGENIC)		+= ingenic/
 obj-$(CONFIG_COMMON_CLK_KEYSTONE)	+= keystone/
diff --git a/drivers/clk/imgtec/Kconfig b/drivers/clk/imgtec/Kconfig
new file mode 100644
index 000000000000..f6dcb748e9c4
--- /dev/null
+++ b/drivers/clk/imgtec/Kconfig
@@ -0,0 +1,9 @@
+config COMMON_CLK_BOSTON
+	bool "Clock driver for MIPS Boston boards"
+	depends on MIPS || COMPILE_TEST
+	select MFD_SYSCON
+	---help---
+	  Enable this to support the system & CPU clocks on the MIPS Boston
+	  development board from Imagination Technologies. These are simple
+	  fixed rate clocks whose rate is determined by reading a platform
+	  provided register.
diff --git a/drivers/clk/imgtec/Makefile b/drivers/clk/imgtec/Makefile
new file mode 100644
index 000000000000..ac779b8c22f2
--- /dev/null
+++ b/drivers/clk/imgtec/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_COMMON_CLK_BOSTON)		+= clk-boston.o
diff --git a/drivers/clk/imgtec/clk-boston.c b/drivers/clk/imgtec/clk-boston.c
new file mode 100644
index 000000000000..f18f10351785
--- /dev/null
+++ b/drivers/clk/imgtec/clk-boston.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2016-2017 Imagination Technologies
+ * Author: Paul Burton <paul.burton@imgtec.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#define pr_fmt(fmt) "clk-boston: " fmt
+
+#include <linux/clk-provider.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/mfd/syscon.h>
+
+#include <dt-bindings/clock/boston-clock.h>
+
+#define BOSTON_PLAT_MMCMDIV		0x30
+# define BOSTON_PLAT_MMCMDIV_CLK0DIV	(0xff << 0)
+# define BOSTON_PLAT_MMCMDIV_INPUT	(0xff << 8)
+# define BOSTON_PLAT_MMCMDIV_MUL	(0xff << 16)
+# define BOSTON_PLAT_MMCMDIV_CLK1DIV	(0xff << 24)
+
+#define BOSTON_CLK_COUNT 3
+
+static u32 ext_field(u32 val, u32 mask)
+{
+	return (val & mask) >> (ffs(mask) - 1);
+}
+
+static void __init clk_boston_setup(struct device_node *np)
+{
+	unsigned long in_freq, cpu_freq, sys_freq;
+	uint mmcmdiv, mul, cpu_div, sys_div;
+	struct clk_hw_onecell_data *onecell;
+	struct regmap *regmap;
+	struct clk_hw *hw;
+	int err;
+
+	regmap = syscon_node_to_regmap(np->parent);
+	if (IS_ERR(regmap)) {
+		pr_err("failed to find regmap\n");
+		return;
+	}
+
+	err = regmap_read(regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);
+	if (err) {
+		pr_err("failed to read mmcm_div register: %d\n", err);
+		return;
+	}
+
+	in_freq = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT) * 1000000;
+	mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
+
+	sys_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);
+	sys_freq = mult_frac(in_freq, mul, sys_div);
+
+	cpu_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);
+	cpu_freq = mult_frac(in_freq, mul, cpu_div);
+
+	onecell = kzalloc(sizeof(*onecell) +
+			  (BOSTON_CLK_COUNT * sizeof(struct clk_hw *)),
+			  GFP_KERNEL);
+	if (!onecell)
+		return;
+
+	onecell->num = BOSTON_CLK_COUNT;
+
+	hw = clk_hw_register_fixed_rate(NULL, "input", NULL, 0, in_freq);
+	if (IS_ERR(hw)) {
+		pr_err("failed to register input clock: %ld\n", PTR_ERR(hw));
+		return;
+	}
+	onecell->hws[BOSTON_CLK_INPUT] = hw;
+
+	hw = clk_hw_register_fixed_rate(NULL, "sys", "input", 0, sys_freq);
+	if (IS_ERR(hw)) {
+		pr_err("failed to register sys clock: %ld\n", PTR_ERR(hw));
+		return;
+	}
+	onecell->hws[BOSTON_CLK_SYS] = hw;
+
+	hw = clk_hw_register_fixed_rate(NULL, "cpu", "input", 0, cpu_freq);
+	if (IS_ERR(hw)) {
+		pr_err("failed to register cpu clock: %ld\n", PTR_ERR(hw));
+		return;
+	}
+	onecell->hws[BOSTON_CLK_CPU] = hw;
+
+	err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, onecell);
+	if (err)
+		pr_err("failed to add DT provider: %d\n", err);
+}
+
+/*
+ * Use CLK_OF_DECLARE so that this driver is probed early enough to provide the
+ * CPU frequency for use with the GIC or cop0 counters/timers.
+ */
+CLK_OF_DECLARE(clk_boston, "img,boston-clock", clk_boston_setup);
-- 
2.13.1

^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
@ 2017-06-17 20:52   ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips
  Cc: Ralf Baechle, Paul Burton, Michael Turquette, Stephen Boyd, linux-clk

Add a driver for the clocks provided by the MIPS Boston board from
Imagination Technologies. 2 clocks are provided - the system clock & the
CPU clock - and each is a simple fixed rate clock whose frequency can be
determined by reading a register provided by the board.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org

---

Changes in v5:
- Use struct clk_hw rather than struct clk.
- Comment on reasoning for use of CLK_OF_DECLARE.
- Drop depends on OF from Kconfig.
- Define pr_fmt to get clearer error messages.

Changes in v4:
- Adjust to expect the parent node to be the syscon.
- Update MAINTAINERS entry.

Changes in v3: None

Changes in v2:
- Support BOSTON_CLK_INPUT.
- Register clocks with clk_register_fixed_rate during boot, removing need for clk_ops.
- s/uint32_t/u32/.
- Move driver to a vendor directory.

 MAINTAINERS                     |   1 +
 drivers/clk/Kconfig             |   1 +
 drivers/clk/Makefile            |   1 +
 drivers/clk/imgtec/Kconfig      |   9 ++++
 drivers/clk/imgtec/Makefile     |   1 +
 drivers/clk/imgtec/clk-boston.c | 103 ++++++++++++++++++++++++++++++++++++++++
 6 files changed, 116 insertions(+)
 create mode 100644 drivers/clk/imgtec/Kconfig
 create mode 100644 drivers/clk/imgtec/Makefile
 create mode 100644 drivers/clk/imgtec/clk-boston.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 6a341862f5d6..2749877a4574 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8503,6 +8503,7 @@ M:	Paul Burton <paul.burton@imgtec.com>
 L:	linux-mips@linux-mips.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
+F:	drivers/clk/imgtec/clk-boston.c
 F:	include/dt-bindings/clock/boston-clock.h
 
 MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 36cfea38135f..251a22139e73 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -219,6 +219,7 @@ config COMMON_CLK_VC5
 
 source "drivers/clk/bcm/Kconfig"
 source "drivers/clk/hisilicon/Kconfig"
+source "drivers/clk/imgtec/Kconfig"
 source "drivers/clk/mediatek/Kconfig"
 source "drivers/clk/meson/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index c19983afcb81..a4a7c5df8b93 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -59,6 +59,7 @@ obj-y					+= bcm/
 obj-$(CONFIG_ARCH_BERLIN)		+= berlin/
 obj-$(CONFIG_H8300)			+= h8300/
 obj-$(CONFIG_ARCH_HISI)			+= hisilicon/
+obj-y					+= imgtec/
 obj-$(CONFIG_ARCH_MXC)			+= imx/
 obj-$(CONFIG_MACH_INGENIC)		+= ingenic/
 obj-$(CONFIG_COMMON_CLK_KEYSTONE)	+= keystone/
diff --git a/drivers/clk/imgtec/Kconfig b/drivers/clk/imgtec/Kconfig
new file mode 100644
index 000000000000..f6dcb748e9c4
--- /dev/null
+++ b/drivers/clk/imgtec/Kconfig
@@ -0,0 +1,9 @@
+config COMMON_CLK_BOSTON
+	bool "Clock driver for MIPS Boston boards"
+	depends on MIPS || COMPILE_TEST
+	select MFD_SYSCON
+	---help---
+	  Enable this to support the system & CPU clocks on the MIPS Boston
+	  development board from Imagination Technologies. These are simple
+	  fixed rate clocks whose rate is determined by reading a platform
+	  provided register.
diff --git a/drivers/clk/imgtec/Makefile b/drivers/clk/imgtec/Makefile
new file mode 100644
index 000000000000..ac779b8c22f2
--- /dev/null
+++ b/drivers/clk/imgtec/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_COMMON_CLK_BOSTON)		+= clk-boston.o
diff --git a/drivers/clk/imgtec/clk-boston.c b/drivers/clk/imgtec/clk-boston.c
new file mode 100644
index 000000000000..f18f10351785
--- /dev/null
+++ b/drivers/clk/imgtec/clk-boston.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2016-2017 Imagination Technologies
+ * Author: Paul Burton <paul.burton@imgtec.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#define pr_fmt(fmt) "clk-boston: " fmt
+
+#include <linux/clk-provider.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/mfd/syscon.h>
+
+#include <dt-bindings/clock/boston-clock.h>
+
+#define BOSTON_PLAT_MMCMDIV		0x30
+# define BOSTON_PLAT_MMCMDIV_CLK0DIV	(0xff << 0)
+# define BOSTON_PLAT_MMCMDIV_INPUT	(0xff << 8)
+# define BOSTON_PLAT_MMCMDIV_MUL	(0xff << 16)
+# define BOSTON_PLAT_MMCMDIV_CLK1DIV	(0xff << 24)
+
+#define BOSTON_CLK_COUNT 3
+
+static u32 ext_field(u32 val, u32 mask)
+{
+	return (val & mask) >> (ffs(mask) - 1);
+}
+
+static void __init clk_boston_setup(struct device_node *np)
+{
+	unsigned long in_freq, cpu_freq, sys_freq;
+	uint mmcmdiv, mul, cpu_div, sys_div;
+	struct clk_hw_onecell_data *onecell;
+	struct regmap *regmap;
+	struct clk_hw *hw;
+	int err;
+
+	regmap = syscon_node_to_regmap(np->parent);
+	if (IS_ERR(regmap)) {
+		pr_err("failed to find regmap\n");
+		return;
+	}
+
+	err = regmap_read(regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);
+	if (err) {
+		pr_err("failed to read mmcm_div register: %d\n", err);
+		return;
+	}
+
+	in_freq = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT) * 1000000;
+	mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
+
+	sys_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);
+	sys_freq = mult_frac(in_freq, mul, sys_div);
+
+	cpu_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);
+	cpu_freq = mult_frac(in_freq, mul, cpu_div);
+
+	onecell = kzalloc(sizeof(*onecell) +
+			  (BOSTON_CLK_COUNT * sizeof(struct clk_hw *)),
+			  GFP_KERNEL);
+	if (!onecell)
+		return;
+
+	onecell->num = BOSTON_CLK_COUNT;
+
+	hw = clk_hw_register_fixed_rate(NULL, "input", NULL, 0, in_freq);
+	if (IS_ERR(hw)) {
+		pr_err("failed to register input clock: %ld\n", PTR_ERR(hw));
+		return;
+	}
+	onecell->hws[BOSTON_CLK_INPUT] = hw;
+
+	hw = clk_hw_register_fixed_rate(NULL, "sys", "input", 0, sys_freq);
+	if (IS_ERR(hw)) {
+		pr_err("failed to register sys clock: %ld\n", PTR_ERR(hw));
+		return;
+	}
+	onecell->hws[BOSTON_CLK_SYS] = hw;
+
+	hw = clk_hw_register_fixed_rate(NULL, "cpu", "input", 0, cpu_freq);
+	if (IS_ERR(hw)) {
+		pr_err("failed to register cpu clock: %ld\n", PTR_ERR(hw));
+		return;
+	}
+	onecell->hws[BOSTON_CLK_CPU] = hw;
+
+	err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, onecell);
+	if (err)
+		pr_err("failed to add DT provider: %d\n", err);
+}
+
+/*
+ * Use CLK_OF_DECLARE so that this driver is probed early enough to provide the
+ * CPU frequency for use with the GIC or cop0 counters/timers.
+ */
+CLK_OF_DECLARE(clk_boston, "img,boston-clock", clk_boston_setup);
-- 
2.13.1

^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [PATCH v5 3/4] MIPS: DTS: img: Don't attempt to build-in all .dtb files
@ 2017-06-17 20:52   ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips; +Cc: Ralf Baechle, Paul Burton, Rahul Bedarkar

When building a FIT image we may want the kernel to build multiple .dtb
files, but we don't want to build them all into the kernel binary as
object files since they'll instead be included in the FIT image.

Commit daa10170da27 ("MIPS: DTS: img: add device tree for Marduk board")
however created arch/mips/boot/dts/img/Makefile with a line that builds
any enabled .dtb files into the kernel. Remove this & build the
pistachio object specifically, in preparation for adding .dtb targets
which we don't want to build into the kernel.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Rahul Bedarkar <rahul.bedarkar@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org

---

Changes in v5: None

Changes in v4:
- New patch.

Changes in v3: None
Changes in v2: None

 arch/mips/boot/dts/img/Makefile | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/mips/boot/dts/img/Makefile b/arch/mips/boot/dts/img/Makefile
index 69a65f0f82d2..c178cf56f5b8 100644
--- a/arch/mips/boot/dts/img/Makefile
+++ b/arch/mips/boot/dts/img/Makefile
@@ -1,6 +1,5 @@
 dtb-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb
-
-obj-y				+= $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+obj-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb.o
 
 # Force kbuild to make empty built-in.o if necessary
 obj-				+= dummy.o
-- 
2.13.1

^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [PATCH v5 3/4] MIPS: DTS: img: Don't attempt to build-in all .dtb files
@ 2017-06-17 20:52   ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips; +Cc: Ralf Baechle, Paul Burton, Rahul Bedarkar

When building a FIT image we may want the kernel to build multiple .dtb
files, but we don't want to build them all into the kernel binary as
object files since they'll instead be included in the FIT image.

Commit daa10170da27 ("MIPS: DTS: img: add device tree for Marduk board")
however created arch/mips/boot/dts/img/Makefile with a line that builds
any enabled .dtb files into the kernel. Remove this & build the
pistachio object specifically, in preparation for adding .dtb targets
which we don't want to build into the kernel.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Rahul Bedarkar <rahul.bedarkar@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org

---

Changes in v5: None

Changes in v4:
- New patch.

Changes in v3: None
Changes in v2: None

 arch/mips/boot/dts/img/Makefile | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/mips/boot/dts/img/Makefile b/arch/mips/boot/dts/img/Makefile
index 69a65f0f82d2..c178cf56f5b8 100644
--- a/arch/mips/boot/dts/img/Makefile
+++ b/arch/mips/boot/dts/img/Makefile
@@ -1,6 +1,5 @@
 dtb-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb
-
-obj-y				+= $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+obj-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb.o
 
 # Force kbuild to make empty built-in.o if necessary
 obj-				+= dummy.o
-- 
2.13.1

^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [PATCH v5 4/4] MIPS: generic: Support MIPS Boston development boards
@ 2017-06-17 20:52   ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips; +Cc: Ralf Baechle, Paul Burton

Add support for the MIPS Boston development board to generic kernels,
which essentially amounts to:

  - Adding the device tree source for the MIPS Boston board.

  - Adding a Kconfig fragment which enables the appropriate drivers for
    the MIPS Boston board.

With these changes in place generic kernels will support the board by
default, and kernels with only the drivers needed for Boston enabled can
be configured by setting BOARDS=boston during configuration. For
example:

  $ make ARCH=mips 64r6el_defconfig BOARDS=boston

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

---

Changes in v5:
- Adjust interrupt-map to match pcie-xilinx driver patchset changes.

Changes in v4:
- Most of the series already went in, rebase on v4.12-rc3.
- Adjust DT to move img,boston-clock under the plat_regs syscon node.
- Enable CONFIG_BLK_DEV_SD in board-boston.cfg to SATA disk access.
- Enable CONFIG_GPIOLIB so that the GPIO driver is actually enabled.
- Update MAINTAINERS entry.

Changes in v3: None
Changes in v2: None

 MAINTAINERS                                   |   2 +
 arch/mips/boot/dts/img/Makefile               |   2 +
 arch/mips/boot/dts/img/boston.dts             | 224 ++++++++++++++++++++++++++
 arch/mips/configs/generic/board-boston.config |  48 ++++++
 arch/mips/generic/Kconfig                     |  12 ++
 arch/mips/generic/vmlinux.its.S               |  25 +++
 6 files changed, 313 insertions(+)
 create mode 100644 arch/mips/boot/dts/img/boston.dts
 create mode 100644 arch/mips/configs/generic/board-boston.config

diff --git a/MAINTAINERS b/MAINTAINERS
index 2749877a4574..70acd8ee18ea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8503,6 +8503,8 @@ M:	Paul Burton <paul.burton@imgtec.com>
 L:	linux-mips@linux-mips.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
+F:	arch/mips/boot/dts/img/boston.dts
+F:	arch/mips/configs/generic/board-boston.config
 F:	drivers/clk/imgtec/clk-boston.c
 F:	include/dt-bindings/clock/boston-clock.h
 
diff --git a/arch/mips/boot/dts/img/Makefile b/arch/mips/boot/dts/img/Makefile
index c178cf56f5b8..3d70958d0f5a 100644
--- a/arch/mips/boot/dts/img/Makefile
+++ b/arch/mips/boot/dts/img/Makefile
@@ -1,3 +1,5 @@
+dtb-$(CONFIG_FIT_IMAGE_FDT_BOSTON)	+= boston.dtb
+
 dtb-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb
 obj-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb.o
 
diff --git a/arch/mips/boot/dts/img/boston.dts b/arch/mips/boot/dts/img/boston.dts
new file mode 100644
index 000000000000..53bfa29a7093
--- /dev/null
+++ b/arch/mips/boot/dts/img/boston.dts
@@ -0,0 +1,224 @@
+/dts-v1/;
+
+#include <dt-bindings/clock/boston-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/mips-gic.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "img,boston";
+
+	chosen {
+		stdout-path = "uart0:115200";
+	};
+
+	aliases {
+		uart0 = &uart0;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "img,mips";
+			reg = <0>;
+			clocks = <&clk_boston BOSTON_CLK_CPU>;
+		};
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x10000000>;
+	};
+
+	pci0: pci@10000000 {
+		compatible = "xlnx,axi-pcie-host-1.00.a";
+		device_type = "pci";
+		reg = <0x10000000 0x2000000>;
+
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <1>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
+
+		ranges = <0x02000000 0 0x40000000
+			  0x40000000 0 0x40000000>;
+
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pci0_intc 1>,
+				<0 0 0 2 &pci0_intc 2>,
+				<0 0 0 3 &pci0_intc 3>,
+				<0 0 0 4 &pci0_intc 4>;
+
+		pci0_intc: interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+	};
+
+	pci1: pci@12000000 {
+		compatible = "xlnx,axi-pcie-host-1.00.a";
+		device_type = "pci";
+		reg = <0x12000000 0x2000000>;
+
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <1>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
+
+		ranges = <0x02000000 0 0x20000000
+			  0x20000000 0 0x20000000>;
+
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pci1_intc 1>,
+				<0 0 0 2 &pci1_intc 2>,
+				<0 0 0 3 &pci1_intc 3>,
+				<0 0 0 4 &pci1_intc 4>;
+
+		pci1_intc: interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+	};
+
+	pci2: pci@14000000 {
+		compatible = "xlnx,axi-pcie-host-1.00.a";
+		device_type = "pci";
+		reg = <0x14000000 0x2000000>;
+
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <1>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
+
+		ranges = <0x02000000 0 0x16000000
+			  0x16000000 0 0x100000>;
+
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pci2_intc 1>,
+				<0 0 0 2 &pci2_intc 2>,
+				<0 0 0 3 &pci2_intc 3>,
+				<0 0 0 4 &pci2_intc 4>;
+
+		pci2_intc: interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+
+		pci2_root@0,0,0 {
+			compatible = "pci10ee,7021";
+			reg = <0x00000000 0 0 0 0>;
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+
+			eg20t_bridge@1,0,0 {
+				compatible = "pci8086,8800";
+				reg = <0x00010000 0 0 0 0>;
+
+				#address-cells = <3>;
+				#size-cells = <2>;
+				#interrupt-cells = <1>;
+
+				eg20t_mac@2,0,1 {
+					compatible = "pci8086,8802";
+					reg = <0x00020100 0 0 0 0>;
+					phy-reset-gpios = <&eg20t_gpio 6
+							   GPIO_ACTIVE_LOW>;
+				};
+
+				eg20t_gpio: eg20t_gpio@2,0,2 {
+					compatible = "pci8086,8803";
+					reg = <0x00020200 0 0 0 0>;
+
+					gpio-controller;
+					#gpio-cells = <2>;
+				};
+
+				eg20t_i2c@2,12,2 {
+					compatible = "pci8086,8817";
+					reg = <0x00026200 0 0 0 0>;
+
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					rtc@0x68 {
+						compatible = "st,m41t81s";
+						reg = <0x68>;
+					};
+				};
+			};
+		};
+	};
+
+	gic: interrupt-controller@16120000 {
+		compatible = "mti,gic";
+		reg = <0x16120000 0x20000>;
+
+		interrupt-controller;
+		#interrupt-cells = <3>;
+
+		timer {
+			compatible = "mti,gic-timer";
+			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
+			clocks = <&clk_boston BOSTON_CLK_CPU>;
+		};
+	};
+
+	cdmm@16140000 {
+		compatible = "mti,mips-cdmm";
+		reg = <0x16140000 0x8000>;
+	};
+
+	cpc@16200000 {
+		compatible = "mti,mips-cpc";
+		reg = <0x16200000 0x8000>;
+	};
+
+	plat_regs: system-controller@17ffd000 {
+		compatible = "img,boston-platform-regs", "syscon";
+		reg = <0x17ffd000 0x1000>;
+
+		clk_boston: clock {
+			compatible = "img,boston-clock";
+			#clock-cells = <1>;
+		};
+	};
+
+	reboot: syscon-reboot {
+		compatible = "syscon-reboot";
+		regmap = <&plat_regs>;
+		offset = <0x10>;
+		mask = <0x10>;
+	};
+
+	uart0: uart@17ffe000 {
+		compatible = "ns16550a";
+		reg = <0x17ffe000 0x1000>;
+		reg-shift = <2>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
+
+		clocks = <&clk_boston BOSTON_CLK_SYS>;
+	};
+
+	lcd: lcd@17fff000 {
+		compatible = "img,boston-lcd";
+		reg = <0x17fff000 0x8>;
+	};
+};
diff --git a/arch/mips/configs/generic/board-boston.config b/arch/mips/configs/generic/board-boston.config
new file mode 100644
index 000000000000..19560a45b683
--- /dev/null
+++ b/arch/mips/configs/generic/board-boston.config
@@ -0,0 +1,48 @@
+CONFIG_FIT_IMAGE_FDT_BOSTON=y
+
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+
+CONFIG_AUXDISPLAY=y
+CONFIG_IMG_ASCII_LCD=y
+
+CONFIG_COMMON_CLK_BOSTON=y
+
+CONFIG_DMADEVICES=y
+CONFIG_PCH_DMA=y
+
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_PCH=y
+
+CONFIG_I2C=y
+CONFIG_I2C_EG20T=y
+
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PCI=y
+
+CONFIG_NETDEVICES=y
+CONFIG_PCH_GBE=y
+
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCIE_XILINX=y
+
+CONFIG_PCH_PHUB=y
+
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_M41T80=y
+
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+
+CONFIG_SPI=y
+CONFIG_SPI_TOPCLIFF_PCH=y
+
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
index a606b3f9196c..3b74d4ed9140 100644
--- a/arch/mips/generic/Kconfig
+++ b/arch/mips/generic/Kconfig
@@ -9,6 +9,8 @@ config LEGACY_BOARDS
 	  kernel is booted without being provided with an FDT via the UHI
 	  boot protocol.
 
+comment "Legacy (non-UHI/non-FIT) Boards"
+
 config LEGACY_BOARD_SEAD3
 	bool "Support MIPS SEAD-3 boards"
 	select LEGACY_BOARDS
@@ -16,4 +18,14 @@ config LEGACY_BOARD_SEAD3
 	  Enable this to include support for booting on MIPS SEAD-3 FPGA-based
 	  development boards, which boot using a legacy boot protocol.
 
+comment "FIT/UHI Boards"
+
+config FIT_IMAGE_FDT_BOSTON
+	bool "Include FDT for MIPS Boston boards"
+	help
+	  Enable this to include the FDT for the MIPS Boston development board
+	  from Imagination Technologies in the FIT kernel image. You should
+	  enable this if you wish to boot on a MIPS Boston board, as it is
+	  expected by the bootloader.
+
 endif
diff --git a/arch/mips/generic/vmlinux.its.S b/arch/mips/generic/vmlinux.its.S
index f67fbf1c8541..3390e2f80b80 100644
--- a/arch/mips/generic/vmlinux.its.S
+++ b/arch/mips/generic/vmlinux.its.S
@@ -29,3 +29,28 @@
 		};
 	};
 };
+
+#ifdef CONFIG_FIT_IMAGE_FDT_BOSTON
+/ {
+	images {
+		fdt@boston {
+			description = "img,boston Device Tree";
+			data = /incbin/("boot/dts/img/boston.dtb");
+			type = "flat_dt";
+			arch = "mips";
+			compression = "none";
+			hash@0 {
+				algo = "sha1";
+			};
+		};
+	};
+
+	configurations {
+		conf@boston {
+			description = "Boston Linux kernel";
+			kernel = "kernel@0";
+			fdt = "fdt@boston";
+		};
+	};
+};
+#endif /* CONFIG_FIT_IMAGE_FDT_BOSTON */
-- 
2.13.1

^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [PATCH v5 4/4] MIPS: generic: Support MIPS Boston development boards
@ 2017-06-17 20:52   ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-17 20:52 UTC (permalink / raw)
  To: linux-mips; +Cc: Ralf Baechle, Paul Burton

Add support for the MIPS Boston development board to generic kernels,
which essentially amounts to:

  - Adding the device tree source for the MIPS Boston board.

  - Adding a Kconfig fragment which enables the appropriate drivers for
    the MIPS Boston board.

With these changes in place generic kernels will support the board by
default, and kernels with only the drivers needed for Boston enabled can
be configured by setting BOARDS=boston during configuration. For
example:

  $ make ARCH=mips 64r6el_defconfig BOARDS=boston

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

---

Changes in v5:
- Adjust interrupt-map to match pcie-xilinx driver patchset changes.

Changes in v4:
- Most of the series already went in, rebase on v4.12-rc3.
- Adjust DT to move img,boston-clock under the plat_regs syscon node.
- Enable CONFIG_BLK_DEV_SD in board-boston.cfg to SATA disk access.
- Enable CONFIG_GPIOLIB so that the GPIO driver is actually enabled.
- Update MAINTAINERS entry.

Changes in v3: None
Changes in v2: None

 MAINTAINERS                                   |   2 +
 arch/mips/boot/dts/img/Makefile               |   2 +
 arch/mips/boot/dts/img/boston.dts             | 224 ++++++++++++++++++++++++++
 arch/mips/configs/generic/board-boston.config |  48 ++++++
 arch/mips/generic/Kconfig                     |  12 ++
 arch/mips/generic/vmlinux.its.S               |  25 +++
 6 files changed, 313 insertions(+)
 create mode 100644 arch/mips/boot/dts/img/boston.dts
 create mode 100644 arch/mips/configs/generic/board-boston.config

diff --git a/MAINTAINERS b/MAINTAINERS
index 2749877a4574..70acd8ee18ea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8503,6 +8503,8 @@ M:	Paul Burton <paul.burton@imgtec.com>
 L:	linux-mips@linux-mips.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
+F:	arch/mips/boot/dts/img/boston.dts
+F:	arch/mips/configs/generic/board-boston.config
 F:	drivers/clk/imgtec/clk-boston.c
 F:	include/dt-bindings/clock/boston-clock.h
 
diff --git a/arch/mips/boot/dts/img/Makefile b/arch/mips/boot/dts/img/Makefile
index c178cf56f5b8..3d70958d0f5a 100644
--- a/arch/mips/boot/dts/img/Makefile
+++ b/arch/mips/boot/dts/img/Makefile
@@ -1,3 +1,5 @@
+dtb-$(CONFIG_FIT_IMAGE_FDT_BOSTON)	+= boston.dtb
+
 dtb-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb
 obj-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb.o
 
diff --git a/arch/mips/boot/dts/img/boston.dts b/arch/mips/boot/dts/img/boston.dts
new file mode 100644
index 000000000000..53bfa29a7093
--- /dev/null
+++ b/arch/mips/boot/dts/img/boston.dts
@@ -0,0 +1,224 @@
+/dts-v1/;
+
+#include <dt-bindings/clock/boston-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/mips-gic.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "img,boston";
+
+	chosen {
+		stdout-path = "uart0:115200";
+	};
+
+	aliases {
+		uart0 = &uart0;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "img,mips";
+			reg = <0>;
+			clocks = <&clk_boston BOSTON_CLK_CPU>;
+		};
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x10000000>;
+	};
+
+	pci0: pci@10000000 {
+		compatible = "xlnx,axi-pcie-host-1.00.a";
+		device_type = "pci";
+		reg = <0x10000000 0x2000000>;
+
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <1>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
+
+		ranges = <0x02000000 0 0x40000000
+			  0x40000000 0 0x40000000>;
+
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pci0_intc 1>,
+				<0 0 0 2 &pci0_intc 2>,
+				<0 0 0 3 &pci0_intc 3>,
+				<0 0 0 4 &pci0_intc 4>;
+
+		pci0_intc: interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+	};
+
+	pci1: pci@12000000 {
+		compatible = "xlnx,axi-pcie-host-1.00.a";
+		device_type = "pci";
+		reg = <0x12000000 0x2000000>;
+
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <1>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
+
+		ranges = <0x02000000 0 0x20000000
+			  0x20000000 0 0x20000000>;
+
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pci1_intc 1>,
+				<0 0 0 2 &pci1_intc 2>,
+				<0 0 0 3 &pci1_intc 3>,
+				<0 0 0 4 &pci1_intc 4>;
+
+		pci1_intc: interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+	};
+
+	pci2: pci@14000000 {
+		compatible = "xlnx,axi-pcie-host-1.00.a";
+		device_type = "pci";
+		reg = <0x14000000 0x2000000>;
+
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <1>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
+
+		ranges = <0x02000000 0 0x16000000
+			  0x16000000 0 0x100000>;
+
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pci2_intc 1>,
+				<0 0 0 2 &pci2_intc 2>,
+				<0 0 0 3 &pci2_intc 3>,
+				<0 0 0 4 &pci2_intc 4>;
+
+		pci2_intc: interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+
+		pci2_root@0,0,0 {
+			compatible = "pci10ee,7021";
+			reg = <0x00000000 0 0 0 0>;
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+
+			eg20t_bridge@1,0,0 {
+				compatible = "pci8086,8800";
+				reg = <0x00010000 0 0 0 0>;
+
+				#address-cells = <3>;
+				#size-cells = <2>;
+				#interrupt-cells = <1>;
+
+				eg20t_mac@2,0,1 {
+					compatible = "pci8086,8802";
+					reg = <0x00020100 0 0 0 0>;
+					phy-reset-gpios = <&eg20t_gpio 6
+							   GPIO_ACTIVE_LOW>;
+				};
+
+				eg20t_gpio: eg20t_gpio@2,0,2 {
+					compatible = "pci8086,8803";
+					reg = <0x00020200 0 0 0 0>;
+
+					gpio-controller;
+					#gpio-cells = <2>;
+				};
+
+				eg20t_i2c@2,12,2 {
+					compatible = "pci8086,8817";
+					reg = <0x00026200 0 0 0 0>;
+
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					rtc@0x68 {
+						compatible = "st,m41t81s";
+						reg = <0x68>;
+					};
+				};
+			};
+		};
+	};
+
+	gic: interrupt-controller@16120000 {
+		compatible = "mti,gic";
+		reg = <0x16120000 0x20000>;
+
+		interrupt-controller;
+		#interrupt-cells = <3>;
+
+		timer {
+			compatible = "mti,gic-timer";
+			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
+			clocks = <&clk_boston BOSTON_CLK_CPU>;
+		};
+	};
+
+	cdmm@16140000 {
+		compatible = "mti,mips-cdmm";
+		reg = <0x16140000 0x8000>;
+	};
+
+	cpc@16200000 {
+		compatible = "mti,mips-cpc";
+		reg = <0x16200000 0x8000>;
+	};
+
+	plat_regs: system-controller@17ffd000 {
+		compatible = "img,boston-platform-regs", "syscon";
+		reg = <0x17ffd000 0x1000>;
+
+		clk_boston: clock {
+			compatible = "img,boston-clock";
+			#clock-cells = <1>;
+		};
+	};
+
+	reboot: syscon-reboot {
+		compatible = "syscon-reboot";
+		regmap = <&plat_regs>;
+		offset = <0x10>;
+		mask = <0x10>;
+	};
+
+	uart0: uart@17ffe000 {
+		compatible = "ns16550a";
+		reg = <0x17ffe000 0x1000>;
+		reg-shift = <2>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
+
+		clocks = <&clk_boston BOSTON_CLK_SYS>;
+	};
+
+	lcd: lcd@17fff000 {
+		compatible = "img,boston-lcd";
+		reg = <0x17fff000 0x8>;
+	};
+};
diff --git a/arch/mips/configs/generic/board-boston.config b/arch/mips/configs/generic/board-boston.config
new file mode 100644
index 000000000000..19560a45b683
--- /dev/null
+++ b/arch/mips/configs/generic/board-boston.config
@@ -0,0 +1,48 @@
+CONFIG_FIT_IMAGE_FDT_BOSTON=y
+
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+
+CONFIG_AUXDISPLAY=y
+CONFIG_IMG_ASCII_LCD=y
+
+CONFIG_COMMON_CLK_BOSTON=y
+
+CONFIG_DMADEVICES=y
+CONFIG_PCH_DMA=y
+
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_PCH=y
+
+CONFIG_I2C=y
+CONFIG_I2C_EG20T=y
+
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PCI=y
+
+CONFIG_NETDEVICES=y
+CONFIG_PCH_GBE=y
+
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCIE_XILINX=y
+
+CONFIG_PCH_PHUB=y
+
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_M41T80=y
+
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+
+CONFIG_SPI=y
+CONFIG_SPI_TOPCLIFF_PCH=y
+
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
index a606b3f9196c..3b74d4ed9140 100644
--- a/arch/mips/generic/Kconfig
+++ b/arch/mips/generic/Kconfig
@@ -9,6 +9,8 @@ config LEGACY_BOARDS
 	  kernel is booted without being provided with an FDT via the UHI
 	  boot protocol.
 
+comment "Legacy (non-UHI/non-FIT) Boards"
+
 config LEGACY_BOARD_SEAD3
 	bool "Support MIPS SEAD-3 boards"
 	select LEGACY_BOARDS
@@ -16,4 +18,14 @@ config LEGACY_BOARD_SEAD3
 	  Enable this to include support for booting on MIPS SEAD-3 FPGA-based
 	  development boards, which boot using a legacy boot protocol.
 
+comment "FIT/UHI Boards"
+
+config FIT_IMAGE_FDT_BOSTON
+	bool "Include FDT for MIPS Boston boards"
+	help
+	  Enable this to include the FDT for the MIPS Boston development board
+	  from Imagination Technologies in the FIT kernel image. You should
+	  enable this if you wish to boot on a MIPS Boston board, as it is
+	  expected by the bootloader.
+
 endif
diff --git a/arch/mips/generic/vmlinux.its.S b/arch/mips/generic/vmlinux.its.S
index f67fbf1c8541..3390e2f80b80 100644
--- a/arch/mips/generic/vmlinux.its.S
+++ b/arch/mips/generic/vmlinux.its.S
@@ -29,3 +29,28 @@
 		};
 	};
 };
+
+#ifdef CONFIG_FIT_IMAGE_FDT_BOSTON
+/ {
+	images {
+		fdt@boston {
+			description = "img,boston Device Tree";
+			data = /incbin/("boot/dts/img/boston.dtb");
+			type = "flat_dt";
+			arch = "mips";
+			compression = "none";
+			hash@0 {
+				algo = "sha1";
+			};
+		};
+	};
+
+	configurations {
+		conf@boston {
+			description = "Boston Linux kernel";
+			kernel = "kernel@0";
+			fdt = "fdt@boston";
+		};
+	};
+};
+#endif /* CONFIG_FIT_IMAGE_FDT_BOSTON */
-- 
2.13.1

^ permalink raw reply related	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
  2017-06-17 20:52   ` Paul Burton
  (?)
@ 2017-06-20  0:26   ` Stephen Boyd
  2017-06-20 16:45       ` Paul Burton
  -1 siblings, 1 reply; 21+ messages in thread
From: Stephen Boyd @ 2017-06-20  0:26 UTC (permalink / raw)
  To: Paul Burton; +Cc: linux-mips, Ralf Baechle, Michael Turquette, linux-clk

On 06/17, Paul Burton wrote:
> Add a driver for the clocks provided by the MIPS Boston board from
> Imagination Technologies. 2 clocks are provided - the system clock & the
> CPU clock - and each is a simple fixed rate clock whose frequency can be
> determined by reading a register provided by the board.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: linux-clk@vger.kernel.org
> Cc: linux-mips@linux-mips.org
> 
> ---

Acked-by: Stephen Boyd <sboyd@codeaurora.org>

Unless you wanted this to go through the clk tree?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 1/4] dt-bindings: Document img,boston-clock binding
  2017-06-17 20:52   ` Paul Burton
  (?)
@ 2017-06-20  0:27   ` Stephen Boyd
  -1 siblings, 0 replies; 21+ messages in thread
From: Stephen Boyd @ 2017-06-20  0:27 UTC (permalink / raw)
  To: Paul Burton
  Cc: linux-mips, Ralf Baechle, Frank Rowand, Michael Turquette,
	Rob Herring, devicetree, linux-clk

On 06/17, Paul Burton wrote:
> Add device tree binding documentation for the clocks provided by the
> MIPS Boston development board from Imagination Technologies, and a
> header file describing the available clocks for use by device trees &
> driver.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Frank Rowand <frowand.list@gmail.com>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-clk@vger.kernel.org
> Cc: linux-mips@linux-mips.org
> 
> ---

Acked-by: Stephen Boyd <sboyd@codeaurora.org>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
@ 2017-06-20 16:45       ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-20 16:45 UTC (permalink / raw)
  To: Stephen Boyd, Ralf Baechle; +Cc: linux-mips, Michael Turquette, linux-clk

[-- Attachment #1: Type: text/plain, Size: 887 bytes --]

On Monday, 19 June 2017 17:26:51 PDT Stephen Boyd wrote:
> On 06/17, Paul Burton wrote:
> > Add a driver for the clocks provided by the MIPS Boston board from
> > Imagination Technologies. 2 clocks are provided - the system clock & the
> > CPU clock - and each is a simple fixed rate clock whose frequency can be
> > determined by reading a register provided by the board.
> > 
> > Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> > Cc: Michael Turquette <mturquette@baylibre.com>
> > Cc: Ralf Baechle <ralf@linux-mips.org>
> > Cc: Stephen Boyd <sboyd@codeaurora.org>
> > Cc: linux-clk@vger.kernel.org
> > Cc: linux-mips@linux-mips.org
> > 
> > ---
> 
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> 
> Unless you wanted this to go through the clk tree?

Thanks Stephen.

Ralf: are you happy to take this through the MIPS tree along with the rest of 
the series?

Thanks,
    Paul

[-- Attachment #2: This is a digitally signed message part. --]
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^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
@ 2017-06-20 16:45       ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-20 16:45 UTC (permalink / raw)
  To: Stephen Boyd, Ralf Baechle; +Cc: linux-mips, Michael Turquette, linux-clk

[-- Attachment #1: Type: text/plain, Size: 887 bytes --]

On Monday, 19 June 2017 17:26:51 PDT Stephen Boyd wrote:
> On 06/17, Paul Burton wrote:
> > Add a driver for the clocks provided by the MIPS Boston board from
> > Imagination Technologies. 2 clocks are provided - the system clock & the
> > CPU clock - and each is a simple fixed rate clock whose frequency can be
> > determined by reading a register provided by the board.
> > 
> > Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> > Cc: Michael Turquette <mturquette@baylibre.com>
> > Cc: Ralf Baechle <ralf@linux-mips.org>
> > Cc: Stephen Boyd <sboyd@codeaurora.org>
> > Cc: linux-clk@vger.kernel.org
> > Cc: linux-mips@linux-mips.org
> > 
> > ---
> 
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> 
> Unless you wanted this to go through the clk tree?

Thanks Stephen.

Ralf: are you happy to take this through the MIPS tree along with the rest of 
the series?

Thanks,
    Paul

[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 1/4] dt-bindings: Document img,boston-clock binding
  2017-06-17 20:52   ` Paul Burton
  (?)
  (?)
@ 2017-06-22 20:56   ` Rob Herring
  2017-06-22 21:36       ` Paul Burton
  -1 siblings, 1 reply; 21+ messages in thread
From: Rob Herring @ 2017-06-22 20:56 UTC (permalink / raw)
  To: Paul Burton
  Cc: linux-mips, Ralf Baechle, Frank Rowand, Michael Turquette,
	Stephen Boyd, devicetree, linux-clk

On Sat, Jun 17, 2017 at 01:52:46PM -0700, Paul Burton wrote:
> Add device tree binding documentation for the clocks provided by the
> MIPS Boston development board from Imagination Technologies, and a
> header file describing the available clocks for use by device trees &
> driver.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Frank Rowand <frowand.list@gmail.com>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-clk@vger.kernel.org
> Cc: linux-mips@linux-mips.org
> 
> ---
> 
> Changes in v5: None

I reviewed v4. Please add acks/reviewed-by when posting new versions.

> 
> Changes in v4:
> - Move img,boston-clock node under platform register syscon node.
> - Add MAINTAINERS entry.
> 
> Changes in v3: None
> 
> Changes in v2:
> - Add BOSTON_CLK_INPUT to expose the input clock.
> 
>  .../devicetree/bindings/clock/img,boston-clock.txt | 31 ++++++++++++++++++++++
>  MAINTAINERS                                        |  7 +++++
>  include/dt-bindings/clock/boston-clock.h           | 14 ++++++++++
>  3 files changed, 52 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/img,boston-clock.txt
>  create mode 100644 include/dt-bindings/clock/boston-clock.h

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 1/4] dt-bindings: Document img,boston-clock binding
  2017-06-22 20:56   ` Rob Herring
@ 2017-06-22 21:36       ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-22 21:36 UTC (permalink / raw)
  To: Rob Herring
  Cc: linux-mips, Ralf Baechle, Frank Rowand, Michael Turquette,
	Stephen Boyd, devicetree, linux-clk

[-- Attachment #1: Type: text/plain, Size: 1585 bytes --]

Hi Rob,

On Thursday, 22 June 2017 13:56:55 PDT Rob Herring wrote:
> On Sat, Jun 17, 2017 at 01:52:46PM -0700, Paul Burton wrote:
> > Add device tree binding documentation for the clocks provided by the
> > MIPS Boston development board from Imagination Technologies, and a
> > header file describing the available clocks for use by device trees &
> > driver.
> > 
> > Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> > Cc: Frank Rowand <frowand.list@gmail.com>
> > Cc: Michael Turquette <mturquette@baylibre.com>
> > Cc: Ralf Baechle <ralf@linux-mips.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Stephen Boyd <sboyd@codeaurora.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-clk@vger.kernel.org
> > Cc: linux-mips@linux-mips.org
> > 
> > ---
> > 
> > Changes in v5: None
> 
> I reviewed v4. Please add acks/reviewed-by when posting new versions.

Apologies, this one slipped by unnoticed.

Thanks,
    Paul

> 
> > Changes in v4:
> > - Move img,boston-clock node under platform register syscon node.
> > - Add MAINTAINERS entry.
> > 
> > Changes in v3: None
> > 
> > Changes in v2:
> > - Add BOSTON_CLK_INPUT to expose the input clock.
> > 
> >  .../devicetree/bindings/clock/img,boston-clock.txt | 31
> >  ++++++++++++++++++++++ MAINTAINERS                                      
> >   |  7 +++++
> >  include/dt-bindings/clock/boston-clock.h           | 14 ++++++++++
> >  3 files changed, 52 insertions(+)
> >  create mode 100644
> >  Documentation/devicetree/bindings/clock/img,boston-clock.txt create mode
> >  100644 include/dt-bindings/clock/boston-clock.h


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^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 1/4] dt-bindings: Document img,boston-clock binding
@ 2017-06-22 21:36       ` Paul Burton
  0 siblings, 0 replies; 21+ messages in thread
From: Paul Burton @ 2017-06-22 21:36 UTC (permalink / raw)
  To: Rob Herring
  Cc: linux-mips, Ralf Baechle, Frank Rowand, Michael Turquette,
	Stephen Boyd, devicetree, linux-clk

[-- Attachment #1: Type: text/plain, Size: 1585 bytes --]

Hi Rob,

On Thursday, 22 June 2017 13:56:55 PDT Rob Herring wrote:
> On Sat, Jun 17, 2017 at 01:52:46PM -0700, Paul Burton wrote:
> > Add device tree binding documentation for the clocks provided by the
> > MIPS Boston development board from Imagination Technologies, and a
> > header file describing the available clocks for use by device trees &
> > driver.
> > 
> > Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> > Cc: Frank Rowand <frowand.list@gmail.com>
> > Cc: Michael Turquette <mturquette@baylibre.com>
> > Cc: Ralf Baechle <ralf@linux-mips.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Stephen Boyd <sboyd@codeaurora.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-clk@vger.kernel.org
> > Cc: linux-mips@linux-mips.org
> > 
> > ---
> > 
> > Changes in v5: None
> 
> I reviewed v4. Please add acks/reviewed-by when posting new versions.

Apologies, this one slipped by unnoticed.

Thanks,
    Paul

> 
> > Changes in v4:
> > - Move img,boston-clock node under platform register syscon node.
> > - Add MAINTAINERS entry.
> > 
> > Changes in v3: None
> > 
> > Changes in v2:
> > - Add BOSTON_CLK_INPUT to expose the input clock.
> > 
> >  .../devicetree/bindings/clock/img,boston-clock.txt | 31
> >  ++++++++++++++++++++++ MAINTAINERS                                      
> >   |  7 +++++
> >  include/dt-bindings/clock/boston-clock.h           | 14 ++++++++++
> >  3 files changed, 52 insertions(+)
> >  create mode 100644
> >  Documentation/devicetree/bindings/clock/img,boston-clock.txt create mode
> >  100644 include/dt-bindings/clock/boston-clock.h


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^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
@ 2017-06-23 22:20     ` James Hogan
  0 siblings, 0 replies; 21+ messages in thread
From: James Hogan @ 2017-06-23 22:20 UTC (permalink / raw)
  To: Paul Burton
  Cc: linux-mips, Ralf Baechle, Michael Turquette, Stephen Boyd, linux-clk

[-- Attachment #1: Type: text/plain, Size: 7549 bytes --]

On Sat, Jun 17, 2017 at 01:52:47PM -0700, Paul Burton wrote:
> Add a driver for the clocks provided by the MIPS Boston board from
> Imagination Technologies. 2 clocks are provided - the system clock & the
> CPU clock - and each is a simple fixed rate clock whose frequency can be
> determined by reading a register provided by the board.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: linux-clk@vger.kernel.org
> Cc: linux-mips@linux-mips.org

FWIW
Reviewed-by: James Hogan <james.hogan@imgtec.com>

Cheers
James

> 
> ---
> 
> Changes in v5:
> - Use struct clk_hw rather than struct clk.
> - Comment on reasoning for use of CLK_OF_DECLARE.
> - Drop depends on OF from Kconfig.
> - Define pr_fmt to get clearer error messages.
> 
> Changes in v4:
> - Adjust to expect the parent node to be the syscon.
> - Update MAINTAINERS entry.
> 
> Changes in v3: None
> 
> Changes in v2:
> - Support BOSTON_CLK_INPUT.
> - Register clocks with clk_register_fixed_rate during boot, removing need for clk_ops.
> - s/uint32_t/u32/.
> - Move driver to a vendor directory.
> 
>  MAINTAINERS                     |   1 +
>  drivers/clk/Kconfig             |   1 +
>  drivers/clk/Makefile            |   1 +
>  drivers/clk/imgtec/Kconfig      |   9 ++++
>  drivers/clk/imgtec/Makefile     |   1 +
>  drivers/clk/imgtec/clk-boston.c | 103 ++++++++++++++++++++++++++++++++++++++++
>  6 files changed, 116 insertions(+)
>  create mode 100644 drivers/clk/imgtec/Kconfig
>  create mode 100644 drivers/clk/imgtec/Makefile
>  create mode 100644 drivers/clk/imgtec/clk-boston.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6a341862f5d6..2749877a4574 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8503,6 +8503,7 @@ M:	Paul Burton <paul.burton@imgtec.com>
>  L:	linux-mips@linux-mips.org
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
> +F:	drivers/clk/imgtec/clk-boston.c
>  F:	include/dt-bindings/clock/boston-clock.h
>  
>  MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 36cfea38135f..251a22139e73 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -219,6 +219,7 @@ config COMMON_CLK_VC5
>  
>  source "drivers/clk/bcm/Kconfig"
>  source "drivers/clk/hisilicon/Kconfig"
> +source "drivers/clk/imgtec/Kconfig"
>  source "drivers/clk/mediatek/Kconfig"
>  source "drivers/clk/meson/Kconfig"
>  source "drivers/clk/mvebu/Kconfig"
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index c19983afcb81..a4a7c5df8b93 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -59,6 +59,7 @@ obj-y					+= bcm/
>  obj-$(CONFIG_ARCH_BERLIN)		+= berlin/
>  obj-$(CONFIG_H8300)			+= h8300/
>  obj-$(CONFIG_ARCH_HISI)			+= hisilicon/
> +obj-y					+= imgtec/
>  obj-$(CONFIG_ARCH_MXC)			+= imx/
>  obj-$(CONFIG_MACH_INGENIC)		+= ingenic/
>  obj-$(CONFIG_COMMON_CLK_KEYSTONE)	+= keystone/
> diff --git a/drivers/clk/imgtec/Kconfig b/drivers/clk/imgtec/Kconfig
> new file mode 100644
> index 000000000000..f6dcb748e9c4
> --- /dev/null
> +++ b/drivers/clk/imgtec/Kconfig
> @@ -0,0 +1,9 @@
> +config COMMON_CLK_BOSTON
> +	bool "Clock driver for MIPS Boston boards"
> +	depends on MIPS || COMPILE_TEST
> +	select MFD_SYSCON
> +	---help---
> +	  Enable this to support the system & CPU clocks on the MIPS Boston
> +	  development board from Imagination Technologies. These are simple
> +	  fixed rate clocks whose rate is determined by reading a platform
> +	  provided register.
> diff --git a/drivers/clk/imgtec/Makefile b/drivers/clk/imgtec/Makefile
> new file mode 100644
> index 000000000000..ac779b8c22f2
> --- /dev/null
> +++ b/drivers/clk/imgtec/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_COMMON_CLK_BOSTON)		+= clk-boston.o
> diff --git a/drivers/clk/imgtec/clk-boston.c b/drivers/clk/imgtec/clk-boston.c
> new file mode 100644
> index 000000000000..f18f10351785
> --- /dev/null
> +++ b/drivers/clk/imgtec/clk-boston.c
> @@ -0,0 +1,103 @@
> +/*
> + * Copyright (C) 2016-2017 Imagination Technologies
> + * Author: Paul Burton <paul.burton@imgtec.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation;  either version 2 of the  License, or (at your
> + * option) any later version.
> + */
> +
> +#define pr_fmt(fmt) "clk-boston: " fmt
> +
> +#include <linux/clk-provider.h>
> +#include <linux/kernel.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +#include <linux/mfd/syscon.h>
> +
> +#include <dt-bindings/clock/boston-clock.h>
> +
> +#define BOSTON_PLAT_MMCMDIV		0x30
> +# define BOSTON_PLAT_MMCMDIV_CLK0DIV	(0xff << 0)
> +# define BOSTON_PLAT_MMCMDIV_INPUT	(0xff << 8)
> +# define BOSTON_PLAT_MMCMDIV_MUL	(0xff << 16)
> +# define BOSTON_PLAT_MMCMDIV_CLK1DIV	(0xff << 24)
> +
> +#define BOSTON_CLK_COUNT 3
> +
> +static u32 ext_field(u32 val, u32 mask)
> +{
> +	return (val & mask) >> (ffs(mask) - 1);
> +}
> +
> +static void __init clk_boston_setup(struct device_node *np)
> +{
> +	unsigned long in_freq, cpu_freq, sys_freq;
> +	uint mmcmdiv, mul, cpu_div, sys_div;
> +	struct clk_hw_onecell_data *onecell;
> +	struct regmap *regmap;
> +	struct clk_hw *hw;
> +	int err;
> +
> +	regmap = syscon_node_to_regmap(np->parent);
> +	if (IS_ERR(regmap)) {
> +		pr_err("failed to find regmap\n");
> +		return;
> +	}
> +
> +	err = regmap_read(regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);
> +	if (err) {
> +		pr_err("failed to read mmcm_div register: %d\n", err);
> +		return;
> +	}
> +
> +	in_freq = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT) * 1000000;
> +	mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
> +
> +	sys_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);
> +	sys_freq = mult_frac(in_freq, mul, sys_div);
> +
> +	cpu_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);
> +	cpu_freq = mult_frac(in_freq, mul, cpu_div);
> +
> +	onecell = kzalloc(sizeof(*onecell) +
> +			  (BOSTON_CLK_COUNT * sizeof(struct clk_hw *)),
> +			  GFP_KERNEL);
> +	if (!onecell)
> +		return;
> +
> +	onecell->num = BOSTON_CLK_COUNT;
> +
> +	hw = clk_hw_register_fixed_rate(NULL, "input", NULL, 0, in_freq);
> +	if (IS_ERR(hw)) {
> +		pr_err("failed to register input clock: %ld\n", PTR_ERR(hw));
> +		return;
> +	}
> +	onecell->hws[BOSTON_CLK_INPUT] = hw;
> +
> +	hw = clk_hw_register_fixed_rate(NULL, "sys", "input", 0, sys_freq);
> +	if (IS_ERR(hw)) {
> +		pr_err("failed to register sys clock: %ld\n", PTR_ERR(hw));
> +		return;
> +	}
> +	onecell->hws[BOSTON_CLK_SYS] = hw;
> +
> +	hw = clk_hw_register_fixed_rate(NULL, "cpu", "input", 0, cpu_freq);
> +	if (IS_ERR(hw)) {
> +		pr_err("failed to register cpu clock: %ld\n", PTR_ERR(hw));
> +		return;
> +	}
> +	onecell->hws[BOSTON_CLK_CPU] = hw;
> +
> +	err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, onecell);
> +	if (err)
> +		pr_err("failed to add DT provider: %d\n", err);
> +}
> +
> +/*
> + * Use CLK_OF_DECLARE so that this driver is probed early enough to provide the
> + * CPU frequency for use with the GIC or cop0 counters/timers.
> + */
> +CLK_OF_DECLARE(clk_boston, "img,boston-clock", clk_boston_setup);
> -- 
> 2.13.1
> 
> 

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
@ 2017-06-23 22:20     ` James Hogan
  0 siblings, 0 replies; 21+ messages in thread
From: James Hogan @ 2017-06-23 22:20 UTC (permalink / raw)
  To: Paul Burton
  Cc: linux-mips, Ralf Baechle, Michael Turquette, Stephen Boyd, linux-clk

[-- Attachment #1: Type: text/plain, Size: 7549 bytes --]

On Sat, Jun 17, 2017 at 01:52:47PM -0700, Paul Burton wrote:
> Add a driver for the clocks provided by the MIPS Boston board from
> Imagination Technologies. 2 clocks are provided - the system clock & the
> CPU clock - and each is a simple fixed rate clock whose frequency can be
> determined by reading a register provided by the board.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: linux-clk@vger.kernel.org
> Cc: linux-mips@linux-mips.org

FWIW
Reviewed-by: James Hogan <james.hogan@imgtec.com>

Cheers
James

> 
> ---
> 
> Changes in v5:
> - Use struct clk_hw rather than struct clk.
> - Comment on reasoning for use of CLK_OF_DECLARE.
> - Drop depends on OF from Kconfig.
> - Define pr_fmt to get clearer error messages.
> 
> Changes in v4:
> - Adjust to expect the parent node to be the syscon.
> - Update MAINTAINERS entry.
> 
> Changes in v3: None
> 
> Changes in v2:
> - Support BOSTON_CLK_INPUT.
> - Register clocks with clk_register_fixed_rate during boot, removing need for clk_ops.
> - s/uint32_t/u32/.
> - Move driver to a vendor directory.
> 
>  MAINTAINERS                     |   1 +
>  drivers/clk/Kconfig             |   1 +
>  drivers/clk/Makefile            |   1 +
>  drivers/clk/imgtec/Kconfig      |   9 ++++
>  drivers/clk/imgtec/Makefile     |   1 +
>  drivers/clk/imgtec/clk-boston.c | 103 ++++++++++++++++++++++++++++++++++++++++
>  6 files changed, 116 insertions(+)
>  create mode 100644 drivers/clk/imgtec/Kconfig
>  create mode 100644 drivers/clk/imgtec/Makefile
>  create mode 100644 drivers/clk/imgtec/clk-boston.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6a341862f5d6..2749877a4574 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8503,6 +8503,7 @@ M:	Paul Burton <paul.burton@imgtec.com>
>  L:	linux-mips@linux-mips.org
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
> +F:	drivers/clk/imgtec/clk-boston.c
>  F:	include/dt-bindings/clock/boston-clock.h
>  
>  MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 36cfea38135f..251a22139e73 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -219,6 +219,7 @@ config COMMON_CLK_VC5
>  
>  source "drivers/clk/bcm/Kconfig"
>  source "drivers/clk/hisilicon/Kconfig"
> +source "drivers/clk/imgtec/Kconfig"
>  source "drivers/clk/mediatek/Kconfig"
>  source "drivers/clk/meson/Kconfig"
>  source "drivers/clk/mvebu/Kconfig"
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index c19983afcb81..a4a7c5df8b93 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -59,6 +59,7 @@ obj-y					+= bcm/
>  obj-$(CONFIG_ARCH_BERLIN)		+= berlin/
>  obj-$(CONFIG_H8300)			+= h8300/
>  obj-$(CONFIG_ARCH_HISI)			+= hisilicon/
> +obj-y					+= imgtec/
>  obj-$(CONFIG_ARCH_MXC)			+= imx/
>  obj-$(CONFIG_MACH_INGENIC)		+= ingenic/
>  obj-$(CONFIG_COMMON_CLK_KEYSTONE)	+= keystone/
> diff --git a/drivers/clk/imgtec/Kconfig b/drivers/clk/imgtec/Kconfig
> new file mode 100644
> index 000000000000..f6dcb748e9c4
> --- /dev/null
> +++ b/drivers/clk/imgtec/Kconfig
> @@ -0,0 +1,9 @@
> +config COMMON_CLK_BOSTON
> +	bool "Clock driver for MIPS Boston boards"
> +	depends on MIPS || COMPILE_TEST
> +	select MFD_SYSCON
> +	---help---
> +	  Enable this to support the system & CPU clocks on the MIPS Boston
> +	  development board from Imagination Technologies. These are simple
> +	  fixed rate clocks whose rate is determined by reading a platform
> +	  provided register.
> diff --git a/drivers/clk/imgtec/Makefile b/drivers/clk/imgtec/Makefile
> new file mode 100644
> index 000000000000..ac779b8c22f2
> --- /dev/null
> +++ b/drivers/clk/imgtec/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_COMMON_CLK_BOSTON)		+= clk-boston.o
> diff --git a/drivers/clk/imgtec/clk-boston.c b/drivers/clk/imgtec/clk-boston.c
> new file mode 100644
> index 000000000000..f18f10351785
> --- /dev/null
> +++ b/drivers/clk/imgtec/clk-boston.c
> @@ -0,0 +1,103 @@
> +/*
> + * Copyright (C) 2016-2017 Imagination Technologies
> + * Author: Paul Burton <paul.burton@imgtec.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation;  either version 2 of the  License, or (at your
> + * option) any later version.
> + */
> +
> +#define pr_fmt(fmt) "clk-boston: " fmt
> +
> +#include <linux/clk-provider.h>
> +#include <linux/kernel.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +#include <linux/mfd/syscon.h>
> +
> +#include <dt-bindings/clock/boston-clock.h>
> +
> +#define BOSTON_PLAT_MMCMDIV		0x30
> +# define BOSTON_PLAT_MMCMDIV_CLK0DIV	(0xff << 0)
> +# define BOSTON_PLAT_MMCMDIV_INPUT	(0xff << 8)
> +# define BOSTON_PLAT_MMCMDIV_MUL	(0xff << 16)
> +# define BOSTON_PLAT_MMCMDIV_CLK1DIV	(0xff << 24)
> +
> +#define BOSTON_CLK_COUNT 3
> +
> +static u32 ext_field(u32 val, u32 mask)
> +{
> +	return (val & mask) >> (ffs(mask) - 1);
> +}
> +
> +static void __init clk_boston_setup(struct device_node *np)
> +{
> +	unsigned long in_freq, cpu_freq, sys_freq;
> +	uint mmcmdiv, mul, cpu_div, sys_div;
> +	struct clk_hw_onecell_data *onecell;
> +	struct regmap *regmap;
> +	struct clk_hw *hw;
> +	int err;
> +
> +	regmap = syscon_node_to_regmap(np->parent);
> +	if (IS_ERR(regmap)) {
> +		pr_err("failed to find regmap\n");
> +		return;
> +	}
> +
> +	err = regmap_read(regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);
> +	if (err) {
> +		pr_err("failed to read mmcm_div register: %d\n", err);
> +		return;
> +	}
> +
> +	in_freq = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT) * 1000000;
> +	mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
> +
> +	sys_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);
> +	sys_freq = mult_frac(in_freq, mul, sys_div);
> +
> +	cpu_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);
> +	cpu_freq = mult_frac(in_freq, mul, cpu_div);
> +
> +	onecell = kzalloc(sizeof(*onecell) +
> +			  (BOSTON_CLK_COUNT * sizeof(struct clk_hw *)),
> +			  GFP_KERNEL);
> +	if (!onecell)
> +		return;
> +
> +	onecell->num = BOSTON_CLK_COUNT;
> +
> +	hw = clk_hw_register_fixed_rate(NULL, "input", NULL, 0, in_freq);
> +	if (IS_ERR(hw)) {
> +		pr_err("failed to register input clock: %ld\n", PTR_ERR(hw));
> +		return;
> +	}
> +	onecell->hws[BOSTON_CLK_INPUT] = hw;
> +
> +	hw = clk_hw_register_fixed_rate(NULL, "sys", "input", 0, sys_freq);
> +	if (IS_ERR(hw)) {
> +		pr_err("failed to register sys clock: %ld\n", PTR_ERR(hw));
> +		return;
> +	}
> +	onecell->hws[BOSTON_CLK_SYS] = hw;
> +
> +	hw = clk_hw_register_fixed_rate(NULL, "cpu", "input", 0, cpu_freq);
> +	if (IS_ERR(hw)) {
> +		pr_err("failed to register cpu clock: %ld\n", PTR_ERR(hw));
> +		return;
> +	}
> +	onecell->hws[BOSTON_CLK_CPU] = hw;
> +
> +	err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, onecell);
> +	if (err)
> +		pr_err("failed to add DT provider: %d\n", err);
> +}
> +
> +/*
> + * Use CLK_OF_DECLARE so that this driver is probed early enough to provide the
> + * CPU frequency for use with the GIC or cop0 counters/timers.
> + */
> +CLK_OF_DECLARE(clk_boston, "img,boston-clock", clk_boston_setup);
> -- 
> 2.13.1
> 
> 

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 4/4] MIPS: generic: Support MIPS Boston development boards
@ 2017-06-23 22:28     ` James Hogan
  0 siblings, 0 replies; 21+ messages in thread
From: James Hogan @ 2017-06-23 22:28 UTC (permalink / raw)
  To: Paul Burton; +Cc: linux-mips, Ralf Baechle

[-- Attachment #1: Type: text/plain, Size: 11327 bytes --]

On Sat, Jun 17, 2017 at 01:52:49PM -0700, Paul Burton wrote:
> Add support for the MIPS Boston development board to generic kernels,
> which essentially amounts to:
> 
>   - Adding the device tree source for the MIPS Boston board.
> 
>   - Adding a Kconfig fragment which enables the appropriate drivers for
>     the MIPS Boston board.
> 
> With these changes in place generic kernels will support the board by
> default, and kernels with only the drivers needed for Boston enabled can
> be configured by setting BOARDS=boston during configuration. For
> example:
> 
>   $ make ARCH=mips 64r6el_defconfig BOARDS=boston
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>

LGTM
Reviewed-by: James Hogan <james.hogan@imgtec.com>

Cheers
James

> 
> ---
> 
> Changes in v5:
> - Adjust interrupt-map to match pcie-xilinx driver patchset changes.
> 
> Changes in v4:
> - Most of the series already went in, rebase on v4.12-rc3.
> - Adjust DT to move img,boston-clock under the plat_regs syscon node.
> - Enable CONFIG_BLK_DEV_SD in board-boston.cfg to SATA disk access.
> - Enable CONFIG_GPIOLIB so that the GPIO driver is actually enabled.
> - Update MAINTAINERS entry.
> 
> Changes in v3: None
> Changes in v2: None
> 
>  MAINTAINERS                                   |   2 +
>  arch/mips/boot/dts/img/Makefile               |   2 +
>  arch/mips/boot/dts/img/boston.dts             | 224 ++++++++++++++++++++++++++
>  arch/mips/configs/generic/board-boston.config |  48 ++++++
>  arch/mips/generic/Kconfig                     |  12 ++
>  arch/mips/generic/vmlinux.its.S               |  25 +++
>  6 files changed, 313 insertions(+)
>  create mode 100644 arch/mips/boot/dts/img/boston.dts
>  create mode 100644 arch/mips/configs/generic/board-boston.config
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 2749877a4574..70acd8ee18ea 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8503,6 +8503,8 @@ M:	Paul Burton <paul.burton@imgtec.com>
>  L:	linux-mips@linux-mips.org
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
> +F:	arch/mips/boot/dts/img/boston.dts
> +F:	arch/mips/configs/generic/board-boston.config
>  F:	drivers/clk/imgtec/clk-boston.c
>  F:	include/dt-bindings/clock/boston-clock.h
>  
> diff --git a/arch/mips/boot/dts/img/Makefile b/arch/mips/boot/dts/img/Makefile
> index c178cf56f5b8..3d70958d0f5a 100644
> --- a/arch/mips/boot/dts/img/Makefile
> +++ b/arch/mips/boot/dts/img/Makefile
> @@ -1,3 +1,5 @@
> +dtb-$(CONFIG_FIT_IMAGE_FDT_BOSTON)	+= boston.dtb
> +
>  dtb-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb
>  obj-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb.o
>  
> diff --git a/arch/mips/boot/dts/img/boston.dts b/arch/mips/boot/dts/img/boston.dts
> new file mode 100644
> index 000000000000..53bfa29a7093
> --- /dev/null
> +++ b/arch/mips/boot/dts/img/boston.dts
> @@ -0,0 +1,224 @@
> +/dts-v1/;
> +
> +#include <dt-bindings/clock/boston-clock.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/mips-gic.h>
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "img,boston";
> +
> +	chosen {
> +		stdout-path = "uart0:115200";
> +	};
> +
> +	aliases {
> +		uart0 = &uart0;
> +	};
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu@0 {
> +			device_type = "cpu";
> +			compatible = "img,mips";
> +			reg = <0>;
> +			clocks = <&clk_boston BOSTON_CLK_CPU>;
> +		};
> +	};
> +
> +	memory@0 {
> +		device_type = "memory";
> +		reg = <0x00000000 0x10000000>;
> +	};
> +
> +	pci0: pci@10000000 {
> +		compatible = "xlnx,axi-pcie-host-1.00.a";
> +		device_type = "pci";
> +		reg = <0x10000000 0x2000000>;
> +
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		ranges = <0x02000000 0 0x40000000
> +			  0x40000000 0 0x40000000>;
> +
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &pci0_intc 1>,
> +				<0 0 0 2 &pci0_intc 2>,
> +				<0 0 0 3 &pci0_intc 3>,
> +				<0 0 0 4 &pci0_intc 4>;
> +
> +		pci0_intc: interrupt-controller {
> +			interrupt-controller;
> +			#address-cells = <0>;
> +			#interrupt-cells = <1>;
> +		};
> +	};
> +
> +	pci1: pci@12000000 {
> +		compatible = "xlnx,axi-pcie-host-1.00.a";
> +		device_type = "pci";
> +		reg = <0x12000000 0x2000000>;
> +
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		ranges = <0x02000000 0 0x20000000
> +			  0x20000000 0 0x20000000>;
> +
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &pci1_intc 1>,
> +				<0 0 0 2 &pci1_intc 2>,
> +				<0 0 0 3 &pci1_intc 3>,
> +				<0 0 0 4 &pci1_intc 4>;
> +
> +		pci1_intc: interrupt-controller {
> +			interrupt-controller;
> +			#address-cells = <0>;
> +			#interrupt-cells = <1>;
> +		};
> +	};
> +
> +	pci2: pci@14000000 {
> +		compatible = "xlnx,axi-pcie-host-1.00.a";
> +		device_type = "pci";
> +		reg = <0x14000000 0x2000000>;
> +
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		ranges = <0x02000000 0 0x16000000
> +			  0x16000000 0 0x100000>;
> +
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &pci2_intc 1>,
> +				<0 0 0 2 &pci2_intc 2>,
> +				<0 0 0 3 &pci2_intc 3>,
> +				<0 0 0 4 &pci2_intc 4>;
> +
> +		pci2_intc: interrupt-controller {
> +			interrupt-controller;
> +			#address-cells = <0>;
> +			#interrupt-cells = <1>;
> +		};
> +
> +		pci2_root@0,0,0 {
> +			compatible = "pci10ee,7021";
> +			reg = <0x00000000 0 0 0 0>;
> +
> +			#address-cells = <3>;
> +			#size-cells = <2>;
> +			#interrupt-cells = <1>;
> +
> +			eg20t_bridge@1,0,0 {
> +				compatible = "pci8086,8800";
> +				reg = <0x00010000 0 0 0 0>;
> +
> +				#address-cells = <3>;
> +				#size-cells = <2>;
> +				#interrupt-cells = <1>;
> +
> +				eg20t_mac@2,0,1 {
> +					compatible = "pci8086,8802";
> +					reg = <0x00020100 0 0 0 0>;
> +					phy-reset-gpios = <&eg20t_gpio 6
> +							   GPIO_ACTIVE_LOW>;
> +				};
> +
> +				eg20t_gpio: eg20t_gpio@2,0,2 {
> +					compatible = "pci8086,8803";
> +					reg = <0x00020200 0 0 0 0>;
> +
> +					gpio-controller;
> +					#gpio-cells = <2>;
> +				};
> +
> +				eg20t_i2c@2,12,2 {
> +					compatible = "pci8086,8817";
> +					reg = <0x00026200 0 0 0 0>;
> +
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +
> +					rtc@0x68 {
> +						compatible = "st,m41t81s";
> +						reg = <0x68>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
> +	gic: interrupt-controller@16120000 {
> +		compatible = "mti,gic";
> +		reg = <0x16120000 0x20000>;
> +
> +		interrupt-controller;
> +		#interrupt-cells = <3>;
> +
> +		timer {
> +			compatible = "mti,gic-timer";
> +			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
> +			clocks = <&clk_boston BOSTON_CLK_CPU>;
> +		};
> +	};
> +
> +	cdmm@16140000 {
> +		compatible = "mti,mips-cdmm";
> +		reg = <0x16140000 0x8000>;
> +	};
> +
> +	cpc@16200000 {
> +		compatible = "mti,mips-cpc";
> +		reg = <0x16200000 0x8000>;
> +	};
> +
> +	plat_regs: system-controller@17ffd000 {
> +		compatible = "img,boston-platform-regs", "syscon";
> +		reg = <0x17ffd000 0x1000>;
> +
> +		clk_boston: clock {
> +			compatible = "img,boston-clock";
> +			#clock-cells = <1>;
> +		};
> +	};
> +
> +	reboot: syscon-reboot {
> +		compatible = "syscon-reboot";
> +		regmap = <&plat_regs>;
> +		offset = <0x10>;
> +		mask = <0x10>;
> +	};
> +
> +	uart0: uart@17ffe000 {
> +		compatible = "ns16550a";
> +		reg = <0x17ffe000 0x1000>;
> +		reg-shift = <2>;
> +
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		clocks = <&clk_boston BOSTON_CLK_SYS>;
> +	};
> +
> +	lcd: lcd@17fff000 {
> +		compatible = "img,boston-lcd";
> +		reg = <0x17fff000 0x8>;
> +	};
> +};
> diff --git a/arch/mips/configs/generic/board-boston.config b/arch/mips/configs/generic/board-boston.config
> new file mode 100644
> index 000000000000..19560a45b683
> --- /dev/null
> +++ b/arch/mips/configs/generic/board-boston.config
> @@ -0,0 +1,48 @@
> +CONFIG_FIT_IMAGE_FDT_BOSTON=y
> +
> +CONFIG_ATA=y
> +CONFIG_SATA_AHCI=y
> +CONFIG_SCSI=y
> +CONFIG_BLK_DEV_SD=y
> +
> +CONFIG_AUXDISPLAY=y
> +CONFIG_IMG_ASCII_LCD=y
> +
> +CONFIG_COMMON_CLK_BOSTON=y
> +
> +CONFIG_DMADEVICES=y
> +CONFIG_PCH_DMA=y
> +
> +CONFIG_GPIOLIB=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_GPIO_PCH=y
> +
> +CONFIG_I2C=y
> +CONFIG_I2C_EG20T=y
> +
> +CONFIG_MMC=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_PCI=y
> +
> +CONFIG_NETDEVICES=y
> +CONFIG_PCH_GBE=y
> +
> +CONFIG_PCI=y
> +CONFIG_PCI_MSI=y
> +CONFIG_PCIE_XILINX=y
> +
> +CONFIG_PCH_PHUB=y
> +
> +CONFIG_RTC_CLASS=y
> +CONFIG_RTC_DRV_M41T80=y
> +
> +CONFIG_SERIAL_8250=y
> +CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_OF_PLATFORM=y
> +
> +CONFIG_SPI=y
> +CONFIG_SPI_TOPCLIFF_PCH=y
> +
> +CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_OHCI_HCD=y
> diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
> index a606b3f9196c..3b74d4ed9140 100644
> --- a/arch/mips/generic/Kconfig
> +++ b/arch/mips/generic/Kconfig
> @@ -9,6 +9,8 @@ config LEGACY_BOARDS
>  	  kernel is booted without being provided with an FDT via the UHI
>  	  boot protocol.
>  
> +comment "Legacy (non-UHI/non-FIT) Boards"
> +
>  config LEGACY_BOARD_SEAD3
>  	bool "Support MIPS SEAD-3 boards"
>  	select LEGACY_BOARDS
> @@ -16,4 +18,14 @@ config LEGACY_BOARD_SEAD3
>  	  Enable this to include support for booting on MIPS SEAD-3 FPGA-based
>  	  development boards, which boot using a legacy boot protocol.
>  
> +comment "FIT/UHI Boards"
> +
> +config FIT_IMAGE_FDT_BOSTON
> +	bool "Include FDT for MIPS Boston boards"
> +	help
> +	  Enable this to include the FDT for the MIPS Boston development board
> +	  from Imagination Technologies in the FIT kernel image. You should
> +	  enable this if you wish to boot on a MIPS Boston board, as it is
> +	  expected by the bootloader.
> +
>  endif
> diff --git a/arch/mips/generic/vmlinux.its.S b/arch/mips/generic/vmlinux.its.S
> index f67fbf1c8541..3390e2f80b80 100644
> --- a/arch/mips/generic/vmlinux.its.S
> +++ b/arch/mips/generic/vmlinux.its.S
> @@ -29,3 +29,28 @@
>  		};
>  	};
>  };
> +
> +#ifdef CONFIG_FIT_IMAGE_FDT_BOSTON
> +/ {
> +	images {
> +		fdt@boston {
> +			description = "img,boston Device Tree";
> +			data = /incbin/("boot/dts/img/boston.dtb");
> +			type = "flat_dt";
> +			arch = "mips";
> +			compression = "none";
> +			hash@0 {
> +				algo = "sha1";
> +			};
> +		};
> +	};
> +
> +	configurations {
> +		conf@boston {
> +			description = "Boston Linux kernel";
> +			kernel = "kernel@0";
> +			fdt = "fdt@boston";
> +		};
> +	};
> +};
> +#endif /* CONFIG_FIT_IMAGE_FDT_BOSTON */
> -- 
> 2.13.1
> 
> 

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH v5 4/4] MIPS: generic: Support MIPS Boston development boards
@ 2017-06-23 22:28     ` James Hogan
  0 siblings, 0 replies; 21+ messages in thread
From: James Hogan @ 2017-06-23 22:28 UTC (permalink / raw)
  To: Paul Burton; +Cc: linux-mips, Ralf Baechle

[-- Attachment #1: Type: text/plain, Size: 11327 bytes --]

On Sat, Jun 17, 2017 at 01:52:49PM -0700, Paul Burton wrote:
> Add support for the MIPS Boston development board to generic kernels,
> which essentially amounts to:
> 
>   - Adding the device tree source for the MIPS Boston board.
> 
>   - Adding a Kconfig fragment which enables the appropriate drivers for
>     the MIPS Boston board.
> 
> With these changes in place generic kernels will support the board by
> default, and kernels with only the drivers needed for Boston enabled can
> be configured by setting BOARDS=boston during configuration. For
> example:
> 
>   $ make ARCH=mips 64r6el_defconfig BOARDS=boston
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>

LGTM
Reviewed-by: James Hogan <james.hogan@imgtec.com>

Cheers
James

> 
> ---
> 
> Changes in v5:
> - Adjust interrupt-map to match pcie-xilinx driver patchset changes.
> 
> Changes in v4:
> - Most of the series already went in, rebase on v4.12-rc3.
> - Adjust DT to move img,boston-clock under the plat_regs syscon node.
> - Enable CONFIG_BLK_DEV_SD in board-boston.cfg to SATA disk access.
> - Enable CONFIG_GPIOLIB so that the GPIO driver is actually enabled.
> - Update MAINTAINERS entry.
> 
> Changes in v3: None
> Changes in v2: None
> 
>  MAINTAINERS                                   |   2 +
>  arch/mips/boot/dts/img/Makefile               |   2 +
>  arch/mips/boot/dts/img/boston.dts             | 224 ++++++++++++++++++++++++++
>  arch/mips/configs/generic/board-boston.config |  48 ++++++
>  arch/mips/generic/Kconfig                     |  12 ++
>  arch/mips/generic/vmlinux.its.S               |  25 +++
>  6 files changed, 313 insertions(+)
>  create mode 100644 arch/mips/boot/dts/img/boston.dts
>  create mode 100644 arch/mips/configs/generic/board-boston.config
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 2749877a4574..70acd8ee18ea 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8503,6 +8503,8 @@ M:	Paul Burton <paul.burton@imgtec.com>
>  L:	linux-mips@linux-mips.org
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
> +F:	arch/mips/boot/dts/img/boston.dts
> +F:	arch/mips/configs/generic/board-boston.config
>  F:	drivers/clk/imgtec/clk-boston.c
>  F:	include/dt-bindings/clock/boston-clock.h
>  
> diff --git a/arch/mips/boot/dts/img/Makefile b/arch/mips/boot/dts/img/Makefile
> index c178cf56f5b8..3d70958d0f5a 100644
> --- a/arch/mips/boot/dts/img/Makefile
> +++ b/arch/mips/boot/dts/img/Makefile
> @@ -1,3 +1,5 @@
> +dtb-$(CONFIG_FIT_IMAGE_FDT_BOSTON)	+= boston.dtb
> +
>  dtb-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb
>  obj-$(CONFIG_MACH_PISTACHIO)	+= pistachio_marduk.dtb.o
>  
> diff --git a/arch/mips/boot/dts/img/boston.dts b/arch/mips/boot/dts/img/boston.dts
> new file mode 100644
> index 000000000000..53bfa29a7093
> --- /dev/null
> +++ b/arch/mips/boot/dts/img/boston.dts
> @@ -0,0 +1,224 @@
> +/dts-v1/;
> +
> +#include <dt-bindings/clock/boston-clock.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/mips-gic.h>
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "img,boston";
> +
> +	chosen {
> +		stdout-path = "uart0:115200";
> +	};
> +
> +	aliases {
> +		uart0 = &uart0;
> +	};
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu@0 {
> +			device_type = "cpu";
> +			compatible = "img,mips";
> +			reg = <0>;
> +			clocks = <&clk_boston BOSTON_CLK_CPU>;
> +		};
> +	};
> +
> +	memory@0 {
> +		device_type = "memory";
> +		reg = <0x00000000 0x10000000>;
> +	};
> +
> +	pci0: pci@10000000 {
> +		compatible = "xlnx,axi-pcie-host-1.00.a";
> +		device_type = "pci";
> +		reg = <0x10000000 0x2000000>;
> +
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		ranges = <0x02000000 0 0x40000000
> +			  0x40000000 0 0x40000000>;
> +
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &pci0_intc 1>,
> +				<0 0 0 2 &pci0_intc 2>,
> +				<0 0 0 3 &pci0_intc 3>,
> +				<0 0 0 4 &pci0_intc 4>;
> +
> +		pci0_intc: interrupt-controller {
> +			interrupt-controller;
> +			#address-cells = <0>;
> +			#interrupt-cells = <1>;
> +		};
> +	};
> +
> +	pci1: pci@12000000 {
> +		compatible = "xlnx,axi-pcie-host-1.00.a";
> +		device_type = "pci";
> +		reg = <0x12000000 0x2000000>;
> +
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		ranges = <0x02000000 0 0x20000000
> +			  0x20000000 0 0x20000000>;
> +
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &pci1_intc 1>,
> +				<0 0 0 2 &pci1_intc 2>,
> +				<0 0 0 3 &pci1_intc 3>,
> +				<0 0 0 4 &pci1_intc 4>;
> +
> +		pci1_intc: interrupt-controller {
> +			interrupt-controller;
> +			#address-cells = <0>;
> +			#interrupt-cells = <1>;
> +		};
> +	};
> +
> +	pci2: pci@14000000 {
> +		compatible = "xlnx,axi-pcie-host-1.00.a";
> +		device_type = "pci";
> +		reg = <0x14000000 0x2000000>;
> +
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		ranges = <0x02000000 0 0x16000000
> +			  0x16000000 0 0x100000>;
> +
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &pci2_intc 1>,
> +				<0 0 0 2 &pci2_intc 2>,
> +				<0 0 0 3 &pci2_intc 3>,
> +				<0 0 0 4 &pci2_intc 4>;
> +
> +		pci2_intc: interrupt-controller {
> +			interrupt-controller;
> +			#address-cells = <0>;
> +			#interrupt-cells = <1>;
> +		};
> +
> +		pci2_root@0,0,0 {
> +			compatible = "pci10ee,7021";
> +			reg = <0x00000000 0 0 0 0>;
> +
> +			#address-cells = <3>;
> +			#size-cells = <2>;
> +			#interrupt-cells = <1>;
> +
> +			eg20t_bridge@1,0,0 {
> +				compatible = "pci8086,8800";
> +				reg = <0x00010000 0 0 0 0>;
> +
> +				#address-cells = <3>;
> +				#size-cells = <2>;
> +				#interrupt-cells = <1>;
> +
> +				eg20t_mac@2,0,1 {
> +					compatible = "pci8086,8802";
> +					reg = <0x00020100 0 0 0 0>;
> +					phy-reset-gpios = <&eg20t_gpio 6
> +							   GPIO_ACTIVE_LOW>;
> +				};
> +
> +				eg20t_gpio: eg20t_gpio@2,0,2 {
> +					compatible = "pci8086,8803";
> +					reg = <0x00020200 0 0 0 0>;
> +
> +					gpio-controller;
> +					#gpio-cells = <2>;
> +				};
> +
> +				eg20t_i2c@2,12,2 {
> +					compatible = "pci8086,8817";
> +					reg = <0x00026200 0 0 0 0>;
> +
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +
> +					rtc@0x68 {
> +						compatible = "st,m41t81s";
> +						reg = <0x68>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
> +	gic: interrupt-controller@16120000 {
> +		compatible = "mti,gic";
> +		reg = <0x16120000 0x20000>;
> +
> +		interrupt-controller;
> +		#interrupt-cells = <3>;
> +
> +		timer {
> +			compatible = "mti,gic-timer";
> +			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
> +			clocks = <&clk_boston BOSTON_CLK_CPU>;
> +		};
> +	};
> +
> +	cdmm@16140000 {
> +		compatible = "mti,mips-cdmm";
> +		reg = <0x16140000 0x8000>;
> +	};
> +
> +	cpc@16200000 {
> +		compatible = "mti,mips-cpc";
> +		reg = <0x16200000 0x8000>;
> +	};
> +
> +	plat_regs: system-controller@17ffd000 {
> +		compatible = "img,boston-platform-regs", "syscon";
> +		reg = <0x17ffd000 0x1000>;
> +
> +		clk_boston: clock {
> +			compatible = "img,boston-clock";
> +			#clock-cells = <1>;
> +		};
> +	};
> +
> +	reboot: syscon-reboot {
> +		compatible = "syscon-reboot";
> +		regmap = <&plat_regs>;
> +		offset = <0x10>;
> +		mask = <0x10>;
> +	};
> +
> +	uart0: uart@17ffe000 {
> +		compatible = "ns16550a";
> +		reg = <0x17ffe000 0x1000>;
> +		reg-shift = <2>;
> +
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		clocks = <&clk_boston BOSTON_CLK_SYS>;
> +	};
> +
> +	lcd: lcd@17fff000 {
> +		compatible = "img,boston-lcd";
> +		reg = <0x17fff000 0x8>;
> +	};
> +};
> diff --git a/arch/mips/configs/generic/board-boston.config b/arch/mips/configs/generic/board-boston.config
> new file mode 100644
> index 000000000000..19560a45b683
> --- /dev/null
> +++ b/arch/mips/configs/generic/board-boston.config
> @@ -0,0 +1,48 @@
> +CONFIG_FIT_IMAGE_FDT_BOSTON=y
> +
> +CONFIG_ATA=y
> +CONFIG_SATA_AHCI=y
> +CONFIG_SCSI=y
> +CONFIG_BLK_DEV_SD=y
> +
> +CONFIG_AUXDISPLAY=y
> +CONFIG_IMG_ASCII_LCD=y
> +
> +CONFIG_COMMON_CLK_BOSTON=y
> +
> +CONFIG_DMADEVICES=y
> +CONFIG_PCH_DMA=y
> +
> +CONFIG_GPIOLIB=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_GPIO_PCH=y
> +
> +CONFIG_I2C=y
> +CONFIG_I2C_EG20T=y
> +
> +CONFIG_MMC=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_PCI=y
> +
> +CONFIG_NETDEVICES=y
> +CONFIG_PCH_GBE=y
> +
> +CONFIG_PCI=y
> +CONFIG_PCI_MSI=y
> +CONFIG_PCIE_XILINX=y
> +
> +CONFIG_PCH_PHUB=y
> +
> +CONFIG_RTC_CLASS=y
> +CONFIG_RTC_DRV_M41T80=y
> +
> +CONFIG_SERIAL_8250=y
> +CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_OF_PLATFORM=y
> +
> +CONFIG_SPI=y
> +CONFIG_SPI_TOPCLIFF_PCH=y
> +
> +CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_OHCI_HCD=y
> diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
> index a606b3f9196c..3b74d4ed9140 100644
> --- a/arch/mips/generic/Kconfig
> +++ b/arch/mips/generic/Kconfig
> @@ -9,6 +9,8 @@ config LEGACY_BOARDS
>  	  kernel is booted without being provided with an FDT via the UHI
>  	  boot protocol.
>  
> +comment "Legacy (non-UHI/non-FIT) Boards"
> +
>  config LEGACY_BOARD_SEAD3
>  	bool "Support MIPS SEAD-3 boards"
>  	select LEGACY_BOARDS
> @@ -16,4 +18,14 @@ config LEGACY_BOARD_SEAD3
>  	  Enable this to include support for booting on MIPS SEAD-3 FPGA-based
>  	  development boards, which boot using a legacy boot protocol.
>  
> +comment "FIT/UHI Boards"
> +
> +config FIT_IMAGE_FDT_BOSTON
> +	bool "Include FDT for MIPS Boston boards"
> +	help
> +	  Enable this to include the FDT for the MIPS Boston development board
> +	  from Imagination Technologies in the FIT kernel image. You should
> +	  enable this if you wish to boot on a MIPS Boston board, as it is
> +	  expected by the bootloader.
> +
>  endif
> diff --git a/arch/mips/generic/vmlinux.its.S b/arch/mips/generic/vmlinux.its.S
> index f67fbf1c8541..3390e2f80b80 100644
> --- a/arch/mips/generic/vmlinux.its.S
> +++ b/arch/mips/generic/vmlinux.its.S
> @@ -29,3 +29,28 @@
>  		};
>  	};
>  };
> +
> +#ifdef CONFIG_FIT_IMAGE_FDT_BOSTON
> +/ {
> +	images {
> +		fdt@boston {
> +			description = "img,boston Device Tree";
> +			data = /incbin/("boot/dts/img/boston.dtb");
> +			type = "flat_dt";
> +			arch = "mips";
> +			compression = "none";
> +			hash@0 {
> +				algo = "sha1";
> +			};
> +		};
> +	};
> +
> +	configurations {
> +		conf@boston {
> +			description = "Boston Linux kernel";
> +			kernel = "kernel@0";
> +			fdt = "fdt@boston";
> +		};
> +	};
> +};
> +#endif /* CONFIG_FIT_IMAGE_FDT_BOSTON */
> -- 
> 2.13.1
> 
> 

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^ permalink raw reply	[flat|nested] 21+ messages in thread

end of thread, other threads:[~2017-06-23 22:28 UTC | newest]

Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-06-17 20:52 [PATCH v5 0/4] MIPS Boston support Paul Burton
2017-06-17 20:52 ` Paul Burton
2017-06-17 20:52 ` [PATCH v5 1/4] dt-bindings: Document img,boston-clock binding Paul Burton
2017-06-17 20:52   ` Paul Burton
2017-06-20  0:27   ` Stephen Boyd
2017-06-22 20:56   ` Rob Herring
2017-06-22 21:36     ` Paul Burton
2017-06-22 21:36       ` Paul Burton
2017-06-17 20:52 ` [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks Paul Burton
2017-06-17 20:52   ` Paul Burton
2017-06-20  0:26   ` Stephen Boyd
2017-06-20 16:45     ` Paul Burton
2017-06-20 16:45       ` Paul Burton
2017-06-23 22:20   ` James Hogan
2017-06-23 22:20     ` James Hogan
2017-06-17 20:52 ` [PATCH v5 3/4] MIPS: DTS: img: Don't attempt to build-in all .dtb files Paul Burton
2017-06-17 20:52   ` Paul Burton
2017-06-17 20:52 ` [PATCH v5 4/4] MIPS: generic: Support MIPS Boston development boards Paul Burton
2017-06-17 20:52   ` Paul Burton
2017-06-23 22:28   ` James Hogan
2017-06-23 22:28     ` James Hogan

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