From: Bruce Richardson <bruce.richardson@intel.com>
To: Wenzhuo Lu <wenzhuo.lu@intel.com>,
Konstantin Ananyev <konstantin.ananyev@intel.com>
Cc: Bruce Richardson <bruce.richardson@intel.com>, dev@dpdk.org
Subject: [PATCH 15/18] net/ixgbe: remove fallback code for non-SSE4 systems
Date: Tue, 20 Jun 2017 16:23:10 +0100 [thread overview]
Message-ID: <20170620152313.107642-16-bruce.richardson@intel.com> (raw)
In-Reply-To: <20170620152313.107642-1-bruce.richardson@intel.com>
Since SSE4 is now part of minimum requirements for DPDK on x86, we no
longer need this fallback code.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c
index 203f092..d209bb2 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c
@@ -216,26 +216,11 @@ desc_to_olflags_v(__m128i descs[4], __m128i mbuf_init, uint8_t vlan_flags,
* appropriate flags means that we have to do a shift and blend for
* each mbuf before we do the write.
*/
-#ifdef RTE_MACHINE_CPUFLAG_SSE4_2
-
rearm0 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vtag1, 8), 0x10);
rearm1 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vtag1, 6), 0x10);
rearm2 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vtag1, 4), 0x10);
rearm3 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vtag1, 2), 0x10);
-#else
- rearm0 = _mm_slli_si128(vtag1, 14);
- rearm1 = _mm_slli_si128(vtag1, 12);
- rearm2 = _mm_slli_si128(vtag1, 10);
- rearm3 = _mm_slli_si128(vtag1, 8);
-
- rearm0 = _mm_or_si128(mbuf_init, _mm_srli_epi64(rearm0, 48));
- rearm1 = _mm_or_si128(mbuf_init, _mm_srli_epi64(rearm1, 48));
- rearm2 = _mm_or_si128(mbuf_init, _mm_srli_epi64(rearm2, 48));
- rearm3 = _mm_or_si128(mbuf_init, _mm_srli_epi64(rearm3, 48));
-
-#endif /* RTE_MACHINE_CPUFLAG_SSE4_2 */
-
/* write the rearm data and the olflags in one write */
RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=
offsetof(struct rte_mbuf, rearm_data) + 8);
--
2.9.4
next prev parent reply other threads:[~2017-06-20 16:38 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-20 15:22 [PATCH 00/18] Increase minimum requirements for x86 platforms Bruce Richardson
2017-06-20 15:22 ` [PATCH 01/18] mk: require SSE4.2 support on all " Bruce Richardson
2017-06-20 15:22 ` [PATCH 02/18] acl: remove checks for SSE4 Bruce Richardson
2017-06-20 15:22 ` [PATCH 03/18] distributor: " Bruce Richardson
2017-06-20 15:22 ` [PATCH 04/18] eal: remove unneeded conditionals for SSE headers Bruce Richardson
2017-07-04 12:23 ` Thomas Monjalon
2017-06-20 15:23 ` [PATCH 05/18] hash: remove checks for SSE4 Bruce Richardson
2017-07-04 12:22 ` Thomas Monjalon
2017-06-20 15:23 ` [PATCH 06/18] ip_frag: check for x86 rather than SSE4 Bruce Richardson
2017-06-20 15:23 ` [PATCH 07/18] net: remove check for SSE4 Bruce Richardson
2017-06-30 9:44 ` Olivier Matz
2017-06-20 15:23 ` [PATCH 08/18] sched: " Bruce Richardson
2017-07-04 12:40 ` Thomas Monjalon
2017-06-20 15:23 ` [PATCH 09/18] crypto/aesni_mb: " Bruce Richardson
2017-06-23 12:58 ` Declan Doherty
2017-06-20 15:23 ` [PATCH 10/18] crypto/kasumi: " Bruce Richardson
2017-06-20 15:23 ` [PATCH 11/18] crypto/snow3g: " Bruce Richardson
2017-06-20 15:23 ` [PATCH 12/18] crypto/zuc: " Bruce Richardson
2017-06-20 15:23 ` [PATCH 13/18] net/enic: replace check for SSE4 with check for x86 Bruce Richardson
2017-06-20 15:23 ` [PATCH 14/18] net/i40e: remove checks for SSE4 Bruce Richardson
2017-06-20 15:23 ` Bruce Richardson [this message]
2017-06-20 15:23 ` [PATCH 16/18] examples/ip_pipeline: remove macro check " Bruce Richardson
2017-06-20 15:23 ` [PATCH 17/18] examples/l3fwd: remove checks " Bruce Richardson
2017-06-20 15:23 ` [PATCH 18/18] examples/performance-thread: remove non-SSE4 fallbacks Bruce Richardson
2017-06-30 13:23 ` [PATCH 00/18] Increase minimum requirements for x86 platforms Ananyev, Konstantin
2017-07-04 12:42 ` Thomas Monjalon
2017-07-21 15:50 ` Bruce Richardson
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