All of lore.kernel.org
 help / color / mirror / Atom feed
From: Bruce Richardson <bruce.richardson@intel.com>
To: John McNamara <john.mcnamara@intel.com>
Cc: Bruce Richardson <bruce.richardson@intel.com>, dev@dpdk.org
Subject: [PATCH 18/18] examples/performance-thread: remove non-SSE4 fallbacks
Date: Tue, 20 Jun 2017 16:23:13 +0100	[thread overview]
Message-ID: <20170620152313.107642-19-bruce.richardson@intel.com> (raw)
In-Reply-To: <20170620152313.107642-1-bruce.richardson@intel.com>

Since this example is for x86_64 platforms only, and since SSE4 is now a
mandatory requirement, we can remove the ifdefs checking for that
instruction set level, and the fallbacks if it is not present.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
 examples/performance-thread/l3fwd-thread/main.c | 25 -------------------------
 1 file changed, 25 deletions(-)

diff --git a/examples/performance-thread/l3fwd-thread/main.c b/examples/performance-thread/l3fwd-thread/main.c
index 8237ac6..e1db857 100644
--- a/examples/performance-thread/l3fwd-thread/main.c
+++ b/examples/performance-thread/l3fwd-thread/main.c
@@ -157,11 +157,7 @@ cb_parse_ptype(__rte_unused uint8_t port, __rte_unused uint16_t queue,
  *  When set to one, optimized forwarding path is enabled.
  *  Note that LPM optimisation path uses SSE4.1 instructions.
  */
-#if ((APP_LOOKUP_METHOD == APP_LOOKUP_LPM) && !defined(__SSE4_1__))
-#define ENABLE_MULTI_BUFFER_OPTIMIZE	0
-#else
 #define ENABLE_MULTI_BUFFER_OPTIMIZE	1
-#endif
 
 #if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
 #include <rte_hash.h>
@@ -362,13 +358,8 @@ static struct rte_mempool *pktmbuf_pool[NB_SOCKETS];
 
 #if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
 
-#ifdef RTE_MACHINE_CPUFLAG_SSE4_2
 #include <rte_hash_crc.h>
 #define DEFAULT_HASH_FUNC       rte_hash_crc
-#else
-#include <rte_jhash.h>
-#define DEFAULT_HASH_FUNC       rte_jhash
-#endif
 
 struct ipv4_5tuple {
 	uint32_t ip_dst;
@@ -485,17 +476,10 @@ ipv4_hash_crc(const void *data, __rte_unused uint32_t data_len,
 	t = k->proto;
 	p = (const uint32_t *)&k->port_src;
 
-#ifdef RTE_MACHINE_CPUFLAG_SSE4_2
 	init_val = rte_hash_crc_4byte(t, init_val);
 	init_val = rte_hash_crc_4byte(k->ip_src, init_val);
 	init_val = rte_hash_crc_4byte(k->ip_dst, init_val);
 	init_val = rte_hash_crc_4byte(*p, init_val);
-#else /* RTE_MACHINE_CPUFLAG_SSE4_2 */
-	init_val = rte_jhash_1word(t, init_val);
-	init_val = rte_jhash_1word(k->ip_src, init_val);
-	init_val = rte_jhash_1word(k->ip_dst, init_val);
-	init_val = rte_jhash_1word(*p, init_val);
-#endif /* RTE_MACHINE_CPUFLAG_SSE4_2 */
 	return init_val;
 }
 
@@ -506,16 +490,13 @@ ipv6_hash_crc(const void *data, __rte_unused uint32_t data_len,
 	const union ipv6_5tuple_host *k;
 	uint32_t t;
 	const uint32_t *p;
-#ifdef RTE_MACHINE_CPUFLAG_SSE4_2
 	const uint32_t *ip_src0, *ip_src1, *ip_src2, *ip_src3;
 	const uint32_t *ip_dst0, *ip_dst1, *ip_dst2, *ip_dst3;
-#endif /* RTE_MACHINE_CPUFLAG_SSE4_2 */
 
 	k = data;
 	t = k->proto;
 	p = (const uint32_t *)&k->port_src;
 
-#ifdef RTE_MACHINE_CPUFLAG_SSE4_2
 	ip_src0 = (const uint32_t *) k->ip_src;
 	ip_src1 = (const uint32_t *)(k->ip_src + 4);
 	ip_src2 = (const uint32_t *)(k->ip_src + 8);
@@ -534,12 +515,6 @@ ipv6_hash_crc(const void *data, __rte_unused uint32_t data_len,
 	init_val = rte_hash_crc_4byte(*ip_dst2, init_val);
 	init_val = rte_hash_crc_4byte(*ip_dst3, init_val);
 	init_val = rte_hash_crc_4byte(*p, init_val);
-#else /* RTE_MACHINE_CPUFLAG_SSE4_2 */
-	init_val = rte_jhash_1word(t, init_val);
-	init_val = rte_jhash(k->ip_src, sizeof(uint8_t) * IPV6_ADDR_LEN, init_val);
-	init_val = rte_jhash(k->ip_dst, sizeof(uint8_t) * IPV6_ADDR_LEN, init_val);
-	init_val = rte_jhash_1word(*p, init_val);
-#endif /* RTE_MACHINE_CPUFLAG_SSE4_2 */
 	return init_val;
 }
 
-- 
2.9.4

  parent reply	other threads:[~2017-06-20 16:38 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-20 15:22 [PATCH 00/18] Increase minimum requirements for x86 platforms Bruce Richardson
2017-06-20 15:22 ` [PATCH 01/18] mk: require SSE4.2 support on all " Bruce Richardson
2017-06-20 15:22 ` [PATCH 02/18] acl: remove checks for SSE4 Bruce Richardson
2017-06-20 15:22 ` [PATCH 03/18] distributor: " Bruce Richardson
2017-06-20 15:22 ` [PATCH 04/18] eal: remove unneeded conditionals for SSE headers Bruce Richardson
2017-07-04 12:23   ` Thomas Monjalon
2017-06-20 15:23 ` [PATCH 05/18] hash: remove checks for SSE4 Bruce Richardson
2017-07-04 12:22   ` Thomas Monjalon
2017-06-20 15:23 ` [PATCH 06/18] ip_frag: check for x86 rather than SSE4 Bruce Richardson
2017-06-20 15:23 ` [PATCH 07/18] net: remove check for SSE4 Bruce Richardson
2017-06-30  9:44   ` Olivier Matz
2017-06-20 15:23 ` [PATCH 08/18] sched: " Bruce Richardson
2017-07-04 12:40   ` Thomas Monjalon
2017-06-20 15:23 ` [PATCH 09/18] crypto/aesni_mb: " Bruce Richardson
2017-06-23 12:58   ` Declan Doherty
2017-06-20 15:23 ` [PATCH 10/18] crypto/kasumi: " Bruce Richardson
2017-06-20 15:23 ` [PATCH 11/18] crypto/snow3g: " Bruce Richardson
2017-06-20 15:23 ` [PATCH 12/18] crypto/zuc: " Bruce Richardson
2017-06-20 15:23 ` [PATCH 13/18] net/enic: replace check for SSE4 with check for x86 Bruce Richardson
2017-06-20 15:23 ` [PATCH 14/18] net/i40e: remove checks for SSE4 Bruce Richardson
2017-06-20 15:23 ` [PATCH 15/18] net/ixgbe: remove fallback code for non-SSE4 systems Bruce Richardson
2017-06-20 15:23 ` [PATCH 16/18] examples/ip_pipeline: remove macro check for SSE4 Bruce Richardson
2017-06-20 15:23 ` [PATCH 17/18] examples/l3fwd: remove checks " Bruce Richardson
2017-06-20 15:23 ` Bruce Richardson [this message]
2017-06-30 13:23 ` [PATCH 00/18] Increase minimum requirements for x86 platforms Ananyev, Konstantin
2017-07-04 12:42   ` Thomas Monjalon
2017-07-21 15:50     ` Bruce Richardson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170620152313.107642-19-bruce.richardson@intel.com \
    --to=bruce.richardson@intel.com \
    --cc=dev@dpdk.org \
    --cc=john.mcnamara@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.