From: Rob Herring <robh@kernel.org> To: Frank Rowand <frowand.list@gmail.com> Cc: "Mark Rutland" <mark.rutland@arm.com>, "Horia Geantă" <horia.geanta@nxp.com>, "Dan Douglass" <dan.douglass@nxp.com>, "Herbert Xu" <herbert@gondor.apana.org.au>, "David S. Miller" <davem@davemloft.net>, "Thomas Gleixner" <tglx@linutronix.de>, "Jason Cooper" <jason@lakedaemon.net>, "Marc Zyngier" <marc.zyngier@arm.com>, "Scott Wood" <oss@buserror.net>, "Benjamin Herrenschmidt" <benh@kernel.crashing.org>, "Paul Mackerras" <paulus@samba.org>, "Michael Ellerman" <mpe@ellerman.id.au>, "Jonathan Corbet" <corbet@lwn.net>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org Subject: Re: [PATCH] of: update ePAPR references to point to Devicetree Specification Date: Thu, 22 Jun 2017 10:16:51 -0500 [thread overview] Message-ID: <20170622151651.ghls5dgrrcjl7tnj@rob-hp-laptop> (raw) In-Reply-To: <5947A62D.6050504@gmail.com> On Mon, Jun 19, 2017 at 03:23:41AM -0700, Frank Rowand wrote: > On 06/18/17 07:05, Rob Herring wrote: > > On Tue, Jun 13, 2017 at 07:49:04PM -0700, frowand.list@gmail.com wrote: > >> From: Frank Rowand <frank.rowand@sony.com> > >> > >> The Devicetree Specification has superseded the ePAPR as the > >> base specification for bindings. Update files in Documentation > >> to reference the new document. > >> > >> Some files are not updated because there is no hypervisor chapter > >> in the Devicetree Specification: > >> Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt > >> Documenation/virtual/kvm/api.txt > >> Documenation/virtual/kvm/ppc-pv.txt > >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt > >> index f8cd2397aa04..d63ab1dec16d 100644 > >> --- a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt > >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt > >> @@ -3,10 +3,10 @@ Power Architecture CPU Binding > >> Copyright 2013 Freescale Semiconductor Inc. > >> > >> Power Architecture CPUs in Freescale SOCs are represented in device trees as > >> -per the definition in ePAPR. > >> +per the definition in the Devicetree Specification. > > > > Are we sure we didn't remove any PPC specifics that apply here? > > I don't see any. > > Table 3.7.1 "General Properties of CPU nodes" was slightly > re-ordered, but the same properties are listed in both documents. > > I don't think that the boot requirements removal impacts this > file. > > Am I missing something? No, I just wanted to make sure. So I guess there's just that one minor thing to drop. Rob
WARNING: multiple messages have this Message-ID (diff)
From: robh@kernel.org (Rob Herring) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] of: update ePAPR references to point to Devicetree Specification Date: Thu, 22 Jun 2017 10:16:51 -0500 [thread overview] Message-ID: <20170622151651.ghls5dgrrcjl7tnj@rob-hp-laptop> (raw) In-Reply-To: <5947A62D.6050504@gmail.com> On Mon, Jun 19, 2017 at 03:23:41AM -0700, Frank Rowand wrote: > On 06/18/17 07:05, Rob Herring wrote: > > On Tue, Jun 13, 2017 at 07:49:04PM -0700, frowand.list at gmail.com wrote: > >> From: Frank Rowand <frank.rowand@sony.com> > >> > >> The Devicetree Specification has superseded the ePAPR as the > >> base specification for bindings. Update files in Documentation > >> to reference the new document. > >> > >> Some files are not updated because there is no hypervisor chapter > >> in the Devicetree Specification: > >> Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt > >> Documenation/virtual/kvm/api.txt > >> Documenation/virtual/kvm/ppc-pv.txt > >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt > >> index f8cd2397aa04..d63ab1dec16d 100644 > >> --- a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt > >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt > >> @@ -3,10 +3,10 @@ Power Architecture CPU Binding > >> Copyright 2013 Freescale Semiconductor Inc. > >> > >> Power Architecture CPUs in Freescale SOCs are represented in device trees as > >> -per the definition in ePAPR. > >> +per the definition in the Devicetree Specification. > > > > Are we sure we didn't remove any PPC specifics that apply here? > > I don't see any. > > Table 3.7.1 "General Properties of CPU nodes" was slightly > re-ordered, but the same properties are listed in both documents. > > I don't think that the boot requirements removal impacts this > file. > > Am I missing something? No, I just wanted to make sure. So I guess there's just that one minor thing to drop. Rob
next prev parent reply other threads:[~2017-06-22 15:16 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-06-14 2:49 [PATCH] of: update ePAPR references to point to Devicetree Specification frowand.list 2017-06-14 2:49 ` frowand.list at gmail.com 2017-06-18 14:05 ` Rob Herring 2017-06-18 14:05 ` Rob Herring 2017-06-18 14:05 ` Rob Herring 2017-06-19 10:23 ` Frank Rowand 2017-06-19 10:23 ` Frank Rowand 2017-06-22 15:16 ` Rob Herring [this message] 2017-06-22 15:16 ` Rob Herring
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