From: Jonathan Liu <net147@gmail.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
Jonathan Liu <net147@gmail.com>
Subject: [PATCH v2] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins
Date: Mon, 26 Jun 2017 22:55:06 +1000 [thread overview]
Message-ID: <20170626125506.21063-1-net147@gmail.com> (raw)
The LCD0 controller on the A20 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Jonathan Liu <net147@gmail.com>
---
Changes for v2:
- Remove "allwinner," prefix from pins and function
arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 96bee776e145..ac025d1fb348 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1183,6 +1183,17 @@
function = "ir1";
};
+ lcd0_rgb888_pins: lcd0_rgb888@0 {
+ pins = "PD0", "PD1", "PD2", "PD3",
+ "PD4", "PD5", "PD6", "PD7",
+ "PD8", "PD9", "PD10", "PD11",
+ "PD12", "PD13", "PD14", "PD15",
+ "PD16", "PD17", "PD18", "PD19",
+ "PD20", "PD21", "PD22", "PD23",
+ "PD24", "PD25", "PD26", "PD27";
+ function = "lcd0";
+ };
+
mmc0_pins_a: mmc0@0 {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
--
2.13.1
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Liu <net147-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Jonathan Liu <net147-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: [PATCH v2] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins
Date: Mon, 26 Jun 2017 22:55:06 +1000 [thread overview]
Message-ID: <20170626125506.21063-1-net147@gmail.com> (raw)
The LCD0 controller on the A20 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Jonathan Liu <net147-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
Changes for v2:
- Remove "allwinner," prefix from pins and function
arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 96bee776e145..ac025d1fb348 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1183,6 +1183,17 @@
function = "ir1";
};
+ lcd0_rgb888_pins: lcd0_rgb888@0 {
+ pins = "PD0", "PD1", "PD2", "PD3",
+ "PD4", "PD5", "PD6", "PD7",
+ "PD8", "PD9", "PD10", "PD11",
+ "PD12", "PD13", "PD14", "PD15",
+ "PD16", "PD17", "PD18", "PD19",
+ "PD20", "PD21", "PD22", "PD23",
+ "PD24", "PD25", "PD26", "PD27";
+ function = "lcd0";
+ };
+
mmc0_pins_a: mmc0@0 {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
--
2.13.1
WARNING: multiple messages have this Message-ID (diff)
From: net147@gmail.com (Jonathan Liu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins
Date: Mon, 26 Jun 2017 22:55:06 +1000 [thread overview]
Message-ID: <20170626125506.21063-1-net147@gmail.com> (raw)
The LCD0 controller on the A20 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Jonathan Liu <net147@gmail.com>
---
Changes for v2:
- Remove "allwinner," prefix from pins and function
arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 96bee776e145..ac025d1fb348 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1183,6 +1183,17 @@
function = "ir1";
};
+ lcd0_rgb888_pins: lcd0_rgb888 at 0 {
+ pins = "PD0", "PD1", "PD2", "PD3",
+ "PD4", "PD5", "PD6", "PD7",
+ "PD8", "PD9", "PD10", "PD11",
+ "PD12", "PD13", "PD14", "PD15",
+ "PD16", "PD17", "PD18", "PD19",
+ "PD20", "PD21", "PD22", "PD23",
+ "PD24", "PD25", "PD26", "PD27";
+ function = "lcd0";
+ };
+
mmc0_pins_a: mmc0 at 0 {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
--
2.13.1
next reply other threads:[~2017-06-26 12:55 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-26 12:55 Jonathan Liu [this message]
2017-06-26 12:55 ` [PATCH v2] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins Jonathan Liu
2017-06-26 12:55 ` Jonathan Liu
2017-06-27 10:15 ` Maxime Ripard
2017-06-27 10:15 ` Maxime Ripard
2017-06-27 10:15 ` Maxime Ripard
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