* [RESEND PATCH] MIPS: head: Reorder instructions missing a delay slot
@ 2017-06-27 19:22 Karl Beldan
2017-06-27 20:31 ` James Hogan
2017-06-27 21:40 ` Ralf Baechle
0 siblings, 2 replies; 4+ messages in thread
From: Karl Beldan @ 2017-06-27 19:22 UTC (permalink / raw)
To: linux-mips; +Cc: linux-kernel, Karl Beldan, stable, Ralf Baechle, Jonas Gorski
In this sequence the 'move' is assumed in the delay slot of the 'beq',
but head.S is in reorder mode and the former gets pushed one 'nop'
farther by the assembler.
The corrected behavior made booting with an UHI supplied dtb erratic.
Fixes: 15f37e158892 ("MIPS: store the appended dtb address in a variable")
Cc: <stable@vger.kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
---
arch/mips/kernel/head.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index cf05220..d1bb506 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -106,8 +106,8 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
beq t0, t1, dtb_found
#endif
li t1, -2
- beq a0, t1, dtb_found
move t2, a1
+ beq a0, t1, dtb_found
li t2, 0
dtb_found:
--
2.10.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [RESEND PATCH] MIPS: head: Reorder instructions missing a delay slot
@ 2017-06-27 20:31 ` James Hogan
0 siblings, 0 replies; 4+ messages in thread
From: James Hogan @ 2017-06-27 20:31 UTC (permalink / raw)
To: Karl Beldan
Cc: linux-mips, linux-kernel, Karl Beldan, stable, Ralf Baechle,
Jonas Gorski
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On Tue, Jun 27, 2017 at 07:22:16PM +0000, Karl Beldan wrote:
> In this sequence the 'move' is assumed in the delay slot of the 'beq',
> but head.S is in reorder mode and the former gets pushed one 'nop'
> farther by the assembler.
>
> The corrected behavior made booting with an UHI supplied dtb erratic.
>
> Fixes: 15f37e158892 ("MIPS: store the appended dtb address in a variable")
> Cc: <stable@vger.kernel.org>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Jonas Gorski <jogo@openwrt.org>
> Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Ouch, nice catch.
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cheers
James
> ---
> arch/mips/kernel/head.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
> index cf05220..d1bb506 100644
> --- a/arch/mips/kernel/head.S
> +++ b/arch/mips/kernel/head.S
> @@ -106,8 +106,8 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
> beq t0, t1, dtb_found
> #endif
> li t1, -2
> - beq a0, t1, dtb_found
> move t2, a1
> + beq a0, t1, dtb_found
>
> li t2, 0
> dtb_found:
> --
> 2.10.1
>
>
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [RESEND PATCH] MIPS: head: Reorder instructions missing a delay slot
@ 2017-06-27 20:31 ` James Hogan
0 siblings, 0 replies; 4+ messages in thread
From: James Hogan @ 2017-06-27 20:31 UTC (permalink / raw)
To: Karl Beldan
Cc: linux-mips, linux-kernel, Karl Beldan, stable, Ralf Baechle,
Jonas Gorski
[-- Attachment #1: Type: text/plain, Size: 1183 bytes --]
On Tue, Jun 27, 2017 at 07:22:16PM +0000, Karl Beldan wrote:
> In this sequence the 'move' is assumed in the delay slot of the 'beq',
> but head.S is in reorder mode and the former gets pushed one 'nop'
> farther by the assembler.
>
> The corrected behavior made booting with an UHI supplied dtb erratic.
>
> Fixes: 15f37e158892 ("MIPS: store the appended dtb address in a variable")
> Cc: <stable@vger.kernel.org>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Jonas Gorski <jogo@openwrt.org>
> Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Ouch, nice catch.
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cheers
James
> ---
> arch/mips/kernel/head.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
> index cf05220..d1bb506 100644
> --- a/arch/mips/kernel/head.S
> +++ b/arch/mips/kernel/head.S
> @@ -106,8 +106,8 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
> beq t0, t1, dtb_found
> #endif
> li t1, -2
> - beq a0, t1, dtb_found
> move t2, a1
> + beq a0, t1, dtb_found
>
> li t2, 0
> dtb_found:
> --
> 2.10.1
>
>
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [RESEND PATCH] MIPS: head: Reorder instructions missing a delay slot
2017-06-27 19:22 [RESEND PATCH] MIPS: head: Reorder instructions missing a delay slot Karl Beldan
2017-06-27 20:31 ` James Hogan
@ 2017-06-27 21:40 ` Ralf Baechle
1 sibling, 0 replies; 4+ messages in thread
From: Ralf Baechle @ 2017-06-27 21:40 UTC (permalink / raw)
To: Karl Beldan; +Cc: linux-mips, linux-kernel, Karl Beldan, stable, Jonas Gorski
On Tue, Jun 27, 2017 at 07:22:16PM +0000, Karl Beldan wrote:
> In this sequence the 'move' is assumed in the delay slot of the 'beq',
> but head.S is in reorder mode and the former gets pushed one 'nop'
> farther by the assembler.
>
> The corrected behavior made booting with an UHI supplied dtb erratic.
Excellent catch, patch applied!
Thanks Karl,
Ralf
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-06-27 21:40 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2017-06-27 19:22 [RESEND PATCH] MIPS: head: Reorder instructions missing a delay slot Karl Beldan
2017-06-27 20:31 ` James Hogan
2017-06-27 20:31 ` James Hogan
2017-06-27 21:40 ` Ralf Baechle
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