From: Andrew Jones <drjones@redhat.com>
To: Alexander Graf <agraf@suse.de>
Cc: qemu-devel@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
kvm@vger.kernel.org, cdall@linaro.org, qemu-arm@nongnu.org,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH v3] ARM: KVM: Enable in-kernel timers with user space gic
Date: Wed, 28 Jun 2017 13:51:10 +0200 [thread overview]
Message-ID: <20170628115110.nq7wdsrhxxjelzq6@kamzik.brq.redhat.com> (raw)
In-Reply-To: <1498577737-130264-1-git-send-email-agraf@suse.de>
On Tue, Jun 27, 2017 at 05:35:37PM +0200, Alexander Graf wrote:
> When running with KVM enabled, you can choose between emulating the
> gic in kernel or user space. If the kernel supports in-kernel virtualization
> of the interrupt controller, it will default to that. If not, if will
> default to user space emulation.
>
> Unfortunately when running in user mode gic emulation, we miss out on
> interrupt events which are only available from kernel space, such as the timer.
> This patch leverages the new kernel/user space pending line synchronization for
> timer events. It does not handle PMU events yet.
>
> Signed-off-by: Alexander Graf <agraf@suse.de>
> Reviewed-by: Andrew Jones <drjones@redhat.com>
>
> ---
>
> v1 -> v2:
>
> - whitespace fixes
> - use !! to determine whether bit is set
> - call in-kernel device IRQs out by their name everywhere
>
> v2 -> v3:
>
> - fix last occurence of calling out timer IRQs explicitly
> ---
> accel/kvm/kvm-all.c | 5 +++++
> accel/stubs/kvm-stub.c | 5 +++++
> hw/intc/arm_gic.c | 7 +++++++
> include/sysemu/kvm.h | 11 +++++++++++
> target/arm/cpu.h | 3 +++
> target/arm/kvm.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++
> 6 files changed, 82 insertions(+)
>
Tried testing this on a gicv3 machine, a ThunderX2. The guest kernel
complains with
GICv3: GIC: unable to set SRE (disabled at EL2), panic ahead
but no panic occurs. Instead it hangs in cpu_do_idle(), waiting forever
for an interrupt.
AAVMF also complains about SRE support, actually it asserts it.
ASSERT [ArmGicDxe] /builddir/build/BUILD/ovmf-c325e41585e3/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c(113): IccSre & (1 << 0)
I still haven't seen any problems with gicv2 though.
Thanks,
drew
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <drjones@redhat.com>
To: Alexander Graf <agraf@suse.de>
Cc: qemu-devel@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
kvm@vger.kernel.org, cdall@linaro.org, qemu-arm@nongnu.org,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v3] ARM: KVM: Enable in-kernel timers with user space gic
Date: Wed, 28 Jun 2017 13:51:10 +0200 [thread overview]
Message-ID: <20170628115110.nq7wdsrhxxjelzq6@kamzik.brq.redhat.com> (raw)
In-Reply-To: <1498577737-130264-1-git-send-email-agraf@suse.de>
On Tue, Jun 27, 2017 at 05:35:37PM +0200, Alexander Graf wrote:
> When running with KVM enabled, you can choose between emulating the
> gic in kernel or user space. If the kernel supports in-kernel virtualization
> of the interrupt controller, it will default to that. If not, if will
> default to user space emulation.
>
> Unfortunately when running in user mode gic emulation, we miss out on
> interrupt events which are only available from kernel space, such as the timer.
> This patch leverages the new kernel/user space pending line synchronization for
> timer events. It does not handle PMU events yet.
>
> Signed-off-by: Alexander Graf <agraf@suse.de>
> Reviewed-by: Andrew Jones <drjones@redhat.com>
>
> ---
>
> v1 -> v2:
>
> - whitespace fixes
> - use !! to determine whether bit is set
> - call in-kernel device IRQs out by their name everywhere
>
> v2 -> v3:
>
> - fix last occurence of calling out timer IRQs explicitly
> ---
> accel/kvm/kvm-all.c | 5 +++++
> accel/stubs/kvm-stub.c | 5 +++++
> hw/intc/arm_gic.c | 7 +++++++
> include/sysemu/kvm.h | 11 +++++++++++
> target/arm/cpu.h | 3 +++
> target/arm/kvm.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++
> 6 files changed, 82 insertions(+)
>
Tried testing this on a gicv3 machine, a ThunderX2. The guest kernel
complains with
GICv3: GIC: unable to set SRE (disabled at EL2), panic ahead
but no panic occurs. Instead it hangs in cpu_do_idle(), waiting forever
for an interrupt.
AAVMF also complains about SRE support, actually it asserts it.
ASSERT [ArmGicDxe] /builddir/build/BUILD/ovmf-c325e41585e3/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c(113): IccSre & (1 << 0)
I still haven't seen any problems with gicv2 though.
Thanks,
drew
next prev parent reply other threads:[~2017-06-28 11:51 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-27 15:35 [PATCH v3] ARM: KVM: Enable in-kernel timers with user space gic Alexander Graf
2017-06-27 15:35 ` [Qemu-devel] " Alexander Graf
2017-06-28 11:51 ` Andrew Jones [this message]
2017-06-28 11:51 ` Andrew Jones
2017-06-28 12:36 ` Alexander Graf
2017-06-28 12:36 ` [Qemu-devel] " Alexander Graf
2017-06-28 13:43 ` Andrew Jones
2017-06-29 15:22 ` Peter Maydell
2017-06-29 15:22 ` [Qemu-devel] " Peter Maydell
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