[PATCH v2 0/2] Handle unsupported configuration with IF-ID

[PATCH v2 0/2] Handle unsupported configuration with IF-ID

[Mahesh Kumar]

Gen9+ Interlace fetch mode doesn't support few plane configurations & pipe scaling.
 - Y-tile
 - 90/270 rotation
 - pipe/plane scaling
 - 420 planar formats

Changes since V1:
 - Address review comments from ville

Mahesh Kumar (2):
  drm/i915/skl+: Check for supported plane configuration in Interlace
    mode
  drm/i915/skl+: Scaling not supported in IF-ID Interlace mode

 drivers/gpu/drm/i915/intel_atomic_plane.c | 33 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_display.c      | 10 ++++++++++
 2 files changed, 43 insertions(+)

-- 
2.13.0

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[PATCH v2 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Mahesh Kumar]

In Gen9 platform Interlaced fetch mode doesn't support following plane
configuration:
 - Y/Yf tiling
 - 90/270 rotation
 - YUV420 hybrid planar source pixel formats.

This patch adds check to fail the flip if any of the above configuration
is requested.

Changes since V1:
 - handle checks in intel_plane_atomic_check_with_state (ville)
 - takeout plane scaler checks, combine with pipe scaler in next patch

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_atomic_plane.c | 33 +++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 4325cb0a04f5..2b60a67c5393 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
 	struct drm_i915_private *dev_priv = to_i915(plane->dev);
 	struct drm_plane_state *state = &intel_state->base;
 	struct intel_plane *intel_plane = to_intel_plane(plane);
+	const struct drm_display_mode *adjusted_mode =
+						&crtc_state->base.adjusted_mode;
 	int ret;
 
 	/*
@@ -173,6 +175,37 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
 	if (ret)
 		return ret;
 
+	/*
+	 * Y-tiling is not supported in IF-ID Interlace mode in
+	 * GEN9 and above.
+	 * Scaling is not supported with Interlaced fetch mode.
+	 * YUV420 hybrid planar source pixel formats are not supported with
+	 * Interlaced fetch mode.
+	 */
+	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
+			adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		struct drm_framebuffer *fb = state->fb;
+		struct drm_format_name_buf format_name;
+
+		if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+		    fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
+			return -EINVAL;
+		}
+
+		switch (fb->format->format) {
+		case DRM_FORMAT_NV12:
+		case DRM_FORMAT_YUV420:
+		case DRM_FORMAT_YVU420:
+			DRM_DEBUG_KMS("Unsupported pixel format %s for IF-ID\n",
+				      drm_get_format_name(fb->format->format,
+				      &format_name));
+			return -EINVAL;
+		default:
+			break;
+		}
+	}
+
 	/* FIXME pre-g4x don't work like this */
 	if (intel_state->base.visible)
 		crtc_state->active_planes |= BIT(intel_plane->id);
-- 
2.13.0

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[PATCH v2 2/2] drm/i915/skl+: Scaling not supported in IF-ID Interlace mode

[Mahesh Kumar]

GEN9+ Interlace fetch mode doesn't support pipe/plane scaling,
This patch adds check to fail the flip if pipe/plane scaling is
requested in Interlace fetch mode.

Changes since V1:
 - move check to skl_update_scaler (ville)
 - mode to adjusted_mode (ville)
 - combine pipe/plane scaling check

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4e03ca6c946f..4f4f3d4ac297 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4612,6 +4612,9 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
 		&crtc_state->scaler_state;
 	struct intel_crtc *intel_crtc =
 		to_intel_crtc(crtc_state->base.crtc);
+	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
+	const struct drm_display_mode *adjusted_mode =
+		&crtc_state->base.adjusted_mode;
 	int need_scaling;
 
 	/*
@@ -4621,6 +4624,13 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
 	 */
 	need_scaling = src_w != dst_w || src_h != dst_h;
 
+	/* Scaling/fitting not supported in IF-ID mode in GEN9+ */
+	if (INTEL_GEN(dev_priv) >=9 && need_scaling && crtc_state->base.enable
+			&& adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		DRM_DEBUG_KMS("Pipe/Plane scaling not supported with IF-ID mode\n");
+		return -EINVAL;
+	}
+
 	/*
 	 * if plane is being disabled or scaler is no more required or force detach
 	 *  - free scaler binded to this plane/crtc
-- 
2.13.0

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✗ Fi.CI.BAT: warning for Handle unsupported configuration with IF-ID (rev2)

[Patchwork]

== Series Details ==

Series: Handle unsupported configuration with IF-ID (rev2)
URL   : https://patchwork.freedesktop.org/series/26546/
State : warning

== Summary ==

Series 26546v2 Handle unsupported configuration with IF-ID
https://patchwork.freedesktop.org/api/1.0/series/26546/revisions/2/mbox/

Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                pass       -> DMESG-WARN (fi-kbl-7560u) fdo#100125
Test kms_force_connector_basic:
        Subgroup force-connector-state:
                skip       -> PASS       (fi-snb-2520m) fdo#101048
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-byt-j1900)
Test drv_module_reload:
        Subgroup basic-no-display:
                pass       -> DMESG-WARN (fi-bdw-5557u) k.org#196219

fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fdo#101048 https://bugs.freedesktop.org/show_bug.cgi?id=101048
k.org#196219 https://bugzilla.kernel.org/show_bug.cgi?id=196219

fi-bdw-5557u     total:279  pass:264  dwarn:4   dfail:0   fail:0   skip:11  time:447s
fi-bdw-gvtdvm    total:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  time:428s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:352s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:536s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:507s
fi-byt-j1900     total:279  pass:253  dwarn:2   dfail:0   fail:0   skip:24  time:480s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:479s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:593s
fi-hsw-4770      total:279  pass:259  dwarn:4   dfail:0   fail:0   skip:16  time:435s
fi-hsw-4770r     total:279  pass:259  dwarn:4   dfail:0   fail:0   skip:16  time:414s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:415s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:489s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:474s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:461s
fi-kbl-7560u     total:279  pass:268  dwarn:1   dfail:0   fail:0   skip:10  time:568s
fi-kbl-r         total:279  pass:260  dwarn:1   dfail:0   fail:0   skip:18  time:584s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:558s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:458s
fi-skl-6700hq    total:279  pass:223  dwarn:1   dfail:0   fail:30  skip:24  time:342s
fi-skl-6700k     total:279  pass:257  dwarn:4   dfail:0   fail:0   skip:18  time:469s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:483s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:435s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:543s
fi-snb-2600      total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  time:404s

f7d0276ea92c21303ea253af21cfff0778ed5a39 drm-tip: 2017y-06m-29d-15h-35m-54s UTC integration manifest
a181b47 drm/i915/skl+: Scaling not supported in IF-ID Interlace mode
d8610a7 drm/i915/skl+: Check for supported plane configuration in Interlace mode

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5074/
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Re: [PATCH v2 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Ville Syrjälä]

On Thu, Jun 29, 2017 at 10:10:29PM +0530, Mahesh Kumar wrote:
> In Gen9 platform Interlaced fetch mode doesn't support following plane
> configuration:
>  - Y/Yf tiling
>  - 90/270 rotation
>  - YUV420 hybrid planar source pixel formats.
> 
> This patch adds check to fail the flip if any of the above configuration
> is requested.
> 
> Changes since V1:
>  - handle checks in intel_plane_atomic_check_with_state (ville)
>  - takeout plane scaler checks, combine with pipe scaler in next patch
> 
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_atomic_plane.c | 33 +++++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
> index 4325cb0a04f5..2b60a67c5393 100644
> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>  	struct drm_i915_private *dev_priv = to_i915(plane->dev);
>  	struct drm_plane_state *state = &intel_state->base;
>  	struct intel_plane *intel_plane = to_intel_plane(plane);
> +	const struct drm_display_mode *adjusted_mode =
> +						&crtc_state->base.adjusted_mode;

Indentation is off in several places. Pls fix your editor.

>  	int ret;
>  
>  	/*
> @@ -173,6 +175,37 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>  	if (ret)
>  		return ret;
>  
> +	/*
> +	 * Y-tiling is not supported in IF-ID Interlace mode in
> +	 * GEN9 and above.
> +	 * Scaling is not supported with Interlaced fetch mode.
> +	 * YUV420 hybrid planar source pixel formats are not supported with
> +	 * Interlaced fetch mode.
> +	 */
> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
> +			adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> +		struct drm_framebuffer *fb = state->fb;
> +		struct drm_format_name_buf format_name;
> +
> +		if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
> +		    fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
> +			return -EINVAL;
> +		}
> +
> +		switch (fb->format->format) {
> +		case DRM_FORMAT_NV12:
> +		case DRM_FORMAT_YUV420:
> +		case DRM_FORMAT_YVU420:

Non-NV12 should be dropped, but actually I think you can drop this check
entirely since skl_update_scaler() will already reject NV12 since
that always needs a scaler.

> +			DRM_DEBUG_KMS("Unsupported pixel format %s for IF-ID\n",
> +				      drm_get_format_name(fb->format->format,
> +				      &format_name));
> +			return -EINVAL;
> +		default:
> +			break;
> +		}
> +	}
> +
>  	/* FIXME pre-g4x don't work like this */
>  	if (intel_state->base.visible)
>  		crtc_state->active_planes |= BIT(intel_plane->id);
> -- 
> 2.13.0

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH v2 2/2] drm/i915/skl+: Scaling not supported in IF-ID Interlace mode

[Ville Syrjälä]

On Thu, Jun 29, 2017 at 10:10:30PM +0530, Mahesh Kumar wrote:
> GEN9+ Interlace fetch mode doesn't support pipe/plane scaling,
> This patch adds check to fail the flip if pipe/plane scaling is
> requested in Interlace fetch mode.
> 
> Changes since V1:
>  - move check to skl_update_scaler (ville)
>  - mode to adjusted_mode (ville)
>  - combine pipe/plane scaling check
> 
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 4e03ca6c946f..4f4f3d4ac297 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4612,6 +4612,9 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
>  		&crtc_state->scaler_state;
>  	struct intel_crtc *intel_crtc =
>  		to_intel_crtc(crtc_state->base.crtc);
> +	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
> +	const struct drm_display_mode *adjusted_mode =
> +		&crtc_state->base.adjusted_mode;
>  	int need_scaling;
>  
>  	/*
> @@ -4621,6 +4624,13 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
>  	 */
>  	need_scaling = src_w != dst_w || src_h != dst_h;
>  
> +	/* Scaling/fitting not supported in IF-ID mode in GEN9+ */
> +	if (INTEL_GEN(dev_priv) >=9 && need_scaling && crtc_state->base.enable
> +			&& adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {

Indentation is off, and we like to put the '&&' at the end of the
previous line rather than at the start of the new line.

> +		DRM_DEBUG_KMS("Pipe/Plane scaling not supported with IF-ID mode\n");
> +		return -EINVAL;
> +	}
> +
>  	/*
>  	 * if plane is being disabled or scaler is no more required or force detach
>  	 *  - free scaler binded to this plane/crtc
> -- 
> 2.13.0

-- 
Ville Syrjälä
Intel OTC
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