[PATCH v3 0/2] Handle unsupported configuration with IF-ID

[PATCH v3 0/2] Handle unsupported configuration with IF-ID

[Mahesh Kumar]

Gen9+ Interlace fetch mode doesn't support few plane configurations & pipe scaling.
 - Y-tile
 - 90/270 rotation
 - pipe/plane scaling
 - 420 planar formats

Changes since V2:
 - Address review comments from ville

Mahesh Kumar (2):
  drm/i915/skl+: Check for supported plane configuration in Interlace
    mode
  drm/i915/skl+: Scaling not supported in IF-ID Interlace mode

 drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
 drivers/gpu/drm/i915/intel_display.c      | 15 +++++++++++++++
 2 files changed, 30 insertions(+)

-- 
2.13.0

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[PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Mahesh Kumar]

In Gen9 platform Interlaced fetch mode doesn't support following plane
configuration:
 - Y/Yf tiling
 - 90/270 rotation
 - YUV420 hybrid planar source pixel formats.

This patch adds check to fail the flip if any of the above configuration
is requested.

Changes since V1:
 - handle checks in intel_plane_atomic_check_with_state (ville)
 - takeout plane scaler checks combile with pipe scaler in next patch
Changes since V2:
 - No need to check for NV12 as it need scaling, so it will be rejected
   by scaling check (ville)

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 4325cb0a04f5..ee76fab7bb6f 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
 	struct drm_i915_private *dev_priv = to_i915(plane->dev);
 	struct drm_plane_state *state = &intel_state->base;
 	struct intel_plane *intel_plane = to_intel_plane(plane);
+	const struct drm_display_mode *adjusted_mode =
+		&crtc_state->base.adjusted_mode;
 	int ret;
 
 	/*
@@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
 	if (ret)
 		return ret;
 
+	/*
+	 * Y-tiling is not supported in IF-ID Interlace mode in
+	 * GEN9 and above.
+	 */
+	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
+	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
+			return -EINVAL;
+		}
+	}
+
 	/* FIXME pre-g4x don't work like this */
 	if (intel_state->base.visible)
 		crtc_state->active_planes |= BIT(intel_plane->id);
-- 
2.13.0

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[PATCH v3 2/2] drm/i915/skl+: Scaling not supported in IF-ID Interlace mode

[Mahesh Kumar]

GEN9+ Interlace fetch mode doesn't support pipe/plane scaling,
This patch adds check to fail the flip if pipe/plane scaling is
requested in Interlace fetch mode.

Changes since V1:
 - move check to skl_update_scaler (ville)
 - mode to adjusted_mode (ville)
 - combine pipe/plane scaling check
Changes since V2:
 - Indentation fix
 - Added TODO to handle/reject NV12 with interlace mode

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4e03ca6c946f..059e74170a59 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4612,6 +4612,9 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
 		&crtc_state->scaler_state;
 	struct intel_crtc *intel_crtc =
 		to_intel_crtc(crtc_state->base.crtc);
+	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
+	const struct drm_display_mode *adjusted_mode =
+		&crtc_state->base.adjusted_mode;
 	int need_scaling;
 
 	/*
@@ -4622,6 +4625,18 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
 	need_scaling = src_w != dst_w || src_h != dst_h;
 
 	/*
+	 * Scaling/fitting not supported in IF-ID mode in GEN9+
+	 * TODO: Interlace fetch mode doesn't support YUV420 planar formats.
+	 * Once NV12 is enabled, handle it here while allocating scaler
+	 * for NV12.
+	 */
+	if (INTEL_GEN(dev_priv) >=9 && crtc_state->base.enable &&
+	    need_scaling && adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		DRM_DEBUG_KMS("Pipe/Plane scaling not supported with IF-ID mode\n");
+		return -EINVAL;
+	}
+
+	/*
 	 * if plane is being disabled or scaler is no more required or force detach
 	 *  - free scaler binded to this plane/crtc
 	 *  - in order to do this, update crtc->scaler_usage
-- 
2.13.0

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Re: [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Ville Syrjälä]

On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
> In Gen9 platform Interlaced fetch mode doesn't support following plane
> configuration:
>  - Y/Yf tiling
>  - 90/270 rotation

The rotation check seems to be missing from the code?

>  - YUV420 hybrid planar source pixel formats.
> 
> This patch adds check to fail the flip if any of the above configuration
> is requested.
> 
> Changes since V1:
>  - handle checks in intel_plane_atomic_check_with_state (ville)
>  - takeout plane scaler checks combile with pipe scaler in next patch
> Changes since V2:
>  - No need to check for NV12 as it need scaling, so it will be rejected
>    by scaling check (ville)
> 
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
> index 4325cb0a04f5..ee76fab7bb6f 100644
> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>  	struct drm_i915_private *dev_priv = to_i915(plane->dev);
>  	struct drm_plane_state *state = &intel_state->base;
>  	struct intel_plane *intel_plane = to_intel_plane(plane);
> +	const struct drm_display_mode *adjusted_mode =
> +		&crtc_state->base.adjusted_mode;
>  	int ret;
>  
>  	/*
> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>  	if (ret)
>  		return ret;
>  
> +	/*
> +	 * Y-tiling is not supported in IF-ID Interlace mode in
> +	 * GEN9 and above.
> +	 */
> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
> +			return -EINVAL;
> +		}
> +	}
> +
>  	/* FIXME pre-g4x don't work like this */
>  	if (intel_state->base.visible)
>  		crtc_state->active_planes |= BIT(intel_plane->id);
> -- 
> 2.13.0

-- 
Ville Syrjälä
Intel OTC
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✗ Fi.CI.BAT: failure for Handle unsupported configuration with IF-ID (rev3)

[Patchwork]

== Series Details ==

Series: Handle unsupported configuration with IF-ID (rev3)
URL   : https://patchwork.freedesktop.org/series/26546/
State : failure

== Summary ==

Series 26546v3 Handle unsupported configuration with IF-ID
https://patchwork.freedesktop.org/api/1.0/series/26546/revisions/3/mbox/

Test core_auth:
        Subgroup basic-auth:
                pass       -> INCOMPLETE (fi-skl-6700k)
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                dmesg-warn -> PASS       (fi-pnv-d510) fdo#101597

fdo#101597 https://bugs.freedesktop.org/show_bug.cgi?id=101597

fi-bdw-5557u     total:279  pass:264  dwarn:0   dfail:0   fail:3   skip:11  time:434s
fi-bdw-gvtdvm    total:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  time:430s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:352s
fi-bsw-n3050     total:279  pass:239  dwarn:0   dfail:0   fail:3   skip:36  time:512s
fi-bxt-j4205     total:279  pass:256  dwarn:0   dfail:0   fail:3   skip:19  time:510s
fi-byt-j1900     total:279  pass:250  dwarn:1   dfail:0   fail:3   skip:24  time:477s
fi-byt-n2820     total:279  pass:246  dwarn:1   dfail:0   fail:3   skip:28  time:480s
fi-glk-2a        total:279  pass:256  dwarn:0   dfail:0   fail:3   skip:19  time:585s
fi-hsw-4770      total:279  pass:259  dwarn:0   dfail:0   fail:3   skip:16  time:431s
fi-hsw-4770r     total:279  pass:259  dwarn:0   dfail:0   fail:3   skip:16  time:417s
fi-ilk-650       total:279  pass:225  dwarn:0   dfail:0   fail:3   skip:50  time:414s
fi-ivb-3520m     total:279  pass:257  dwarn:0   dfail:0   fail:3   skip:18  time:487s
fi-ivb-3770      total:279  pass:257  dwarn:0   dfail:0   fail:3   skip:18  time:467s
fi-kbl-7500u     total:279  pass:257  dwarn:0   dfail:0   fail:3   skip:18  time:462s
fi-kbl-7560u     total:279  pass:265  dwarn:0   dfail:0   fail:3   skip:10  time:559s
fi-kbl-r         total:279  pass:256  dwarn:1   dfail:0   fail:3   skip:18  time:563s
fi-pnv-d510      total:279  pass:222  dwarn:2   dfail:0   fail:0   skip:55  time:564s
fi-skl-6260u     total:279  pass:265  dwarn:0   dfail:0   fail:3   skip:10  time:453s
fi-skl-6700hq    total:279  pass:219  dwarn:1   dfail:0   fail:33  skip:24  time:328s
fi-skl-6700k     total:42   pass:0    dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-6770hq    total:279  pass:264  dwarn:0   dfail:0   fail:4   skip:10  time:457s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:433s
fi-snb-2520m     total:279  pass:247  dwarn:0   dfail:0   fail:3   skip:28  time:532s
fi-snb-2600      total:279  pass:246  dwarn:0   dfail:0   fail:3   skip:29  time:405s

052c9c3244e7417a28637f8f039db7a0244fad31 drm-tip: 2017y-06m-30d-11h-41m-52s UTC integration manifest
1b017b8 drm/i915/skl+: Scaling not supported in IF-ID Interlace mode
88397c2c drm/i915/skl+: Check for supported plane configuration in Interlace mode

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5078/
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Re: [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Mahesh Kumar]

Hi,


On Friday 30 June 2017 05:56 PM, Ville Syrjälä wrote:
> On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
>> In Gen9 platform Interlaced fetch mode doesn't support following plane
>> configuration:
>>   - Y/Yf tiling
>>   - 90/270 rotation
> The rotation check seems to be missing from the code?
90/270 rotation require Y/Yf tiling, so that will be automagically 
handled as Y-tile case.

-Mahesh
>
>>   - YUV420 hybrid planar source pixel formats.
>>
>> This patch adds check to fail the flip if any of the above configuration
>> is requested.
>>
>> Changes since V1:
>>   - handle checks in intel_plane_atomic_check_with_state (ville)
>>   - takeout plane scaler checks combile with pipe scaler in next patch
>> Changes since V2:
>>   - No need to check for NV12 as it need scaling, so it will be rejected
>>     by scaling check (ville)
>>
>> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
>>   1 file changed, 15 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
>> index 4325cb0a04f5..ee76fab7bb6f 100644
>> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
>> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
>> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>>   	struct drm_i915_private *dev_priv = to_i915(plane->dev);
>>   	struct drm_plane_state *state = &intel_state->base;
>>   	struct intel_plane *intel_plane = to_intel_plane(plane);
>> +	const struct drm_display_mode *adjusted_mode =
>> +		&crtc_state->base.adjusted_mode;
>>   	int ret;
>>   
>>   	/*
>> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>>   	if (ret)
>>   		return ret;
>>   
>> +	/*
>> +	 * Y-tiling is not supported in IF-ID Interlace mode in
>> +	 * GEN9 and above.
>> +	 */
>> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
>> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
>> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
>> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
>> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
>> +			return -EINVAL;
>> +		}
>> +	}
>> +
>>   	/* FIXME pre-g4x don't work like this */
>>   	if (intel_state->base.visible)
>>   		crtc_state->active_planes |= BIT(intel_plane->id);
>> -- 
>> 2.13.0

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Re: [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Ville Syrjälä]

On Sat, Jul 01, 2017 at 09:35:12AM +0530, Mahesh Kumar wrote:
> Hi,
> 
> 
> On Friday 30 June 2017 05:56 PM, Ville Syrjälä wrote:
> > On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
> >> In Gen9 platform Interlaced fetch mode doesn't support following plane
> >> configuration:
> >>   - Y/Yf tiling
> >>   - 90/270 rotation
> > The rotation check seems to be missing from the code?
> 90/270 rotation require Y/Yf tiling, so that will be automagically 
> handled as Y-tile case.

Right. OK, series lgtm
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Was there a bugzilla link we should include in these patches?

> 
> -Mahesh
> >
> >>   - YUV420 hybrid planar source pixel formats.
> >>
> >> This patch adds check to fail the flip if any of the above configuration
> >> is requested.
> >>
> >> Changes since V1:
> >>   - handle checks in intel_plane_atomic_check_with_state (ville)
> >>   - takeout plane scaler checks combile with pipe scaler in next patch
> >> Changes since V2:
> >>   - No need to check for NV12 as it need scaling, so it will be rejected
> >>     by scaling check (ville)
> >>
> >> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
> >>   1 file changed, 15 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
> >> index 4325cb0a04f5..ee76fab7bb6f 100644
> >> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> >> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> >> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
> >>   	struct drm_i915_private *dev_priv = to_i915(plane->dev);
> >>   	struct drm_plane_state *state = &intel_state->base;
> >>   	struct intel_plane *intel_plane = to_intel_plane(plane);
> >> +	const struct drm_display_mode *adjusted_mode =
> >> +		&crtc_state->base.adjusted_mode;
> >>   	int ret;
> >>   
> >>   	/*
> >> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
> >>   	if (ret)
> >>   		return ret;
> >>   
> >> +	/*
> >> +	 * Y-tiling is not supported in IF-ID Interlace mode in
> >> +	 * GEN9 and above.
> >> +	 */
> >> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
> >> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> >> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
> >> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
> >> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
> >> +			return -EINVAL;
> >> +		}
> >> +	}
> >> +
> >>   	/* FIXME pre-g4x don't work like this */
> >>   	if (intel_state->base.visible)
> >>   		crtc_state->active_planes |= BIT(intel_plane->id);
> >> -- 
> >> 2.13.0

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Mahesh Kumar]

Hi,


On Monday 03 July 2017 07:32 PM, Ville Syrjälä wrote:
> On Sat, Jul 01, 2017 at 09:35:12AM +0530, Mahesh Kumar wrote:
>> Hi,
>>
>>
>> On Friday 30 June 2017 05:56 PM, Ville Syrjälä wrote:
>>> On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
>>>> In Gen9 platform Interlaced fetch mode doesn't support following plane
>>>> configuration:
>>>>    - Y/Yf tiling
>>>>    - 90/270 rotation
>>> The rotation check seems to be missing from the code?
>> 90/270 rotation require Y/Yf tiling, so that will be automagically
>> handled as Y-tile case.
> Right. OK, series lgtm
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Was there a bugzilla link we should include in these patches?
following is bugzilla link for the issue.
https://bugs.freedesktop.org/show_bug.cgi?id=90238

-Mahesh
>
>> -Mahesh
>>>>    - YUV420 hybrid planar source pixel formats.
>>>>
>>>> This patch adds check to fail the flip if any of the above configuration
>>>> is requested.
>>>>
>>>> Changes since V1:
>>>>    - handle checks in intel_plane_atomic_check_with_state (ville)
>>>>    - takeout plane scaler checks combile with pipe scaler in next patch
>>>> Changes since V2:
>>>>    - No need to check for NV12 as it need scaling, so it will be rejected
>>>>      by scaling check (ville)
>>>>
>>>> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
>>>> ---
>>>>    drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
>>>>    1 file changed, 15 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
>>>> index 4325cb0a04f5..ee76fab7bb6f 100644
>>>> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
>>>> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
>>>> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>>>>    	struct drm_i915_private *dev_priv = to_i915(plane->dev);
>>>>    	struct drm_plane_state *state = &intel_state->base;
>>>>    	struct intel_plane *intel_plane = to_intel_plane(plane);
>>>> +	const struct drm_display_mode *adjusted_mode =
>>>> +		&crtc_state->base.adjusted_mode;
>>>>    	int ret;
>>>>    
>>>>    	/*
>>>> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>>>>    	if (ret)
>>>>    		return ret;
>>>>    
>>>> +	/*
>>>> +	 * Y-tiling is not supported in IF-ID Interlace mode in
>>>> +	 * GEN9 and above.
>>>> +	 */
>>>> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
>>>> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
>>>> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
>>>> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
>>>> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
>>>> +			return -EINVAL;
>>>> +		}
>>>> +	}
>>>> +
>>>>    	/* FIXME pre-g4x don't work like this */
>>>>    	if (intel_state->base.visible)
>>>>    		crtc_state->active_planes |= BIT(intel_plane->id);
>>>> -- 
>>>> 2.13.0

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✓ Fi.CI.BAT: success for Handle unsupported configuration with IF-ID (rev3)

[Patchwork]

== Series Details ==

Series: Handle unsupported configuration with IF-ID (rev3)
URL   : https://patchwork.freedesktop.org/series/26546/
State : success

== Summary ==

Series 26546v3 Handle unsupported configuration with IF-ID
https://patchwork.freedesktop.org/api/1.0/series/26546/revisions/3/mbox/

Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                dmesg-warn -> PASS       (fi-kbl-7560u) fdo#100125
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-pnv-d510) fdo#101597
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (fi-byt-j1900) fdo#101516

fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fdo#101597 https://bugs.freedesktop.org/show_bug.cgi?id=101597
fdo#101516 https://bugs.freedesktop.org/show_bug.cgi?id=101516

fi-bdw-5557u     total:279  pass:264  dwarn:0   dfail:0   fail:3   skip:11  time:440s
fi-bdw-gvtdvm    total:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  time:428s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:356s
fi-bsw-n3050     total:279  pass:239  dwarn:0   dfail:0   fail:3   skip:36  time:511s
fi-bxt-j4205     total:279  pass:256  dwarn:0   dfail:0   fail:3   skip:19  time:499s
fi-byt-j1900     total:279  pass:251  dwarn:0   dfail:0   fail:3   skip:24  time:479s
fi-byt-n2820     total:279  pass:246  dwarn:1   dfail:0   fail:3   skip:28  time:475s
fi-glk-2a        total:279  pass:256  dwarn:0   dfail:0   fail:3   skip:19  time:586s
fi-hsw-4770      total:279  pass:259  dwarn:0   dfail:0   fail:3   skip:16  time:433s
fi-hsw-4770r     total:279  pass:259  dwarn:0   dfail:0   fail:3   skip:16  time:410s
fi-ilk-650       total:279  pass:225  dwarn:0   dfail:0   fail:3   skip:50  time:412s
fi-ivb-3520m     total:279  pass:257  dwarn:0   dfail:0   fail:3   skip:18  time:497s
fi-ivb-3770      total:279  pass:257  dwarn:0   dfail:0   fail:3   skip:18  time:473s
fi-kbl-7500u     total:279  pass:257  dwarn:0   dfail:0   fail:3   skip:18  time:466s
fi-kbl-7560u     total:279  pass:265  dwarn:0   dfail:0   fail:3   skip:10  time:557s
fi-kbl-r         total:279  pass:256  dwarn:1   dfail:0   fail:3   skip:18  time:564s
fi-pnv-d510      total:279  pass:222  dwarn:2   dfail:0   fail:0   skip:55  time:557s
fi-skl-6260u     total:279  pass:265  dwarn:0   dfail:0   fail:3   skip:10  time:449s
fi-skl-6700hq    total:279  pass:219  dwarn:1   dfail:0   fail:33  skip:24  time:303s
fi-skl-6700k     total:279  pass:257  dwarn:0   dfail:0   fail:3   skip:18  time:466s
fi-skl-6770hq    total:279  pass:265  dwarn:0   dfail:0   fail:3   skip:10  time:476s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:435s
fi-snb-2520m     total:279  pass:247  dwarn:0   dfail:0   fail:3   skip:28  time:536s
fi-snb-2600      total:279  pass:246  dwarn:0   dfail:0   fail:3   skip:29  time:405s

df0182c2c95385492772c6e4ace76b463298b8ca drm-tip: 2017y-07m-03d-13h-20m-24s UTC integration manifest
918e413 drm/i915/skl+: Scaling not supported in IF-ID Interlace mode
03e83e5 drm/i915/skl+: Check for supported plane configuration in Interlace mode

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5099/
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Re: [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Ville Syrjälä]

On Mon, Jul 03, 2017 at 09:28:00PM +0530, Mahesh Kumar wrote:
> Hi,
> 
> 
> On Monday 03 July 2017 07:32 PM, Ville Syrjälä wrote:
> > On Sat, Jul 01, 2017 at 09:35:12AM +0530, Mahesh Kumar wrote:
> >> Hi,
> >>
> >>
> >> On Friday 30 June 2017 05:56 PM, Ville Syrjälä wrote:
> >>> On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
> >>>> In Gen9 platform Interlaced fetch mode doesn't support following plane
> >>>> configuration:
> >>>>    - Y/Yf tiling
> >>>>    - 90/270 rotation
> >>> The rotation check seems to be missing from the code?
> >> 90/270 rotation require Y/Yf tiling, so that will be automagically
> >> handled as Y-tile case.
> > Right. OK, series lgtm
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Was there a bugzilla link we should include in these patches?
> following is bugzilla link for the issue.
> https://bugs.freedesktop.org/show_bug.cgi?id=90238

Added that, and pushed the series to dinq. Thanks for the patches.

I had to fix a small checkpatch complaint while applying. Plase always
review the checkpatch warnings when submitting patches.

> 
> -Mahesh
> >
> >> -Mahesh
> >>>>    - YUV420 hybrid planar source pixel formats.
> >>>>
> >>>> This patch adds check to fail the flip if any of the above configuration
> >>>> is requested.
> >>>>
> >>>> Changes since V1:
> >>>>    - handle checks in intel_plane_atomic_check_with_state (ville)
> >>>>    - takeout plane scaler checks combile with pipe scaler in next patch
> >>>> Changes since V2:
> >>>>    - No need to check for NV12 as it need scaling, so it will be rejected
> >>>>      by scaling check (ville)
> >>>>
> >>>> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> >>>> ---
> >>>>    drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
> >>>>    1 file changed, 15 insertions(+)
> >>>>
> >>>> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
> >>>> index 4325cb0a04f5..ee76fab7bb6f 100644
> >>>> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> >>>> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> >>>> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
> >>>>    	struct drm_i915_private *dev_priv = to_i915(plane->dev);
> >>>>    	struct drm_plane_state *state = &intel_state->base;
> >>>>    	struct intel_plane *intel_plane = to_intel_plane(plane);
> >>>> +	const struct drm_display_mode *adjusted_mode =
> >>>> +		&crtc_state->base.adjusted_mode;
> >>>>    	int ret;
> >>>>    
> >>>>    	/*
> >>>> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
> >>>>    	if (ret)
> >>>>    		return ret;
> >>>>    
> >>>> +	/*
> >>>> +	 * Y-tiling is not supported in IF-ID Interlace mode in
> >>>> +	 * GEN9 and above.
> >>>> +	 */
> >>>> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
> >>>> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> >>>> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
> >>>> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
> >>>> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
> >>>> +			return -EINVAL;
> >>>> +		}
> >>>> +	}
> >>>> +
> >>>>    	/* FIXME pre-g4x don't work like this */
> >>>>    	if (intel_state->base.visible)
> >>>>    		crtc_state->active_planes |= BIT(intel_plane->id);
> >>>> -- 
> >>>> 2.13.0

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Mahesh Kumar]

Hi,


On Tuesday 04 July 2017 08:11 PM, Ville Syrjälä wrote:
> On Mon, Jul 03, 2017 at 09:28:00PM +0530, Mahesh Kumar wrote:
>> Hi,
>>
>>
>> On Monday 03 July 2017 07:32 PM, Ville Syrjälä wrote:
>>> On Sat, Jul 01, 2017 at 09:35:12AM +0530, Mahesh Kumar wrote:
>>>> Hi,
>>>>
>>>>
>>>> On Friday 30 June 2017 05:56 PM, Ville Syrjälä wrote:
>>>>> On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
>>>>>> In Gen9 platform Interlaced fetch mode doesn't support following plane
>>>>>> configuration:
>>>>>>     - Y/Yf tiling
>>>>>>     - 90/270 rotation
>>>>> The rotation check seems to be missing from the code?
>>>> 90/270 rotation require Y/Yf tiling, so that will be automagically
>>>> handled as Y-tile case.
>>> Right. OK, series lgtm
>>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>
>>> Was there a bugzilla link we should include in these patches?
>> following is bugzilla link for the issue.
>> https://bugs.freedesktop.org/show_bug.cgi?id=90238
> Added that, and pushed the series to dinq. Thanks for the patches.
>
> I had to fix a small checkpatch complaint while applying. Plase always
> review the checkpatch warnings when submitting patches.
ok sure, will start reviewing checkpatch warnings.
thanks for review,
Do we need to push these patches to "stable" as well?
for enabling PF-ID Interlace mode what should be the approach?
Should we always enable PF-ID in GEN9+, or should we create property to 
select the fetching mode?
for property based implementation who will be the user-space consumer 
for property?
Please let me know your thoughts on that.
thanks,

-Mahesh
>
>> -Mahesh
>>>> -Mahesh
>>>>>>     - YUV420 hybrid planar source pixel formats.
>>>>>>
>>>>>> This patch adds check to fail the flip if any of the above configuration
>>>>>> is requested.
>>>>>>
>>>>>> Changes since V1:
>>>>>>     - handle checks in intel_plane_atomic_check_with_state (ville)
>>>>>>     - takeout plane scaler checks combile with pipe scaler in next patch
>>>>>> Changes since V2:
>>>>>>     - No need to check for NV12 as it need scaling, so it will be rejected
>>>>>>       by scaling check (ville)
>>>>>>
>>>>>> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
>>>>>> ---
>>>>>>     drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
>>>>>>     1 file changed, 15 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
>>>>>> index 4325cb0a04f5..ee76fab7bb6f 100644
>>>>>> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
>>>>>> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
>>>>>> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>>>>>>     	struct drm_i915_private *dev_priv = to_i915(plane->dev);
>>>>>>     	struct drm_plane_state *state = &intel_state->base;
>>>>>>     	struct intel_plane *intel_plane = to_intel_plane(plane);
>>>>>> +	const struct drm_display_mode *adjusted_mode =
>>>>>> +		&crtc_state->base.adjusted_mode;
>>>>>>     	int ret;
>>>>>>     
>>>>>>     	/*
>>>>>> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>>>>>>     	if (ret)
>>>>>>     		return ret;
>>>>>>     
>>>>>> +	/*
>>>>>> +	 * Y-tiling is not supported in IF-ID Interlace mode in
>>>>>> +	 * GEN9 and above.
>>>>>> +	 */
>>>>>> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
>>>>>> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
>>>>>> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
>>>>>> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
>>>>>> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
>>>>>> +			return -EINVAL;
>>>>>> +		}
>>>>>> +	}
>>>>>> +
>>>>>>     	/* FIXME pre-g4x don't work like this */
>>>>>>     	if (intel_state->base.visible)
>>>>>>     		crtc_state->active_planes |= BIT(intel_plane->id);
>>>>>> -- 
>>>>>> 2.13.0

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Re: [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Ville Syrjälä]

On Wed, Jul 05, 2017 at 12:09:19PM +0530, Mahesh Kumar wrote:
> Hi,
> 
> 
> On Tuesday 04 July 2017 08:11 PM, Ville Syrjälä wrote:
> > On Mon, Jul 03, 2017 at 09:28:00PM +0530, Mahesh Kumar wrote:
> >> Hi,
> >>
> >>
> >> On Monday 03 July 2017 07:32 PM, Ville Syrjälä wrote:
> >>> On Sat, Jul 01, 2017 at 09:35:12AM +0530, Mahesh Kumar wrote:
> >>>> Hi,
> >>>>
> >>>>
> >>>> On Friday 30 June 2017 05:56 PM, Ville Syrjälä wrote:
> >>>>> On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
> >>>>>> In Gen9 platform Interlaced fetch mode doesn't support following plane
> >>>>>> configuration:
> >>>>>>     - Y/Yf tiling
> >>>>>>     - 90/270 rotation
> >>>>> The rotation check seems to be missing from the code?
> >>>> 90/270 rotation require Y/Yf tiling, so that will be automagically
> >>>> handled as Y-tile case.
> >>> Right. OK, series lgtm
> >>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>
> >>> Was there a bugzilla link we should include in these patches?
> >> following is bugzilla link for the issue.
> >> https://bugs.freedesktop.org/show_bug.cgi?id=90238
> > Added that, and pushed the series to dinq. Thanks for the patches.
> >
> > I had to fix a small checkpatch complaint while applying. Plase always
> > review the checkpatch warnings when submitting patches.
> ok sure, will start reviewing checkpatch warnings.
> thanks for review,
> Do we need to push these patches to "stable" as well?

I was initially thinking of adding cc:stable, but forgot. In the end
I think this combination might be rare enough that we might not have
to bother unless we get an actual bug report.

> for enabling PF-ID Interlace mode what should be the approach?
> Should we always enable PF-ID in GEN9+, or should we create property to 
> select the fetching mode?

I'm a bit leery on always enabling it becasue that means you can no
longer present interlaced material properly. It sounds a bit unlikely
that anyone would explicitly choose to use an interlaced mode for
progressive material when there's progressive mode available. Not
sure if such crappy TVs exist anymore that can't do eg. 1080p but
can do 1080i. I would hope not.

> for property based implementation who will be the user-space consumer 
> for property?

If it were a connector property then I think X should pick it up
automatically. But would anyone actually use it? I don't know.

> Please let me know your thoughts on that.
> thanks,
> 
> -Mahesh
> >
> >> -Mahesh
> >>>> -Mahesh
> >>>>>>     - YUV420 hybrid planar source pixel formats.
> >>>>>>
> >>>>>> This patch adds check to fail the flip if any of the above configuration
> >>>>>> is requested.
> >>>>>>
> >>>>>> Changes since V1:
> >>>>>>     - handle checks in intel_plane_atomic_check_with_state (ville)
> >>>>>>     - takeout plane scaler checks combile with pipe scaler in next patch
> >>>>>> Changes since V2:
> >>>>>>     - No need to check for NV12 as it need scaling, so it will be rejected
> >>>>>>       by scaling check (ville)
> >>>>>>
> >>>>>> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> >>>>>> ---
> >>>>>>     drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
> >>>>>>     1 file changed, 15 insertions(+)
> >>>>>>
> >>>>>> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
> >>>>>> index 4325cb0a04f5..ee76fab7bb6f 100644
> >>>>>> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> >>>>>> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> >>>>>> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
> >>>>>>     	struct drm_i915_private *dev_priv = to_i915(plane->dev);
> >>>>>>     	struct drm_plane_state *state = &intel_state->base;
> >>>>>>     	struct intel_plane *intel_plane = to_intel_plane(plane);
> >>>>>> +	const struct drm_display_mode *adjusted_mode =
> >>>>>> +		&crtc_state->base.adjusted_mode;
> >>>>>>     	int ret;
> >>>>>>     
> >>>>>>     	/*
> >>>>>> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
> >>>>>>     	if (ret)
> >>>>>>     		return ret;
> >>>>>>     
> >>>>>> +	/*
> >>>>>> +	 * Y-tiling is not supported in IF-ID Interlace mode in
> >>>>>> +	 * GEN9 and above.
> >>>>>> +	 */
> >>>>>> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
> >>>>>> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> >>>>>> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
> >>>>>> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
> >>>>>> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
> >>>>>> +			return -EINVAL;
> >>>>>> +		}
> >>>>>> +	}
> >>>>>> +
> >>>>>>     	/* FIXME pre-g4x don't work like this */
> >>>>>>     	if (intel_state->base.visible)
> >>>>>>     		crtc_state->active_planes |= BIT(intel_plane->id);
> >>>>>> -- 
> >>>>>> 2.13.0

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH v3 0/2] Handle unsupported configuration with IF-ID

[Daniel Vetter]

On Fri, Jun 30, 2017 at 05:40:58PM +0530, Mahesh Kumar wrote:
> Gen9+ Interlace fetch mode doesn't support few plane configurations & pipe scaling.
>  - Y-tile
>  - 90/270 rotation
>  - pipe/plane scaling
>  - 420 planar formats

Do we have igt testcases that try to exercise all this? When fixing bugs,
pls make sure you don't fix the bugs, but also make sure we have solid
coverage. Given that this escaped for years, it's very likely our coverage
is _really_ bad and needs to be improve a lot for testing interlaced modes
...

Thanks, Daniel

> 
> Changes since V2:
>  - Address review comments from ville
> 
> Mahesh Kumar (2):
>   drm/i915/skl+: Check for supported plane configuration in Interlace
>     mode
>   drm/i915/skl+: Scaling not supported in IF-ID Interlace mode
> 
>  drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
>  drivers/gpu/drm/i915/intel_display.c      | 15 +++++++++++++++
>  2 files changed, 30 insertions(+)
> 
> -- 
> 2.13.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH v3 0/2] Handle unsupported configuration with IF-ID

[Mahesh Kumar]

[-- Attachment #1.1: Type: text/plain, Size: 2153 bytes --]

Hi Daniel,


On Monday 17 July 2017 12:56 PM, Daniel Vetter wrote:
> On Fri, Jun 30, 2017 at 05:40:58PM +0530, Mahesh Kumar wrote:
>> Gen9+ Interlace fetch mode doesn't support few plane configurations & pipe scaling.
>>   - Y-tile
>>   - 90/270 rotation
>>   - pipe/plane scaling
>>   - 420 planar formats
> Do we have igt testcases that try to exercise all this? When fixing bugs,
> pls make sure you don't fix the bugs, but also make sure we have solid
> coverage. Given that this escaped for years, it's very likely our coverage
> is _really_ bad and needs to be improve a lot for testing interlaced modes
> ...
We have testdisplay with -y option to test Y-tiling (90/270 rotation 
need Y-tiling so those are also covered).
But AFAIK we don't have any testcase to verify scaling with Interlace 
mode & other combinations.
Should we extend existing IGT test for 
scaling/rotation/tiling/pixel-format to include Interlace mode as well, 
or should we have a separate Interlace mode specific IGT
which will exercise all combinations with all Interlace modes?

As IF-ID mode doesn't support all the above combination but *PF-ID mode 
does support them* from GEN9(scaling Y-tile 90/270 rotation etc). So I 
submitted a patch to always enable PF-ID mode for Interlace
https://patchwork.freedesktop.org/patch/160275/
But Ville suggested not to always enable PF-ID mode instead control 
fetching mode based on property.
Currently there is no open source user for this property. What will you 
suggest here?

Thanks,
-Mahesh
> Thanks, Daniel
>
>> Changes since V2:
>>   - Address review comments from ville
>>
>> Mahesh Kumar (2):
>>    drm/i915/skl+: Check for supported plane configuration in Interlace
>>      mode
>>    drm/i915/skl+: Scaling not supported in IF-ID Interlace mode
>>
>>   drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
>>   drivers/gpu/drm/i915/intel_display.c      | 15 +++++++++++++++
>>   2 files changed, 30 insertions(+)
>>
>> -- 
>> 2.13.0
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx


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Re: [PATCH v3 0/2] Handle unsupported configuration with IF-ID

[Lankhorst, Maarten]

Mahesh Kumar schreef op di 18-07-2017 om 18:12 [+0530]:
> Hi Daniel,
> 
> On Monday 17 July 2017 12:56 PM, Daniel Vetter wrote:
> > On Fri, Jun 30, 2017 at 05:40:58PM +0530, Mahesh Kumar wrote:
> > > Gen9+ Interlace fetch mode doesn't support few plane
> > > configurations & pipe scaling.
> > >  - Y-tile
> > >  - 90/270 rotation
> > >  - pipe/plane scaling
> > >  - 420 planar formats
> > 
> > Do we have igt testcases that try to exercise all this? When fixing
> > bugs,
> > pls make sure you don't fix the bugs, but also make sure we have
> > solid
> > coverage. Given that this escaped for years, it's very likely our
> > coverage
> > is _really_ bad and needs to be improve a lot for testing
> > interlaced modes
> > ...
>  We have testdisplay with -y option to test Y-tiling (90/270 rotation
> need Y-tiling so those are also covered).
> But AFAIK we don't have any testcase to verify scaling with Interlace
> mode & other combinations.
> Should we extend existing IGT test for scaling/rotation/tiling/pixel-
> format to include Interlace mode as well, or should we have a
> separate Interlace mode specific IGT
> which will exercise all combinations with all Interlace modes?

We need separate tests. testdisplay is nice for testing, but it's not
automated. Ideally something that runs on all supported platforms,
regardless of having an actual interlaced display connected. We do
allow mode override with igt_output_override_mode, which could be used
for this.

> As IF-ID mode doesn't support all the above combination but PF-ID
> mode does support them from GEN9(scaling Y-tile 90/270 rotation etc).
> So I submitted a patch to always enable PF-ID mode for Interlace
> https://patchwork.freedesktop.org/patch/160275/
> But Ville suggested not to always enable PF-ID mode instead control
> fetching mode based on property.
> Currently there is no open source user for this property. What will
> you suggest here?
> 
> Thanks,
> -Mahesh
> > Thanks, Daniel
> > 
> > > Changes since V2:
> > >  - Address review comments from ville
> > > 
> > > Mahesh Kumar (2):
> > >   drm/i915/skl+: Check for supported plane configuration in
> > > Interlace
> > >     mode
> > >   drm/i915/skl+: Scaling not supported in IF-ID Interlace mode
> > > 
> > >  drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
> > >  drivers/gpu/drm/i915/intel_display.c      | 15 +++++++++++++++
> > >  2 files changed, 30 insertions(+)
> > > 
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Re: [PATCH v3 0/2] Handle unsupported configuration with IF-ID

[Daniel Vetter]

On Wed, Jul 19, 2017 at 08:22:03AM +0000, Lankhorst, Maarten wrote:
> Mahesh Kumar schreef op di 18-07-2017 om 18:12 [+0530]:
> > Hi Daniel,
> > 
> > On Monday 17 July 2017 12:56 PM, Daniel Vetter wrote:
> > > On Fri, Jun 30, 2017 at 05:40:58PM +0530, Mahesh Kumar wrote:
> > > > Gen9+ Interlace fetch mode doesn't support few plane
> > > > configurations & pipe scaling.
> > > >  - Y-tile
> > > >  - 90/270 rotation
> > > >  - pipe/plane scaling
> > > >  - 420 planar formats
> > > 
> > > Do we have igt testcases that try to exercise all this? When fixing
> > > bugs,
> > > pls make sure you don't fix the bugs, but also make sure we have
> > > solid
> > > coverage. Given that this escaped for years, it's very likely our
> > > coverage
> > > is _really_ bad and needs to be improve a lot for testing
> > > interlaced modes
> > > ...
> >  We have testdisplay with -y option to test Y-tiling (90/270 rotation
> > need Y-tiling so those are also covered).
> > But AFAIK we don't have any testcase to verify scaling with Interlace
> > mode & other combinations.
> > Should we extend existing IGT test for scaling/rotation/tiling/pixel-
> > format to include Interlace mode as well, or should we have a
> > separate Interlace mode specific IGT
> > which will exercise all combinations with all Interlace modes?
> 
> We need separate tests. testdisplay is nice for testing, but it's not
> automated. Ideally something that runs on all supported platforms,
> regardless of having an actual interlaced display connected. We do
> allow mode override with igt_output_override_mode, which could be used
> for this.

+1, testdisplay is not fully automated validation. We should probably move
it over to tools, really doesn't belong into the igt testcase folder.
-Daniel

> 
> > As IF-ID mode doesn't support all the above combination but PF-ID
> > mode does support them from GEN9(scaling Y-tile 90/270 rotation etc).
> > So I submitted a patch to always enable PF-ID mode for Interlace
> > https://patchwork.freedesktop.org/patch/160275/
> > But Ville suggested not to always enable PF-ID mode instead control
> > fetching mode based on property.
> > Currently there is no open source user for this property. What will
> > you suggest here?
> > 
> > Thanks,
> > -Mahesh
> > > Thanks, Daniel
> > > 
> > > > Changes since V2:
> > > >  - Address review comments from ville
> > > > 
> > > > Mahesh Kumar (2):
> > > >   drm/i915/skl+: Check for supported plane configuration in
> > > > Interlace
> > > >     mode
> > > >   drm/i915/skl+: Scaling not supported in IF-ID Interlace mode
> > > > 
> > > >  drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
> > > >  drivers/gpu/drm/i915/intel_display.c      | 15 +++++++++++++++
> > > >  2 files changed, 30 insertions(+)
> > > > 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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