From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> To: Ingo Molnar <mingo@redhat.com>, x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>, "H . Peter Anvin" <hpa@zytor.com>, linux-kernel@vger.kernel.org, Baolin Wang <baolin.wang@spreadtrum.com>, wsa@the-dreams.de, linux-i2c@vger.kernel.org, Mika Westerberg <mika.westerberg@linux.intel.com>, intel-gfx@lists.freedesktop.org Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Subject: [PATCH v2 1/5] x86/io: Define IO accessors by preprocessor Date: Fri, 30 Jun 2017 20:09:30 +0300 [thread overview] Message-ID: <20170630170934.83028-2-andriy.shevchenko@linux.intel.com> (raw) In-Reply-To: <20170630170934.83028-1-andriy.shevchenko@linux.intel.com> As a preparatory to use generic IO accessor helpers we need to define architecture dependent functions via preprocessor to let world know we have them. Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- arch/x86/include/asm/io.h | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 7afb0e2f07f4..c1c0880768f7 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -69,6 +69,9 @@ build_mmio_write(__writeb, "b", unsigned char, "q", ) build_mmio_write(__writew, "w", unsigned short, "r", ) build_mmio_write(__writel, "l", unsigned int, "r", ) +#define readb readb +#define readw readw +#define readl readl #define readb_relaxed(a) __readb(a) #define readw_relaxed(a) __readw(a) #define readl_relaxed(a) __readl(a) @@ -76,6 +79,9 @@ build_mmio_write(__writel, "l", unsigned int, "r", ) #define __raw_readw __readw #define __raw_readl __readl +#define writeb writeb +#define writew writew +#define writel writel #define writeb_relaxed(v, a) __writeb(v, a) #define writew_relaxed(v, a) __writew(v, a) #define writel_relaxed(v, a) __writel(v, a) @@ -119,6 +125,7 @@ static inline phys_addr_t virt_to_phys(volatile void *address) { return __pa(address); } +#define virt_to_phys virt_to_phys /** * phys_to_virt - map physical address to virtual @@ -137,6 +144,7 @@ static inline void *phys_to_virt(phys_addr_t address) { return __va(address); } +#define phys_to_virt phys_to_virt /* * Change "struct page" to physical address. @@ -169,11 +177,14 @@ static inline unsigned int isa_virt_to_bus(volatile void *address) * else, you probably want one of the following. */ extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); +#define ioremap_nocache ioremap_nocache extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size); #define ioremap_uc ioremap_uc extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); +#define ioremap_cache ioremap_cache extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, unsigned long prot_val); +#define ioremap_prot ioremap_prot /** * ioremap - map bus memory into CPU space @@ -193,8 +204,10 @@ static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) { return ioremap_nocache(offset, size); } +#define ioremap ioremap extern void iounmap(volatile void __iomem *addr); +#define iounmap iounmap extern void set_iounmap_nonlazy(void); @@ -220,6 +233,7 @@ memset_io(volatile void __iomem *addr, unsigned char val, size_t count) { memset((void __force *)addr, val, count); } +#define memset_io(dst,c,count) memset_io(dst,c,count) /** * memcpy_fromio Copy a block of data from I/O memory @@ -234,6 +248,7 @@ memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count) { memcpy(dst, (const void __force *)src, count); } +#define memcpy_fromio(to,from,count) memcpy_fromio(to,from,count) /** * memcpy_toio Copy a block of data into I/O memory @@ -248,6 +263,7 @@ memcpy_toio(volatile void __iomem *dst, const void *src, size_t count) { memcpy((void __force *)dst, src, count); } +#define memcpy_toio(to,from,count) memcpy_toio(to,from,count) /* * ISA space is 'always mapped' on a typical x86 system, no need to @@ -341,13 +357,38 @@ BUILDIO(b, b, char) BUILDIO(w, w, short) BUILDIO(l, , int) +#define inb inb +#define inw inw +#define inl inl +#define inb_p inb_p +#define inw_p inw_p +#define inl_p inl_p +#define insb insb +#define insw insw +#define insl insl + +#define outb outb +#define outw outw +#define outl outl +#define outb_p outb_p +#define outw_p outw_p +#define outl_p outl_p +#define outsb outsb +#define outsw outsw +#define outsl outsl + extern void *xlate_dev_mem_ptr(phys_addr_t phys); extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr); +#define xlate_dev_mem_ptr xlate_dev_mem_ptr +#define unxlate_dev_mem_ptr unxlate_dev_mem_ptr + extern int ioremap_change_attr(unsigned long vaddr, unsigned long size, enum page_cache_mode pcm); extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size); +#define ioremap_wc ioremap_wc extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size); +#define ioremap_wt ioremap_wt extern bool is_early_ioremap_ptep(pte_t *ptep); -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> To: Ingo Molnar <mingo@redhat.com>, x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>, "H . Peter Anvin" <hpa@zytor.com>, linux-kernel@vger.kernel.org, Baolin Wang <baolin.wang@spreadtrum.com>, wsa@the-dreams.de, linux-i2c@vger.kernel.org, Mika Westerberg <mika.westerberg@linux.intel.com>, intel-gfx@lists.freedesktop.org Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Subject: [PATCH v2 1/5] x86/io: Define IO accessors by preprocessor Date: Fri, 30 Jun 2017 20:09:30 +0300 [thread overview] Message-ID: <20170630170934.83028-2-andriy.shevchenko@linux.intel.com> (raw) In-Reply-To: <20170630170934.83028-1-andriy.shevchenko@linux.intel.com> As a preparatory to use generic IO accessor helpers we need to define architecture dependent functions via preprocessor to let world know we have them. Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- arch/x86/include/asm/io.h | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 7afb0e2f07f4..c1c0880768f7 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -69,6 +69,9 @@ build_mmio_write(__writeb, "b", unsigned char, "q", ) build_mmio_write(__writew, "w", unsigned short, "r", ) build_mmio_write(__writel, "l", unsigned int, "r", ) +#define readb readb +#define readw readw +#define readl readl #define readb_relaxed(a) __readb(a) #define readw_relaxed(a) __readw(a) #define readl_relaxed(a) __readl(a) @@ -76,6 +79,9 @@ build_mmio_write(__writel, "l", unsigned int, "r", ) #define __raw_readw __readw #define __raw_readl __readl +#define writeb writeb +#define writew writew +#define writel writel #define writeb_relaxed(v, a) __writeb(v, a) #define writew_relaxed(v, a) __writew(v, a) #define writel_relaxed(v, a) __writel(v, a) @@ -119,6 +125,7 @@ static inline phys_addr_t virt_to_phys(volatile void *address) { return __pa(address); } +#define virt_to_phys virt_to_phys /** * phys_to_virt - map physical address to virtual @@ -137,6 +144,7 @@ static inline void *phys_to_virt(phys_addr_t address) { return __va(address); } +#define phys_to_virt phys_to_virt /* * Change "struct page" to physical address. @@ -169,11 +177,14 @@ static inline unsigned int isa_virt_to_bus(volatile void *address) * else, you probably want one of the following. */ extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); +#define ioremap_nocache ioremap_nocache extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size); #define ioremap_uc ioremap_uc extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); +#define ioremap_cache ioremap_cache extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, unsigned long prot_val); +#define ioremap_prot ioremap_prot /** * ioremap - map bus memory into CPU space @@ -193,8 +204,10 @@ static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) { return ioremap_nocache(offset, size); } +#define ioremap ioremap extern void iounmap(volatile void __iomem *addr); +#define iounmap iounmap extern void set_iounmap_nonlazy(void); @@ -220,6 +233,7 @@ memset_io(volatile void __iomem *addr, unsigned char val, size_t count) { memset((void __force *)addr, val, count); } +#define memset_io(dst,c,count) memset_io(dst,c,count) /** * memcpy_fromio Copy a block of data from I/O memory @@ -234,6 +248,7 @@ memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count) { memcpy(dst, (const void __force *)src, count); } +#define memcpy_fromio(to,from,count) memcpy_fromio(to,from,count) /** * memcpy_toio Copy a block of data into I/O memory @@ -248,6 +263,7 @@ memcpy_toio(volatile void __iomem *dst, const void *src, size_t count) { memcpy((void __force *)dst, src, count); } +#define memcpy_toio(to,from,count) memcpy_toio(to,from,count) /* * ISA space is 'always mapped' on a typical x86 system, no need to @@ -341,13 +357,38 @@ BUILDIO(b, b, char) BUILDIO(w, w, short) BUILDIO(l, , int) +#define inb inb +#define inw inw +#define inl inl +#define inb_p inb_p +#define inw_p inw_p +#define inl_p inl_p +#define insb insb +#define insw insw +#define insl insl + +#define outb outb +#define outw outw +#define outl outl +#define outb_p outb_p +#define outw_p outw_p +#define outl_p outl_p +#define outsb outsb +#define outsw outsw +#define outsl outsl + extern void *xlate_dev_mem_ptr(phys_addr_t phys); extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr); +#define xlate_dev_mem_ptr xlate_dev_mem_ptr +#define unxlate_dev_mem_ptr unxlate_dev_mem_ptr + extern int ioremap_change_attr(unsigned long vaddr, unsigned long size, enum page_cache_mode pcm); extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size); +#define ioremap_wc ioremap_wc extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size); +#define ioremap_wt ioremap_wt extern bool is_early_ioremap_ptep(pte_t *ptep); -- 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-06-30 17:10 UTC|newest] Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-06-30 17:09 [PATCH v2 0/5] x86/io: Rely on asm-generic/io.h Andy Shevchenko 2017-06-30 17:09 ` Andy Shevchenko [this message] 2017-06-30 17:09 ` [PATCH v2 1/5] x86/io: Define IO accessors by preprocessor Andy Shevchenko 2017-07-24 10:19 ` [tip:x86/asm] " tip-bot for Andy Shevchenko 2017-06-30 17:09 ` [PATCH v2 2/5] x86/io: Include asm-generic/io.h to architectural code Andy Shevchenko 2017-06-30 17:09 ` Andy Shevchenko 2017-07-24 10:20 ` [tip:x86/asm] " tip-bot for Andy Shevchenko 2017-06-30 17:09 ` [PATCH v2 3/5] x86/io: Remove mem*io() duplications Andy Shevchenko 2017-06-30 17:09 ` Andy Shevchenko 2017-07-24 10:20 ` [tip:x86/asm] " tip-bot for Andy Shevchenko 2017-06-30 17:09 ` [PATCH v2 4/5] x86/io: Remove xlate_dev_kmem_ptr() duplication Andy Shevchenko 2017-06-30 17:09 ` Andy Shevchenko 2017-07-24 10:20 ` [tip:x86/asm] " tip-bot for Andy Shevchenko 2017-06-30 17:09 ` [PATCH v2 5/5] x86/io: Make readq() / writeq() API consistent Andy Shevchenko 2017-06-30 17:09 ` Andy Shevchenko 2017-07-24 10:21 ` [tip:x86/asm] " tip-bot for Andy Shevchenko 2017-06-30 17:29 ` ✓ Fi.CI.BAT: success for x86/io: Rely on asm-generic/io.h Patchwork 2017-07-18 15:52 ` [PATCH v2 0/5] " Andy Shevchenko 2017-07-18 15:52 ` Andy Shevchenko
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