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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [linux-sunxi] [RFC PATCH 8/8] sunxi: enable PSCI for A83T SoC
Date: Sun, 2 Jul 2017 16:17:33 +0200	[thread overview]
Message-ID: <20170702141733.6bhvzohn6fz3zs3a@flea> (raw)
In-Reply-To: <e39821cc-d670-3ab5-09bd-33c42e091b84@arm.com>

On Wed, Jun 07, 2017 at 03:06:55PM +0100, Marc Zyngier wrote:
> > If that is so fundamentally broken that this is the only benefit, I
> > guess we might as well use some old-style SMP ops.
> 
> Broken, for sure. Which is why I'm asking about the benefits of running
> non-secure on something that has evidently been very badly integrated,
> and for which non-secure is at best an afterthought.
> 
> Now, if someone could try and run guests on this turd and report whether
> this works correctly or not, that'd be an interesting data point.
> Because in the absence of a TEE running on the secure side,
> virtualization is basically the only thing you gain from running on the
> non-secure side.

I just tried running Xen on it, with an adjustment similar to what
Chen-Yu made in the kernel.

It fails at boot, and stops with:
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER4
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER8
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER12
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER16
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER20
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER24
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER0

It looks like it won't be easy to support. I guess we could just go
for smp_ops, and if someone really cares one day about it, we'll
always have the option to support it then.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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  reply	other threads:[~2017-07-02 14:17 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-07  0:47 [U-Boot] [RFC PATCH 0/8] Allwinner A83T PSCI SMP support Icenowy Zheng
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 1/8] sun8i: Add TZPC setup for A83T Icenowy Zheng
2017-06-07  3:24   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 2/8] sunxi: add configuration of secure SRAM " Icenowy Zheng
2017-06-07  3:25   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 3/8] sun8i: Add a macro to read the silicon revision Icenowy Zheng
2017-06-07  3:27   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 4/8] sunxi: add SUNXI_R_CPUCFG_BASE for A83T SoC Icenowy Zheng
2017-06-07  3:48   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  4:13     ` Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 5/8] sunxi: Add CPUCFG register definitions for A80/A83T SoCs Icenowy Zheng
2017-06-07  3:43   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  3:44     ` Icenowy Zheng
2017-06-07  6:44   ` [U-Boot] " Maxime Ripard
2017-06-07  6:58     ` Icenowy Zheng
2017-06-07  7:06       ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 6/8] sunxi: add multi-cluster CPU PRCM register definition Icenowy Zheng
2017-06-07  3:40   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 7/8] sunxi: Add basic PSCI implementation for multi-cluster SoCs Icenowy Zheng
2017-06-07  4:53   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  6:48   ` [U-Boot] " Maxime Ripard
2017-06-07  6:59     ` [U-Boot] [linux-sunxi] " Icenowy Zheng
2017-06-07  7:54       ` Marc Zyngier
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 8/8] sunxi: enable PSCI for A83T SoC Icenowy Zheng
2017-06-07  3:36   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  3:40     ` Icenowy Zheng
2017-06-07  3:47       ` Chen-Yu Tsai
2017-06-07  6:50         ` Maxime Ripard
2017-06-07  6:58           ` Icenowy Zheng
2017-06-07  7:00           ` Chen-Yu Tsai
2017-06-07 12:11             ` Marc Zyngier
2017-06-07 12:12               ` Icenowy Zheng
2017-06-07 12:51                 ` Marc Zyngier
2017-06-07 13:04                   ` Maxime Ripard
2017-06-07 14:06                     ` Marc Zyngier
2017-07-02 14:17                       ` Maxime Ripard [this message]
2017-07-02 15:40                         ` André Przywara
2017-07-03  8:21                           ` Maxime Ripard
2017-06-23 13:24                   ` icenowy at aosc.io
2017-06-23 13:35                     ` Maxime Ripard
2017-06-23 13:39                       ` icenowy at aosc.io
2017-06-23 13:50                         ` Chen-Yu Tsai
2017-07-02  7:08                           ` icenowy at aosc.io
2017-07-02 11:22                             ` Marc Zyngier
2017-07-02 12:36                               ` icenowy at aosc.io
2017-07-02 15:27                                 ` Marc Zyngier
2017-07-03 20:37                                   ` Maxime Ripard

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