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From: Chen-Yu Tsai <wens@csie.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [linux-sunxi] [RFC PATCH 8/8] sunxi: enable PSCI for A83T SoC
Date: Wed, 7 Jun 2017 11:47:24 +0800	[thread overview]
Message-ID: <CAGb2v64b7W3t5JtgakEAPD3C-bD055G_VFQsa2d8FPCu3o6ygA@mail.gmail.com> (raw)
In-Reply-To: <BF992E81-2B53-477E-9735-BFA610D29639@aosc.io>

On Wed, Jun 7, 2017 at 11:40 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
>
>
> 于 2017年6月7日 GMT+08:00 上午11:36:27, Chen-Yu Tsai <wens@csie.org> 写到:
>>On Wed, Jun 7, 2017 at 8:47 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
>>> As we have now a basical implementation of PSCI for A83T, enable
>>> non-secure boot support and PSCI on A83T now.
>>>
>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>> ---
>>>  arch/arm/mach-sunxi/Kconfig | 4 ++++
>>>  1 file changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm/mach-sunxi/Kconfig
>>b/arch/arm/mach-sunxi/Kconfig
>>> index 7ced838d6a..31d29de428 100644
>>> --- a/arch/arm/mach-sunxi/Kconfig
>>> +++ b/arch/arm/mach-sunxi/Kconfig
>>> @@ -98,8 +98,12 @@ config MACH_SUN8I_A33
>>>  config MACH_SUN8I_A83T
>>>         bool "sun8i (Allwinner A83T)"
>>>         select CPU_V7
>>> +       select CPU_V7_HAS_NONSEC
>>> +       select CPU_V7_HAS_VIRT
>>> +       select ARCH_SUPPORT_PSCI
>>>         select SUNXI_GEN_SUN6I
>>>         select SUPPORT_SPL
>>> +       select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
>>
>>The kernel does not work yet. Please have it boot to secure by default
>>regardless of the kernel. We can have it boot non-secure once the
>>kernel
>>has been working for a reasonable amount of time.
>>
>>I don't want clueless users coming and asking why it suddenly stopped
>>working. This should be an experimental feature.
>
> Maybe you should send out the fix, and tag them to also apply to
> stable tree.
>
> GIC is really broken, UP systems only work by chance. We
> shouldn't depend on this behavior.

As I previously explained, it is not the GIC that is broken. I believe
the GIC is working exactly as it is supposed to with regards to its
input signals.

Allwinner's security extensions implementation simply does not properly
forward the AXI secure bit when the e-fuse's secure bit isn't burned.

ChenYu

  reply	other threads:[~2017-06-07  3:47 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-07  0:47 [U-Boot] [RFC PATCH 0/8] Allwinner A83T PSCI SMP support Icenowy Zheng
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 1/8] sun8i: Add TZPC setup for A83T Icenowy Zheng
2017-06-07  3:24   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 2/8] sunxi: add configuration of secure SRAM " Icenowy Zheng
2017-06-07  3:25   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 3/8] sun8i: Add a macro to read the silicon revision Icenowy Zheng
2017-06-07  3:27   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 4/8] sunxi: add SUNXI_R_CPUCFG_BASE for A83T SoC Icenowy Zheng
2017-06-07  3:48   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  4:13     ` Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 5/8] sunxi: Add CPUCFG register definitions for A80/A83T SoCs Icenowy Zheng
2017-06-07  3:43   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  3:44     ` Icenowy Zheng
2017-06-07  6:44   ` [U-Boot] " Maxime Ripard
2017-06-07  6:58     ` Icenowy Zheng
2017-06-07  7:06       ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 6/8] sunxi: add multi-cluster CPU PRCM register definition Icenowy Zheng
2017-06-07  3:40   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 7/8] sunxi: Add basic PSCI implementation for multi-cluster SoCs Icenowy Zheng
2017-06-07  4:53   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  6:48   ` [U-Boot] " Maxime Ripard
2017-06-07  6:59     ` [U-Boot] [linux-sunxi] " Icenowy Zheng
2017-06-07  7:54       ` Marc Zyngier
2017-06-07  0:47 ` [U-Boot] [RFC PATCH 8/8] sunxi: enable PSCI for A83T SoC Icenowy Zheng
2017-06-07  3:36   ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2017-06-07  3:40     ` Icenowy Zheng
2017-06-07  3:47       ` Chen-Yu Tsai [this message]
2017-06-07  6:50         ` Maxime Ripard
2017-06-07  6:58           ` Icenowy Zheng
2017-06-07  7:00           ` Chen-Yu Tsai
2017-06-07 12:11             ` Marc Zyngier
2017-06-07 12:12               ` Icenowy Zheng
2017-06-07 12:51                 ` Marc Zyngier
2017-06-07 13:04                   ` Maxime Ripard
2017-06-07 14:06                     ` Marc Zyngier
2017-07-02 14:17                       ` Maxime Ripard
2017-07-02 15:40                         ` André Przywara
2017-07-03  8:21                           ` Maxime Ripard
2017-06-23 13:24                   ` icenowy at aosc.io
2017-06-23 13:35                     ` Maxime Ripard
2017-06-23 13:39                       ` icenowy at aosc.io
2017-06-23 13:50                         ` Chen-Yu Tsai
2017-07-02  7:08                           ` icenowy at aosc.io
2017-07-02 11:22                             ` Marc Zyngier
2017-07-02 12:36                               ` icenowy at aosc.io
2017-07-02 15:27                                 ` Marc Zyngier
2017-07-03 20:37                                   ` Maxime Ripard

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