* [PATCH 0/8] Adding NV12 support for SKL display @ 2017-07-11 14:10 Vidya Srinivas 2017-07-11 14:10 ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas ` (9 more replies) 0 siblings, 10 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas This patch series is adding NV12 support for Skylake display after rebasing on latest drm-intel-nightly. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Feature has been currently tested with custom linux based test tool IGT test development is under progress. Floating these patches for initial review. These NV12 patches are dependent on Ville's patches mentioned below. Update from last rev: Patches were initial reviewed last when floated but currently there was a design change with respect to - the way fb offset is handled - the way rotation is handled Rebase of the current NV12 patch series has been done as per the current changes on drm-intel-nightly. Review comments from Ville (12th June 2017) have been addressed Review comments from Clinton A Taylor (7th July 2017) have been addressed Review comments from Clinton A Taylor (10th July 2017) have been addressed. Had missed out tested-by/reviewed-by in the patches. Fixed that error in this series. Chandra Konduru (6): drm/i915: Set scaler mode for NV12 drm/i915: Update format_is_yuv() to include NV12 drm/i915: Upscale scaler max scale for NV12 drm/i915: Add NV12 as supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Ville Syrjälä (2): drm/i915: Implement .get_format_info() hook for CCS drm/i915: Add render decompression support drivers/gpu/drm/drm_fourcc.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_atomic.c | 8 +- drivers/gpu/drm/i915/intel_display.c | 313 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_pm.c | 29 +++- drivers/gpu/drm/i915/intel_sprite.c | 16 +- include/drm/drm_mode_config.h | 3 +- include/uapi/drm/drm_fourcc.h | 3 + 9 files changed, 365 insertions(+), 36 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas @ 2017-07-11 14:10 ` Vidya Srinivas 2017-07-11 14:10 ` [PATCH 2/8] drm/i915: Add render decompression support Vidya Srinivas ` (8 subsequent siblings) 9 siblings, 0 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Ben Widawsky From: Ville Syrjälä <ville.syrjala@linux.intel.com> SKL+ display engine can scan out certain kinds of compressed surfaces produced by the render engine. This involved telling the display engine the location of the color control surfae (CCS) which describes which parts of the main surface are compressed and which are not. The location of CCS is provided by userspace as just another plane with its own offset. By providing our own format information for the CCS formats, we should be able to make framebuffer_check() do the right thing for the CCS surface as well. Note that we'll return the same format info for both Y and Yf tiled format as that's what happens with the non-CCS Y vs. Yf as well. If desired, we could potentially return a unique pointer for each pixel_format+tiling+ccs combination, in which case we immediately be able to tell if any of that stuff changed by just comparing the pointers. But that does sound a bit wasteful space wise. v2: Drop the 'dev' argument from the hook v3: Include the description of the CCS surface layout v4: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason) Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v3) Signed-off-by: Ville Syrjä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/drm_fourcc.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 37 ++++++++++++++++++++++++++++++++++++ include/drm/drm_mode_config.h | 3 ++- include/uapi/drm/drm_fourcc.h | 3 +++ 4 files changed, 43 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c index 9c0152d..50da618 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c @@ -222,7 +222,7 @@ const struct drm_format_info *drm_format_info(u32 format) const struct drm_format_info *info = NULL; if (dev->mode_config.funcs->get_format_info) - info = dev->mode_config.funcs->get_format_info(mode_cmd); + info = dev->mode_config.funcs->get_format_info(dev, mode_cmd); if (!info) info = drm_format_info(mode_cmd->pixel_format); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2144adc..9fb2f37 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2433,6 +2433,42 @@ static unsigned int intel_fb_modifier_to_tiling(uint64_t fb_modifier) } } +static const struct drm_format_info ccs_formats[] = { + { .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 16, .vsub = 8, }, + { .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 16, .vsub = 8, }, + { .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 16, .vsub = 8, }, + { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 16, .vsub = 8, }, +}; + +static const struct drm_format_info * +lookup_format_info(const struct drm_format_info formats[], + int num_formats, u32 format) +{ + int i; + + for (i = 0; i < num_formats; i++) { + if (formats[i].format == format) + return &formats[i]; + } + + return NULL; +} + +static const struct drm_format_info * +intel_get_format_info(struct drm_device *dev, + const struct drm_mode_fb_cmd2 *cmd) +{ + switch (cmd->modifier[0]) { + case I915_FORMAT_MOD_Y_TILED_CCS: + case I915_FORMAT_MOD_Yf_TILED_CCS: + return lookup_format_info(ccs_formats, + ARRAY_SIZE(ccs_formats), + cmd->pixel_format); + default: + return NULL; + } +} + static int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer *fb) @@ -14622,6 +14658,7 @@ static void intel_atomic_state_free(struct drm_atomic_state *state) static const struct drm_mode_config_funcs intel_mode_funcs = { .fb_create = intel_user_framebuffer_create, + .get_format_info = intel_get_format_info, .output_poll_changed = intel_fbdev_output_poll_changed, .atomic_check = intel_atomic_check, .atomic_commit = intel_atomic_commit, diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 4298171..f0d3d38 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -81,7 +81,8 @@ struct drm_mode_config_funcs { * The format information specific to the given fb metadata, or * NULL if none is found. */ - const struct drm_format_info *(*get_format_info)(const struct drm_mode_fb_cmd2 *mode_cmd); + const struct drm_format_info *(*get_format_info)(struct drm_device *dev, + const struct drm_mode_fb_cmd2 *mode_cmd); /** * @output_poll_changed: diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 7586c46..ee59109 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -252,6 +252,9 @@ */ #define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3) +#define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4) +#define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5) + /* * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks * -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 2/8] drm/i915: Add render decompression support 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas 2017-07-11 14:10 ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas @ 2017-07-11 14:10 ` Vidya Srinivas 2017-07-11 14:10 ` [PATCH 3/8] drm/i915: Set scaler mode for NV12 Vidya Srinivas ` (7 subsequent siblings) 9 siblings, 0 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Ben Widawsky, Paulo Zanoni From: Ville Syrjälä <ville.syrjala@linux.intel.com> SKL+ display engine can scan out certain kinds of compressed surfaces produced by the render engine. This involved telling the display engine the location of the color control surfae (CCS) which describes which parts of the main surface are compressed and which are not. The location of CCS is provided by userspace as just another plane with its own offset. Add the required stuff to validate the user provided AUX plane metadata and convert the user provided linear offset into something the hardware can consume. Due to hardware limitations we require that the main surface and the AUX surface (CCS) be part of the same bo. The hardware also makes life hard by not allowing you to provide separate x/y offsets for the main and AUX surfaces (excpet with NV12), so finding suitable offsets for both requires a bit of work. Assuming we still want keep playing tricks with the offsets. I've just gone with a dumb "search backward for suitable offsets" approach, which is far from optimal, but it works. Also not all planes will be capable of scanning out compressed surfaces, and eg. 90/270 degree rotation is not supported in combination with decompression either. This patch may contain work from at least the following people: * Vandana Kannan <vandana.kannan@intel.com> * Daniel Vetter <daniel@ffwll.ch> * Ben Widawsky <ben@bwidawsk.net> v2: Deal with display workarounds 0390, 0531, 1125 (Paulo) v3: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason) Put the AUX register defines to the correct place Fix up the slightly bogus rotation check v4: Use I915_WRITE_FW() due to plane update locking changes s/return -EINVAL/goto err/ in intel_framebuffer_init() Eliminate a bunch hardcoded numbers in CCS code Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Jason Ekstrand <jason@jlekstrand.net> Signed-off-by: Ville Syrjä <ville.syrjala@linux.intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v1) --- drivers/gpu/drm/i915/i915_reg.h | 23 ++++ drivers/gpu/drm/i915/intel_display.c | 241 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_pm.c | 29 ++++- drivers/gpu/drm/i915/intel_sprite.c | 5 + 4 files changed, 279 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c712d01..cea4f94 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6106,6 +6106,10 @@ enum { #define _PLANE_KEYMSK_2_A 0x70298 #define _PLANE_KEYMAX_1_A 0x701a0 #define _PLANE_KEYMAX_2_A 0x702a0 +#define _PLANE_AUX_DIST_1_A 0x701c0 +#define _PLANE_AUX_DIST_2_A 0x702c0 +#define _PLANE_AUX_OFFSET_1_A 0x701c4 +#define _PLANE_AUX_OFFSET_2_A 0x702c4 #define _PLANE_COLOR_CTL_1_A 0x701CC /* GLK+ */ #define _PLANE_COLOR_CTL_2_A 0x702CC /* GLK+ */ #define _PLANE_COLOR_CTL_3_A 0x703CC /* GLK+ */ @@ -6212,6 +6216,24 @@ enum { #define PLANE_NV12_BUF_CFG(pipe, plane) \ _MMIO_PLANE(plane, _PLANE_NV12_BUF_CFG_1(pipe), _PLANE_NV12_BUF_CFG_2(pipe)) +#define _PLANE_AUX_DIST_1_B 0x711c0 +#define _PLANE_AUX_DIST_2_B 0x712c0 +#define _PLANE_AUX_DIST_1(pipe) \ + _PIPE(pipe, _PLANE_AUX_DIST_1_A, _PLANE_AUX_DIST_1_B) +#define _PLANE_AUX_DIST_2(pipe) \ + _PIPE(pipe, _PLANE_AUX_DIST_2_A, _PLANE_AUX_DIST_2_B) +#define PLANE_AUX_DIST(pipe, plane) \ + _MMIO_PLANE(plane, _PLANE_AUX_DIST_1(pipe), _PLANE_AUX_DIST_2(pipe)) + +#define _PLANE_AUX_OFFSET_1_B 0x711c4 +#define _PLANE_AUX_OFFSET_2_B 0x712c4 +#define _PLANE_AUX_OFFSET_1(pipe) \ + _PIPE(pipe, _PLANE_AUX_OFFSET_1_A, _PLANE_AUX_OFFSET_1_B) +#define _PLANE_AUX_OFFSET_2(pipe) \ + _PIPE(pipe, _PLANE_AUX_OFFSET_2_A, _PLANE_AUX_OFFSET_2_B) +#define PLANE_AUX_OFFSET(pipe, plane) \ + _MMIO_PLANE(plane, _PLANE_AUX_OFFSET_1(pipe), _PLANE_AUX_OFFSET_2(pipe)) + #define _PLANE_COLOR_CTL_1_B 0x711CC #define _PLANE_COLOR_CTL_2_B 0x712CC #define _PLANE_COLOR_CTL_3_B 0x713CC @@ -6695,6 +6717,7 @@ enum { # define CHICKEN3_DGMG_DONE_FIX_DISABLE (1 << 2) #define CHICKEN_PAR1_1 _MMIO(0x42080) +#define SKL_RC_HASH_OUTSIDE (1 << 15) #define DPA_MASK_VBLANK_SRD (1 << 15) #define FORCE_ARB_IDLE_PLANES (1 << 14) #define SKL_EDP_PSR_FIX_RDWRAP (1 << 3) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9fb2f37..8b3cea4 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1999,11 +1999,19 @@ static unsigned int intel_tile_size(const struct drm_i915_private *dev_priv) return 128; else return 512; + case I915_FORMAT_MOD_Y_TILED_CCS: + if (plane == 1) + return 128; + /* fall through */ case I915_FORMAT_MOD_Y_TILED: if (IS_GEN2(dev_priv) || HAS_128_BYTE_Y_TILING(dev_priv)) return 128; else return 512; + case I915_FORMAT_MOD_Yf_TILED_CCS: + if (plane == 1) + return 128; + /* fall through */ case I915_FORMAT_MOD_Yf_TILED: switch (cpp) { case 1: @@ -2110,7 +2118,7 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, struct drm_i915_private *dev_priv = to_i915(fb->dev); /* AUX_DIST needs only 4K alignment */ - if (fb->format->format == DRM_FORMAT_NV12 && plane == 1) + if (plane == 1) return 4096; switch (fb->modifier) { @@ -2120,6 +2128,8 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, if (INTEL_GEN(dev_priv) >= 9) return 256 * 1024; return 0; + case I915_FORMAT_MOD_Y_TILED_CCS: + case I915_FORMAT_MOD_Yf_TILED_CCS: case I915_FORMAT_MOD_Y_TILED: case I915_FORMAT_MOD_Yf_TILED: return 1 * 1024 * 1024; @@ -2427,6 +2437,7 @@ static unsigned int intel_fb_modifier_to_tiling(uint64_t fb_modifier) case I915_FORMAT_MOD_X_TILED: return I915_TILING_X; case I915_FORMAT_MOD_Y_TILED: + case I915_FORMAT_MOD_Y_TILED_CCS: return I915_TILING_Y; default: return I915_TILING_NONE; @@ -2492,6 +2503,36 @@ static unsigned int intel_fb_modifier_to_tiling(uint64_t fb_modifier) intel_fb_offset_to_xy(&x, &y, fb, i); + if ((fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || + fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS) && i == 1) { + int hsub = fb->format->hsub; + int vsub = fb->format->vsub; + int tile_width, tile_height; + int main_x, main_y; + int ccs_x, ccs_y; + + intel_tile_dims(fb, i, &tile_width, &tile_height); + + ccs_x = (x * hsub) % (tile_width * hsub); + ccs_y = (y * vsub) % (tile_height * vsub); + main_x = intel_fb->normal[0].x % (tile_width * hsub); + main_y = intel_fb->normal[0].y % (tile_height * vsub); + + /* + * CCS doesn't have its own x/y offset register, so the intra CCS tile + * x/y offsets must match between CCS and the main surface. + */ + if (main_x != ccs_x || main_y != ccs_y) { + DRM_DEBUG_KMS("Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n", + main_x, main_y, + ccs_x, ccs_y, + intel_fb->normal[0].x, + intel_fb->normal[0].y, + x, y); + return -EINVAL; + } + } + /* * The fence (if used) is aligned to the start of the object * so having the framebuffer wrap around across the edge of the @@ -2866,6 +2907,9 @@ static int skl_max_plane_width(const struct drm_framebuffer *fb, int plane, break; } break; + case I915_FORMAT_MOD_Y_TILED_CCS: + case I915_FORMAT_MOD_Yf_TILED_CCS: + /* FIXME AUX plane? */ case I915_FORMAT_MOD_Y_TILED: case I915_FORMAT_MOD_Yf_TILED: switch (cpp) { @@ -2888,6 +2932,44 @@ static int skl_max_plane_width(const struct drm_framebuffer *fb, int plane, return 2048; } +static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, + int main_x, int main_y, u32 main_offset) +{ + const struct drm_framebuffer *fb = plane_state->base.fb; + int hsub = fb->format->hsub; + int vsub = fb->format->vsub; + int aux_x = plane_state->aux.x; + int aux_y = plane_state->aux.y; + u32 aux_offset = plane_state->aux.offset; + u32 alignment = intel_surf_alignment(fb, 1); + + while (aux_offset >= main_offset && aux_y <= main_y) { + int x, y; + + if (aux_x == main_x && aux_y == main_y) + break; + + if (aux_offset == 0) + break; + + x = aux_x / hsub; + y = aux_y / vsub; + aux_offset = intel_adjust_tile_offset(&x, &y, plane_state, 1, + aux_offset, aux_offset - alignment); + aux_x = x * hsub + aux_x % hsub; + aux_y = y * vsub + aux_y % vsub; + } + + if (aux_x != main_x || aux_y != main_y) + return false; + + plane_state->aux.offset = aux_offset; + plane_state->aux.x = aux_x; + plane_state->aux.y = aux_y; + + return true; +} + static int skl_check_main_surface(struct intel_plane_state *plane_state) { const struct drm_framebuffer *fb = plane_state->base.fb; @@ -2930,7 +3012,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) while ((x + w) * cpp > fb->pitches[0]) { if (offset == 0) { - DRM_DEBUG_KMS("Unable to find suitable display surface offset\n"); + DRM_DEBUG_KMS("Unable to find suitable display surface offset due to X-tiling\n"); return -EINVAL; } @@ -2939,6 +3021,26 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) } } + /* + * CCS AUX surface doesn't have its own x/y offsets, we must make sure + * they match with the main surface x/y offsets. + */ + if (fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || + fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS) { + while (!skl_check_main_ccs_coordinates(plane_state, x, y, offset)) { + if (offset == 0) + break; + + offset = intel_adjust_tile_offset(&x, &y, plane_state, 0, + offset, offset - alignment); + } + + if (x != plane_state->aux.x || y != plane_state->aux.y) { + DRM_DEBUG_KMS("Unable to find suitable display surface offset due to CCS\n"); + return -EINVAL; + } + } + plane_state->main.offset = offset; plane_state->main.x = x; plane_state->main.y = y; @@ -2975,6 +3077,49 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state) return 0; } +static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state) +{ + struct intel_plane *plane = to_intel_plane(plane_state->base.plane); + struct intel_crtc *crtc = to_intel_crtc(plane_state->base.crtc); + const struct drm_framebuffer *fb = plane_state->base.fb; + int src_x = plane_state->base.src.x1 >> 16; + int src_y = plane_state->base.src.y1 >> 16; + int hsub = fb->format->hsub; + int vsub = fb->format->vsub; + int x = src_x / hsub; + int y = src_y / vsub; + u32 offset; + + switch (plane->id) { + case PLANE_PRIMARY: + case PLANE_SPRITE0: + break; + default: + DRM_DEBUG_KMS("RC support only on plane 1 and 2\n"); + return -EINVAL; + } + + if (crtc->pipe == PIPE_C) { + DRM_DEBUG_KMS("No RC support on pipe C\n"); + return -EINVAL; + } + + if (plane_state->base.rotation & ~(DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180)) { + DRM_DEBUG_KMS("RC support only with 0/180 degree rotation %x\n", + plane_state->base.rotation); + return -EINVAL; + } + + intel_add_fb_offsets(&x, &y, plane_state, 1); + offset = intel_compute_tile_offset(&x, &y, plane_state, 1); + + plane_state->aux.offset = offset; + plane_state->aux.x = x * hsub + src_x % hsub; + plane_state->aux.y = y * vsub + src_y % vsub; + + return 0; +} + int skl_check_plane_surface(struct intel_plane_state *plane_state) { const struct drm_framebuffer *fb = plane_state->base.fb; @@ -2998,6 +3143,11 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state) ret = skl_check_nv12_aux_surface(plane_state); if (ret) return ret; + } else if (fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || + fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS) { + ret = skl_check_ccs_aux_surface(plane_state); + if (ret) + return ret; } else { plane_state->aux.offset = ~0xfff; plane_state->aux.x = 0; @@ -3304,8 +3454,12 @@ static u32 skl_plane_ctl_tiling(uint64_t fb_modifier) return PLANE_CTL_TILED_X; case I915_FORMAT_MOD_Y_TILED: return PLANE_CTL_TILED_Y; + case I915_FORMAT_MOD_Y_TILED_CCS: + return PLANE_CTL_TILED_Y | PLANE_CTL_DECOMPRESSION_ENABLE; case I915_FORMAT_MOD_Yf_TILED: return PLANE_CTL_TILED_YF; + case I915_FORMAT_MOD_Yf_TILED_CCS: + return PLANE_CTL_TILED_YF | PLANE_CTL_DECOMPRESSION_ENABLE; default: MISSING_CASE(fb_modifier); } @@ -3378,6 +3532,7 @@ static void skylake_update_primary_plane(struct intel_plane *plane, u32 plane_ctl = plane_state->ctl; unsigned int rotation = plane_state->base.rotation; u32 stride = skl_plane_stride(fb, 0, rotation); + u32 aux_stride = skl_plane_stride(fb, 1, rotation); u32 surf_addr = plane_state->main.offset; int scaler_id = plane_state->scaler_id; int src_x = plane_state->main.x; @@ -3414,6 +3569,10 @@ static void skylake_update_primary_plane(struct intel_plane *plane, I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (src_y << 16) | src_x); I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride); I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); + I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), + (plane_state->aux.offset - surf_addr) | aux_stride); + I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), + (plane_state->aux.y << 16) | plane_state->aux.x); if (scaler_id >= 0) { uint32_t ps_ctrl = 0; @@ -8461,10 +8620,16 @@ static void skylake_get_pfit_config(struct intel_crtc *crtc, fb->modifier = I915_FORMAT_MOD_X_TILED; break; case PLANE_CTL_TILED_Y: - fb->modifier = I915_FORMAT_MOD_Y_TILED; + if (val & PLANE_CTL_DECOMPRESSION_ENABLE) + fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS; + else + fb->modifier = I915_FORMAT_MOD_Y_TILED; break; case PLANE_CTL_TILED_YF: - fb->modifier = I915_FORMAT_MOD_Yf_TILED; + if (val & PLANE_CTL_DECOMPRESSION_ENABLE) + fb->modifier = I915_FORMAT_MOD_Yf_TILED_CCS; + else + fb->modifier = I915_FORMAT_MOD_Yf_TILED; break; default: MISSING_CASE(tiling); @@ -10619,7 +10784,7 @@ static void skl_do_mmio_flip(struct intel_crtc *intel_crtc, u32 ctl, stride = skl_plane_stride(fb, 0, rotation); ctl = I915_READ(PLANE_CTL(pipe, 0)); - ctl &= ~PLANE_CTL_TILED_MASK; + ctl &= ~(PLANE_CTL_TILED_MASK | PLANE_CTL_DECOMPRESSION_ENABLE); switch (fb->modifier) { case DRM_FORMAT_MOD_LINEAR: break; @@ -10629,9 +10794,15 @@ static void skl_do_mmio_flip(struct intel_crtc *intel_crtc, case I915_FORMAT_MOD_Y_TILED: ctl |= PLANE_CTL_TILED_Y; break; + case I915_FORMAT_MOD_Y_TILED_CCS: + ctl |= PLANE_CTL_TILED_Y | PLANE_CTL_DECOMPRESSION_ENABLE; + break; case I915_FORMAT_MOD_Yf_TILED: ctl |= PLANE_CTL_TILED_YF; break; + case I915_FORMAT_MOD_Yf_TILED_CCS: + ctl |= PLANE_CTL_TILED_YF | PLANE_CTL_DECOMPRESSION_ENABLE; + break; default: MISSING_CASE(fb->modifier); } @@ -14456,10 +14627,12 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, struct drm_mode_fb_cmd2 *mode_cmd) { struct drm_i915_private *dev_priv = to_i915(obj->base.dev); + struct drm_framebuffer *fb = &intel_fb->base; struct drm_format_name_buf format_name; - u32 pitch_limit, stride_alignment; + u32 pitch_limit; unsigned int tiling, stride; int ret = -EINVAL; + int i; i915_gem_object_lock(obj); obj->framebuffer_references++; @@ -14488,6 +14661,19 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, /* Passed in modifier sanity checking. */ switch (mode_cmd->modifier[0]) { + case I915_FORMAT_MOD_Y_TILED_CCS: + case I915_FORMAT_MOD_Yf_TILED_CCS: + switch (mode_cmd->pixel_format) { + case DRM_FORMAT_XBGR8888: + case DRM_FORMAT_ABGR8888: + case DRM_FORMAT_XRGB8888: + case DRM_FORMAT_ARGB8888: + break; + default: + DRM_DEBUG_KMS("RC supported only with RGB8888 formats\n"); + goto err; + } + /* fall through */ case I915_FORMAT_MOD_Y_TILED: case I915_FORMAT_MOD_Yf_TILED: if (INTEL_GEN(dev_priv) < 9) { @@ -14592,25 +14778,46 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, if (mode_cmd->offsets[0] != 0) goto err; - drm_helper_mode_fill_fb_struct(&dev_priv->drm, - &intel_fb->base, mode_cmd); + drm_helper_mode_fill_fb_struct(&dev_priv->drm, fb, mode_cmd); - stride_alignment = intel_fb_stride_alignment(&intel_fb->base, 0); - if (mode_cmd->pitches[0] & (stride_alignment - 1)) { - DRM_DEBUG_KMS("pitch (%d) must be at least %u byte aligned\n", - mode_cmd->pitches[0], stride_alignment); - goto err; + for (i = 0; i < fb->format->num_planes; i++) { + u32 stride_alignment; + + if (mode_cmd->handles[i] != mode_cmd->handles[0]) { + DRM_DEBUG_KMS("bad plane %d handle\n", i); + return -EINVAL; + } + + stride_alignment = intel_fb_stride_alignment(fb, i); + + /* + * Display WA #0531: skl,bxt,kbl,glk + * + * Render decompression and plane width > 3840 + * combined with horizontal panning requires the + * plane stride to be a multiple of 4. We'll just + * require the entire fb to accommodate that to avoid + * potential runtime errors at plane configuration time. + */ + if (IS_GEN9(dev_priv) && i == 0 && fb->width > 3840 && + (fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || + fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS)) + stride_alignment *= 4; + + if (fb->pitches[i] & (stride_alignment - 1)) { + DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n", + i, fb->pitches[i], stride_alignment); + goto err; + } } intel_fb->obj = obj; - ret = intel_fill_fb_info(dev_priv, &intel_fb->base); + ret = intel_fill_fb_info(dev_priv, fb); if (ret) goto err; - ret = drm_framebuffer_init(obj->base.dev, - &intel_fb->base, - &intel_fb_funcs); + ret = drm_framebuffer_init(&dev_priv->drm, fb, &intel_fb_funcs); if (ret) { DRM_ERROR("framebuffer init failed %d\n", ret); goto err; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6db833e..e22eb61 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -62,6 +62,20 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv) I915_WRITE(CHICKEN_PAR1_1, I915_READ(CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP); + /* + * Display WA#0390: skl,bxt,kbl,glk + * + * Must match Sampler, Pixel Back End, and Media + * (0xE194 bit 8, 0x7014 bit 13, 0x4DDC bits 27 and 31). + * + * Including bits outside the page in the hash would + * require 2 (or 4?) MiB alignment of resources. Just + * assume the defaul hashing mode which only uses bits + * within the page. + */ + I915_WRITE(CHICKEN_PAR1_1, + I915_READ(CHICKEN_PAR1_1) & ~SKL_RC_HASH_OUTSIDE); + I915_WRITE(GEN8_CONFIG0, I915_READ(GEN8_CONFIG0) | GEN9_DEFAULT_FIXES); @@ -4071,7 +4085,9 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc, /* For Non Y-tile return 8-blocks */ if (fb->modifier != I915_FORMAT_MOD_Y_TILED && - fb->modifier != I915_FORMAT_MOD_Yf_TILED) + fb->modifier != I915_FORMAT_MOD_Yf_TILED && + fb->modifier != I915_FORMAT_MOD_Y_TILED_CCS && + fb->modifier != I915_FORMAT_MOD_Yf_TILED_CCS) return 8; /* @@ -4377,7 +4393,9 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, } y_tiled = fb->modifier == I915_FORMAT_MOD_Y_TILED || - fb->modifier == I915_FORMAT_MOD_Yf_TILED; + fb->modifier == I915_FORMAT_MOD_Yf_TILED || + fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || + fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS; x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED; /* Display WA #1141: kbl,cfl */ @@ -4476,6 +4494,13 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, res_lines = div_round_up_fixed16(selected_result, plane_blocks_per_line); + /* Display WA #1125: skl,bxt,kbl,glk */ + if (level == 0 && + (fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || + fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS)) + res_blocks += fixed_16_16_to_u32_round_up(y_tile_minimum); + + /* Display WA #1126: skl,bxt,kbl,glk */ if (level >= 1 && level <= 7) { if (y_tiled) { res_blocks += fixed_16_16_to_u32_round_up(y_tile_minimum); diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 94f9a13..5e2f4a9 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -244,6 +244,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work u32 surf_addr = plane_state->main.offset; unsigned int rotation = plane_state->base.rotation; u32 stride = skl_plane_stride(fb, 0, rotation); + u32 aux_stride = skl_plane_stride(fb, 1, rotation); int crtc_x = plane_state->base.dst.x1; int crtc_y = plane_state->base.dst.y1; uint32_t crtc_w = drm_rect_width(&plane_state->base.dst); @@ -278,6 +279,10 @@ void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (y << 16) | x); I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride); I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); + I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), + (plane_state->aux.offset - surf_addr) | aux_stride); + I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), + (plane_state->aux.y << 16) | plane_state->aux.x); /* program plane scaler */ if (plane_state->scaler_id >= 0) { -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 3/8] drm/i915: Set scaler mode for NV12 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas 2017-07-11 14:10 ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas 2017-07-11 14:10 ` [PATCH 2/8] drm/i915: Add render decompression support Vidya Srinivas @ 2017-07-11 14:10 ` Vidya Srinivas 2017-07-11 14:10 ` [PATCH 4/8] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas ` (6 subsequent siblings) 9 siblings, 0 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch sets appropriate scaler mode for NV12 format. In this mode, skylake scaler does either chroma-upsampling or chroma-upsampling and resolution scaling v2: Review comments from Ville addressed NV12 case to be checked first for setting the scaler v3: Rebased (me) v4: Rebased (me) v5: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_atomic.c | 8 +++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index cea4f94..d15497f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6390,6 +6390,7 @@ enum { #define PS_SCALER_MODE_MASK (3 << 28) #define PS_SCALER_MODE_DYN (0 << 28) #define PS_SCALER_MODE_HQ (1 << 28) +#define PS_SCALER_MODE_NV12 (2 << 28) #define PS_PLANE_SEL_MASK (7 << 25) #define PS_PLANE_SEL(plane) (((plane) + 1) << 25) #define PS_FILTER_MASK (3 << 23) diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c index 36d4e63..808f8e6 100644 --- a/drivers/gpu/drm/i915/intel_atomic.c +++ b/drivers/gpu/drm/i915/intel_atomic.c @@ -325,7 +325,13 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, } /* set scaler mode */ - if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) { + if (plane_state && plane_state->base.fb && + plane_state->base.fb->format->format == + DRM_FORMAT_NV12) { + DRM_ERROR("NV12 format setting scaler mode\n"); + scaler_state->scalers[*scaler_id].mode = + PS_SCALER_MODE_NV12; + } else if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) { scaler_state->scalers[*scaler_id].mode = 0; } else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) { /* -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 4/8] drm/i915: Update format_is_yuv() to include NV12 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas ` (2 preceding siblings ...) 2017-07-11 14:10 ` [PATCH 3/8] drm/i915: Set scaler mode for NV12 Vidya Srinivas @ 2017-07-11 14:10 ` Vidya Srinivas 2017-07-11 14:10 ` [PATCH 5/8] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas ` (5 subsequent siblings) 9 siblings, 0 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to format_is_yuv() function for sprite planes. v2: -Use intel_ prefix for format_is_yuv (Ville) v3: Rebased (me) v4: Rebased and addressed review comments from Clinton A Taylor. "static function in intel_sprite.c is not available to the primary plane functions". Changed commit message - function modified for sprite planes. v5: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_sprite.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 5e2f4a9..8deb635 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -41,13 +41,14 @@ #include "i915_drv.h" static bool -format_is_yuv(uint32_t format) +intel_format_is_yuv(uint32_t format) { switch (format) { case DRM_FORMAT_YUYV: case DRM_FORMAT_UYVY: case DRM_FORMAT_VYUY: case DRM_FORMAT_YVYU: + case DRM_FORMAT_NV12: return true; default: return false; @@ -336,7 +337,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work enum plane_id plane_id = plane->id; /* Seems RGB data bypasses the CSC always */ - if (!format_is_yuv(format)) + if (!intel_format_is_yuv(format)) return; /* @@ -900,7 +901,7 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state, src_y = src->y1 >> 16; src_h = drm_rect_height(src) >> 16; - if (format_is_yuv(fb->format->format)) { + if (intel_format_is_yuv(fb->format->format)) { src_x &= ~1; src_w &= ~1; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 5/8] drm/i915: Upscale scaler max scale for NV12 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas ` (3 preceding siblings ...) 2017-07-11 14:10 ` [PATCH 4/8] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas @ 2017-07-11 14:10 ` Vidya Srinivas 2017-07-11 16:16 ` Ville Syrjälä 2017-07-11 14:10 ` [PATCH 6/8] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas ` (4 subsequent siblings) 9 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch updates scaler max limit support for NV12 v2: Rebased (me) v3: Rebased (me) v4: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 28 ++++++++++++++++++++-------- drivers/gpu/drm/i915/intel_drv.h | 3 ++- drivers/gpu/drm/i915/intel_sprite.c | 3 ++- 3 files changed, 24 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8b3cea4..2fb267d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3438,6 +3438,8 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format) return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY; case DRM_FORMAT_VYUY: return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY; + case DRM_FORMAT_NV12: + return PLANE_CTL_FORMAT_NV12; default: MISSING_CASE(pixel_format); } @@ -4801,7 +4803,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe) static int skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, unsigned int scaler_user, int *scaler_id, - int src_w, int src_h, int dst_w, int dst_h) + int src_w, int src_h, int dst_w, int dst_h, + uint32_t pixel_format) { struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; @@ -4817,7 +4820,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe) * the 90/270 degree plane rotation cases (to match the * GTT mapping), hence no need to account for rotation here. */ - need_scaling = src_w != dst_w || src_h != dst_h; + need_scaling = src_w != dst_w || src_h != dst_h || + (pixel_format == DRM_FORMAT_NV12); /* * Scaling/fitting not supported in IF-ID mode in GEN9+ @@ -4893,7 +4897,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state *state) return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX, &state->scaler_state.scaler_id, state->pipe_src_w, state->pipe_src_h, - adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay); + adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay, 0); } /** @@ -4923,7 +4927,8 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, drm_rect_width(&plane_state->base.src) >> 16, drm_rect_height(&plane_state->base.src) >> 16, drm_rect_width(&plane_state->base.dst), - drm_rect_height(&plane_state->base.dst)); + drm_rect_height(&plane_state->base.dst), + fb ? fb->format->format : 0); if (ret || plane_state->scaler_id < 0) return ret; @@ -4949,6 +4954,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, case DRM_FORMAT_YVYU: case DRM_FORMAT_UYVY: case DRM_FORMAT_VYUY: + case DRM_FORMAT_NV12: break; default: DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n", @@ -13656,7 +13662,8 @@ static int intel_atomic_commit(struct drm_device *dev, } int -skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) +skl_max_scale(struct intel_crtc *intel_crtc, + struct intel_crtc_state *crtc_state, uint32_t pixel_format) { struct drm_i915_private *dev_priv; int max_scale; @@ -13682,8 +13689,9 @@ static int intel_atomic_commit(struct drm_device *dev, * or * cdclk/crtc_clock */ - max_scale = min((1 << 16) * 3 - 1, - (1 << 8) * ((max_dotclk << 8) / crtc_clock)); + max_scale = min((1 << 16) * + (pixel_format == DRM_FORMAT_NV12 ? 2 : 3) - 1, + (1 << 8) * ((max_dotclk << 8) / crtc_clock)); return max_scale; } @@ -13704,7 +13712,11 @@ static int intel_atomic_commit(struct drm_device *dev, /* use scaler when colorkey is not required */ if (state->ckey.flags == I915_SET_COLORKEY_NONE) { min_scale = 1; - max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state); + max_scale = skl_max_scale(to_intel_crtc(crtc), + crtc_state, + state->base.fb ? + state->base.fb->format->format : + 0); } can_position = true; } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index d17a324..0576d4b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1480,7 +1480,8 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode, struct intel_crtc_state *pipe_config); int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); -int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state); +int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, + uint32_t pixel_format); static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state) { diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 8deb635..9a6b011 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -823,7 +823,8 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state, if (state->ckey.flags == I915_SET_COLORKEY_NONE) { can_scale = 1; min_scale = 1; - max_scale = skl_max_scale(crtc, crtc_state); + max_scale = skl_max_scale(crtc, crtc_state, + fb->format->format); } else { can_scale = 0; min_scale = DRM_PLANE_HELPER_NO_SCALING; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH 5/8] drm/i915: Upscale scaler max scale for NV12 2017-07-11 14:10 ` [PATCH 5/8] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas @ 2017-07-11 16:16 ` Ville Syrjälä 0 siblings, 0 replies; 31+ messages in thread From: Ville Syrjälä @ 2017-07-11 16:16 UTC (permalink / raw) To: Vidya Srinivas; +Cc: intel-gfx On Tue, Jul 11, 2017 at 07:40:53PM +0530, Vidya Srinivas wrote: > From: Chandra Konduru <chandra.konduru@intel.com> > > This patch updates scaler max limit support for NV12 > > v2: Rebased (me) > > v3: Rebased (me) > > v4: Missed the Tested-by/Reviewed-by in the previous series > Adding the same to commit message in this version. > > Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> > Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 28 ++++++++++++++++++++-------- > drivers/gpu/drm/i915/intel_drv.h | 3 ++- > drivers/gpu/drm/i915/intel_sprite.c | 3 ++- > 3 files changed, 24 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 8b3cea4..2fb267d 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3438,6 +3438,8 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format) > return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY; > case DRM_FORMAT_VYUY: > return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY; > + case DRM_FORMAT_NV12: > + return PLANE_CTL_FORMAT_NV12; > default: > MISSING_CASE(pixel_format); > } > @@ -4801,7 +4803,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe) > static int > skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, > unsigned int scaler_user, int *scaler_id, > - int src_w, int src_h, int dst_w, int dst_h) > + int src_w, int src_h, int dst_w, int dst_h, > + uint32_t pixel_format) > { > struct intel_crtc_scaler_state *scaler_state = > &crtc_state->scaler_state; > @@ -4817,7 +4820,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe) > * the 90/270 degree plane rotation cases (to match the > * GTT mapping), hence no need to account for rotation here. > */ > - need_scaling = src_w != dst_w || src_h != dst_h; > + need_scaling = src_w != dst_w || src_h != dst_h || > + (pixel_format == DRM_FORMAT_NV12); Indentation is still messed in many places in the series. > > /* > * Scaling/fitting not supported in IF-ID mode in GEN9+ > @@ -4893,7 +4897,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state *state) > return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX, > &state->scaler_state.scaler_id, > state->pipe_src_w, state->pipe_src_h, > - adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay); > + adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay, 0); > } > > /** > @@ -4923,7 +4927,8 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, > drm_rect_width(&plane_state->base.src) >> 16, > drm_rect_height(&plane_state->base.src) >> 16, > drm_rect_width(&plane_state->base.dst), > - drm_rect_height(&plane_state->base.dst)); > + drm_rect_height(&plane_state->base.dst), > + fb ? fb->format->format : 0); > > if (ret || plane_state->scaler_id < 0) > return ret; > @@ -4949,6 +4954,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, > case DRM_FORMAT_YVYU: > case DRM_FORMAT_UYVY: > case DRM_FORMAT_VYUY: > + case DRM_FORMAT_NV12: > break; > default: > DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n", > @@ -13656,7 +13662,8 @@ static int intel_atomic_commit(struct drm_device *dev, > } > > int > -skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) > +skl_max_scale(struct intel_crtc *intel_crtc, > + struct intel_crtc_state *crtc_state, uint32_t pixel_format) > { > struct drm_i915_private *dev_priv; > int max_scale; > @@ -13682,8 +13689,9 @@ static int intel_atomic_commit(struct drm_device *dev, > * or > * cdclk/crtc_clock > */ > - max_scale = min((1 << 16) * 3 - 1, > - (1 << 8) * ((max_dotclk << 8) / crtc_clock)); > + max_scale = min((1 << 16) * > + (pixel_format == DRM_FORMAT_NV12 ? 2 : 3) - 1, > + (1 << 8) * ((max_dotclk << 8) / crtc_clock)); IIRC I already suggested to make this less convoluted by splitting it up a bit. > > return max_scale; > } > @@ -13704,7 +13712,11 @@ static int intel_atomic_commit(struct drm_device *dev, > /* use scaler when colorkey is not required */ > if (state->ckey.flags == I915_SET_COLORKEY_NONE) { > min_scale = 1; > - max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state); > + max_scale = skl_max_scale(to_intel_crtc(crtc), > + crtc_state, > + state->base.fb ? > + state->base.fb->format->format : > + 0); > } > can_position = true; > } > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index d17a324..0576d4b 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1480,7 +1480,8 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode, > struct intel_crtc_state *pipe_config); > > int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); > -int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state); > +int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, > + uint32_t pixel_format); > > static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state) > { > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 8deb635..9a6b011 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -823,7 +823,8 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state, > if (state->ckey.flags == I915_SET_COLORKEY_NONE) { > can_scale = 1; > min_scale = 1; > - max_scale = skl_max_scale(crtc, crtc_state); > + max_scale = skl_max_scale(crtc, crtc_state, > + fb->format->format); > } else { > can_scale = 0; > min_scale = DRM_PLANE_HELPER_NO_SCALING; > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 6/8] drm/i915: Add NV12 as supported format for primary plane 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas ` (4 preceding siblings ...) 2017-07-11 14:10 ` [PATCH 5/8] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas @ 2017-07-11 14:10 ` Vidya Srinivas 2017-07-11 16:14 ` Ville Syrjälä 2017-07-11 14:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas ` (3 subsequent siblings) 9 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to list of supported formats for primary plane v2: Rebased (Chandra Konduru) v3: Rebased (me) v4: Review comments by Ville addressed Removed the skl_primary_formats_with_nv12 and added NV12 case in existing skl_primary_formats v5: Rebased (me) v6: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2fb267d..d86dd64 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -85,6 +85,7 @@ static bool is_mmio_work(struct intel_flip_work *work) DRM_FORMAT_YVYU, DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, }; /* Cursor formats */ @@ -13999,7 +14000,6 @@ void intel_plane_destroy(struct drm_plane *plane) if (INTEL_GEN(dev_priv) >= 9) { intel_primary_formats = skl_primary_formats; num_formats = ARRAY_SIZE(skl_primary_formats); - primary->update_plane = skylake_update_primary_plane; primary->disable_plane = skylake_disable_primary_plane; } else if (INTEL_GEN(dev_priv) >= 4) { -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH 6/8] drm/i915: Add NV12 as supported format for primary plane 2017-07-11 14:10 ` [PATCH 6/8] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas @ 2017-07-11 16:14 ` Ville Syrjälä 0 siblings, 0 replies; 31+ messages in thread From: Ville Syrjälä @ 2017-07-11 16:14 UTC (permalink / raw) To: Vidya Srinivas; +Cc: intel-gfx On Tue, Jul 11, 2017 at 07:40:54PM +0530, Vidya Srinivas wrote: > From: Chandra Konduru <chandra.konduru@intel.com> > > This patch adds NV12 to list of supported formats for > primary plane > > v2: Rebased (Chandra Konduru) > > v3: Rebased (me) > > v4: Review comments by Ville addressed > Removed the skl_primary_formats_with_nv12 and > added NV12 case in existing skl_primary_formats > > v5: Rebased (me) > > v6: Missed the Tested-by/Reviewed-by in the previous series > Adding the same to commit message in this version. > > Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> > Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 2fb267d..d86dd64 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -85,6 +85,7 @@ static bool is_mmio_work(struct intel_flip_work *work) > DRM_FORMAT_YVYU, > DRM_FORMAT_UYVY, > DRM_FORMAT_VYUY, > + DRM_FORMAT_NV12, This has the same issues as the sprite patch. > }; > > /* Cursor formats */ > @@ -13999,7 +14000,6 @@ void intel_plane_destroy(struct drm_plane *plane) > if (INTEL_GEN(dev_priv) >= 9) { > intel_primary_formats = skl_primary_formats; > num_formats = ARRAY_SIZE(skl_primary_formats); > - > primary->update_plane = skylake_update_primary_plane; > primary->disable_plane = skylake_disable_primary_plane; > } else if (INTEL_GEN(dev_priv) >= 4) { > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas ` (5 preceding siblings ...) 2017-07-11 14:10 ` [PATCH 6/8] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas @ 2017-07-11 14:10 ` Vidya Srinivas 2017-07-11 15:04 ` Clint Taylor 2017-07-11 16:12 ` Ville Syrjälä 2017-07-11 14:10 ` [PATCH 8/8] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas ` (2 subsequent siblings) 9 siblings, 2 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 case in existing skl_plane_formats - Added the 10bpc RGB formats v4: Addressed review comments from Clinton A Taylor "Why are we adding 10 bit RGB formats with the NV12 series patches? Trying to set XR30 or AB30 results in error returned even though the modes are advertised for the planes" - Removed 10bit RGB formats added previously with NV12 series v5: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. Addressed review comments from Clinton A Taylor "Why are we adding 10 bit RGB formats with the NV12 series patches? Trying to set XR30 or AB30 results in error returned even though the modes are advertised for the planes" - Previous version has 10bit RGB format removed from VLV formats by mistake. Fixing that in this version. Removed 10bit RGB formats added previously with NV12 series for SKL. Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_sprite.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 9a6b011..f1d65d9 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1078,6 +1078,7 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, }; struct intel_plane * -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-11 14:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas @ 2017-07-11 15:04 ` Clint Taylor 2017-07-11 16:12 ` Ville Syrjälä 1 sibling, 0 replies; 31+ messages in thread From: Clint Taylor @ 2017-07-11 15:04 UTC (permalink / raw) To: Vidya Srinivas, intel-gfx On 07/11/2017 07:10 AM, Vidya Srinivas wrote: > From: Chandra Konduru <chandra.konduru@intel.com> > > This patch adds NV12 to list of supported formats for sprite plane. > > v2: Rebased (me) > > v3: Review comments by Ville addressed > - Removed skl_plane_formats_with_nv12 and added > NV12 case in existing skl_plane_formats > - Added the 10bpc RGB formats > > v4: Addressed review comments from Clinton A Taylor > "Why are we adding 10 bit RGB formats with the NV12 series patches? > Trying to set XR30 or AB30 results in error returned even though > the modes are advertised for the planes" > - Removed 10bit RGB formats added previously with NV12 series > > v5: Missed the Tested-by/Reviewed-by in the previous series > Adding the same to commit message in this version. > Addressed review comments from Clinton A Taylor > "Why are we adding 10 bit RGB formats with the NV12 series patches? > Trying to set XR30 or AB30 results in error returned even though > the modes are advertised for the planes" > - Previous version has 10bit RGB format removed from VLV formats > by mistake. Fixing that in this version. > Removed 10bit RGB formats added previously with NV12 series > for SKL. > > Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> > Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> I had not actually given the reviewed-by for patch 7/8 yet. Make sure that you only add the reviewed-by to the commit message for patches that have been marked that way by the reviewers. Of course now the patch looks good and we can leave the RB in the commit message. Thanks for getting this done, -Clint > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_sprite.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 9a6b011..f1d65d9 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -1078,6 +1078,7 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, > DRM_FORMAT_YVYU, > DRM_FORMAT_UYVY, > DRM_FORMAT_VYUY, > + DRM_FORMAT_NV12, > }; > > struct intel_plane * _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-11 14:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 2017-07-11 15:04 ` Clint Taylor @ 2017-07-11 16:12 ` Ville Syrjälä 2017-07-20 10:05 ` Srinivas, Vidya 2017-07-24 4:24 ` Srinivas, Vidya 1 sibling, 2 replies; 31+ messages in thread From: Ville Syrjälä @ 2017-07-11 16:12 UTC (permalink / raw) To: Vidya Srinivas; +Cc: intel-gfx On Tue, Jul 11, 2017 at 07:40:55PM +0530, Vidya Srinivas wrote: > From: Chandra Konduru <chandra.konduru@intel.com> > > This patch adds NV12 to list of supported formats for sprite plane. > > v2: Rebased (me) > > v3: Review comments by Ville addressed > - Removed skl_plane_formats_with_nv12 and added > NV12 case in existing skl_plane_formats > - Added the 10bpc RGB formats > > v4: Addressed review comments from Clinton A Taylor > "Why are we adding 10 bit RGB formats with the NV12 series patches? > Trying to set XR30 or AB30 results in error returned even though > the modes are advertised for the planes" > - Removed 10bit RGB formats added previously with NV12 series > > v5: Missed the Tested-by/Reviewed-by in the previous series > Adding the same to commit message in this version. > Addressed review comments from Clinton A Taylor > "Why are we adding 10 bit RGB formats with the NV12 series patches? > Trying to set XR30 or AB30 results in error returned even though > the modes are advertised for the planes" > - Previous version has 10bit RGB format removed from VLV formats > by mistake. Fixing that in this version. > Removed 10bit RGB formats added previously with NV12 series > for SKL. > > Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> > Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_sprite.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 9a6b011..f1d65d9 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -1078,6 +1078,7 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, > DRM_FORMAT_YVYU, > DRM_FORMAT_UYVY, > DRM_FORMAT_VYUY, > + DRM_FORMAT_NV12, > }; That's not correct for pipe C sprites on SKL/KBL/BXT. Also like I mentioned earlier at least SKL shouldn't be advertizing NV12 at all. IIRC you were going to find out what the situation is with the other platforms. > > struct intel_plane * > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-11 16:12 ` Ville Syrjälä @ 2017-07-20 10:05 ` Srinivas, Vidya 2017-07-24 4:24 ` Srinivas, Vidya 1 sibling, 0 replies; 31+ messages in thread From: Srinivas, Vidya @ 2017-07-20 10:05 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx > -----Original Message----- > From: Ville Syrjälä [mailto:ville.syrjala@linux.intel.com] > Sent: Tuesday, July 11, 2017 9:42 PM > To: Srinivas, Vidya <vidya.srinivas@intel.com> > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 7/8] drm/i915: Add NV12 as supported > format for sprite plane > > On Tue, Jul 11, 2017 at 07:40:55PM +0530, Vidya Srinivas wrote: > > From: Chandra Konduru <chandra.konduru@intel.com> > > > > This patch adds NV12 to list of supported formats for sprite plane. > > > > v2: Rebased (me) > > > > v3: Review comments by Ville addressed > > - Removed skl_plane_formats_with_nv12 and added > > NV12 case in existing skl_plane_formats > > - Added the 10bpc RGB formats > > > > v4: Addressed review comments from Clinton A Taylor > > "Why are we adding 10 bit RGB formats with the NV12 series > patches? > > Trying to set XR30 or AB30 results in error returned even though > > the modes are advertised for the planes" > > - Removed 10bit RGB formats added previously with NV12 series > > > > v5: Missed the Tested-by/Reviewed-by in the previous series > > Adding the same to commit message in this version. > > Addressed review comments from Clinton A Taylor > > "Why are we adding 10 bit RGB formats with the NV12 series > patches? > > Trying to set XR30 or AB30 results in error returned even though > > the modes are advertised for the planes" > > - Previous version has 10bit RGB format removed from VLV formats > > by mistake. Fixing that in this version. > > Removed 10bit RGB formats added previously with NV12 series > > for SKL. > > > > Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> > > Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> > > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > > --- > > drivers/gpu/drm/i915/intel_sprite.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c > > b/drivers/gpu/drm/i915/intel_sprite.c > > index 9a6b011..f1d65d9 100644 > > --- a/drivers/gpu/drm/i915/intel_sprite.c > > +++ b/drivers/gpu/drm/i915/intel_sprite.c > > @@ -1078,6 +1078,7 @@ int intel_sprite_set_colorkey(struct drm_device > *dev, void *data, > > DRM_FORMAT_YVYU, > > DRM_FORMAT_UYVY, > > DRM_FORMAT_VYUY, > > + DRM_FORMAT_NV12, > > }; > > That's not correct for pipe C sprites on SKL/KBL/BXT. > > Also like I mentioned earlier at least SKL shouldn't be advertizing NV12 at > all. IIRC you were going to find out what the situation is with the other > platforms. Apologies for the delay. I shall find this and fix before sending the next series with other review comments addressed. Regards Vidya > > > > > struct intel_plane * > > -- > > 1.9.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-11 16:12 ` Ville Syrjälä 2017-07-20 10:05 ` Srinivas, Vidya @ 2017-07-24 4:24 ` Srinivas, Vidya 1 sibling, 0 replies; 31+ messages in thread From: Srinivas, Vidya @ 2017-07-24 4:24 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx > -----Original Message----- > From: Ville Syrjälä [mailto:ville.syrjala@linux.intel.com] > Sent: Tuesday, July 11, 2017 9:42 PM > To: Srinivas, Vidya <vidya.srinivas@intel.com> > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 7/8] drm/i915: Add NV12 as supported > format for sprite plane > > On Tue, Jul 11, 2017 at 07:40:55PM +0530, Vidya Srinivas wrote: > > From: Chandra Konduru <chandra.konduru@intel.com> > > > > This patch adds NV12 to list of supported formats for sprite plane. > > > > v2: Rebased (me) > > > > v3: Review comments by Ville addressed > > - Removed skl_plane_formats_with_nv12 and added > > NV12 case in existing skl_plane_formats > > - Added the 10bpc RGB formats > > > > v4: Addressed review comments from Clinton A Taylor > > "Why are we adding 10 bit RGB formats with the NV12 series > patches? > > Trying to set XR30 or AB30 results in error returned even though > > the modes are advertised for the planes" > > - Removed 10bit RGB formats added previously with NV12 series > > > > v5: Missed the Tested-by/Reviewed-by in the previous series > > Adding the same to commit message in this version. > > Addressed review comments from Clinton A Taylor > > "Why are we adding 10 bit RGB formats with the NV12 series > patches? > > Trying to set XR30 or AB30 results in error returned even though > > the modes are advertised for the planes" > > - Previous version has 10bit RGB format removed from VLV formats > > by mistake. Fixing that in this version. > > Removed 10bit RGB formats added previously with NV12 series > > for SKL. > > > > Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> > > Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> > > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > > --- > > drivers/gpu/drm/i915/intel_sprite.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c > > b/drivers/gpu/drm/i915/intel_sprite.c > > index 9a6b011..f1d65d9 100644 > > --- a/drivers/gpu/drm/i915/intel_sprite.c > > +++ b/drivers/gpu/drm/i915/intel_sprite.c > > @@ -1078,6 +1078,7 @@ int intel_sprite_set_colorkey(struct drm_device > *dev, void *data, > > DRM_FORMAT_YVYU, > > DRM_FORMAT_UYVY, > > DRM_FORMAT_VYUY, > > + DRM_FORMAT_NV12, > > }; > > That's not correct for pipe C sprites on SKL/KBL/BXT. > > Also like I mentioned earlier at least SKL shouldn't be advertizing NV12 at > all. IIRC you were going to find out what the situation is with the other > platforms. > I checked for the platform support we need. For now, we wanted to enable it on Apollo Lake platforms (BXT).I have changed the patch and addressed the review comments. Kindly have a check. Thank you. Regards Vidya > > > > struct intel_plane * > > -- > > 1.9.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 8/8] drm/i915: Add NV12 support to intel_framebuffer_init 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas ` (6 preceding siblings ...) 2017-07-11 14:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas @ 2017-07-11 14:10 ` Vidya Srinivas 2017-07-11 16:13 ` Ville Syrjälä 2017-07-11 14:55 ` ✓ Fi.CI.BAT: success for Adding NV12 support for SKL display (rev5) Patchwork 2017-07-11 16:18 ` [PATCH 0/8] Adding NV12 support for SKL display Ville Syrjälä 9 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-07-11 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 as supported format to intel_framebuffer_init and performs various checks. v2: -Fix an issue in checks added (Chandra Konduru) v3: rebased (me) v4: Review comments by Ville addressed Added platform check for NV12 in intel_framebuffer_init Removed offset checks for NV12 case v5: Addressed review comments by Clinton A Taylor This NV12 support only correctly works on SKL. Plane color space conversion is different on GLK and later platforms causing the colors to display incorrectly. Ville's plane color space property patch series in review will fix this issue. - Restricted the NV12 case in intel_framebuffer_init to SKL and BXT only. v6: Rebased (me) Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d86dd64..dfda54e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14780,6 +14780,11 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, goto err; } break; + case DRM_FORMAT_NV12: + if (INTEL_GEN(dev_priv) >= 9) + if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv)) + break; + goto err; default: DRM_DEBUG_KMS("unsupported pixel format: %s\n", drm_get_format_name(mode_cmd->pixel_format, &format_name)); -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH 8/8] drm/i915: Add NV12 support to intel_framebuffer_init 2017-07-11 14:10 ` [PATCH 8/8] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas @ 2017-07-11 16:13 ` Ville Syrjälä 0 siblings, 0 replies; 31+ messages in thread From: Ville Syrjälä @ 2017-07-11 16:13 UTC (permalink / raw) To: Vidya Srinivas; +Cc: intel-gfx On Tue, Jul 11, 2017 at 07:40:56PM +0530, Vidya Srinivas wrote: > From: Chandra Konduru <chandra.konduru@intel.com> > > This patch adds NV12 as supported format > to intel_framebuffer_init and performs various checks. > > v2: > -Fix an issue in checks added (Chandra Konduru) > > v3: rebased (me) > > v4: Review comments by Ville addressed > Added platform check for NV12 in intel_framebuffer_init > Removed offset checks for NV12 case > > v5: Addressed review comments by Clinton A Taylor > This NV12 support only correctly works on SKL. > Plane color space conversion is different on GLK and later platforms > causing the colors to display incorrectly. > Ville's plane color space property patch series > in review will fix this issue. > - Restricted the NV12 case in intel_framebuffer_init to > SKL and BXT only. > > v6: Rebased (me) > > Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> > Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index d86dd64..dfda54e 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -14780,6 +14780,11 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, > goto err; > } > break; > + case DRM_FORMAT_NV12: > + if (INTEL_GEN(dev_priv) >= 9) > + if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv)) > + break; That doesn't really make sense. Are you trying to reject NV12 on SKL/BXT or accept it? The gen>=9 check is redundant. > + goto err; > default: > DRM_DEBUG_KMS("unsupported pixel format: %s\n", > drm_get_format_name(mode_cmd->pixel_format, &format_name)); > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* ✓ Fi.CI.BAT: success for Adding NV12 support for SKL display (rev5) 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas ` (7 preceding siblings ...) 2017-07-11 14:10 ` [PATCH 8/8] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas @ 2017-07-11 14:55 ` Patchwork 2017-07-11 16:18 ` [PATCH 0/8] Adding NV12 support for SKL display Ville Syrjälä 9 siblings, 0 replies; 31+ messages in thread From: Patchwork @ 2017-07-11 14:55 UTC (permalink / raw) To: Vidya Srinivas; +Cc: intel-gfx == Series Details == Series: Adding NV12 support for SKL display (rev5) URL : https://patchwork.freedesktop.org/series/25377/ State : success == Summary == Series 25377v5 Adding NV12 support for SKL display https://patchwork.freedesktop.org/api/1.0/series/25377/revisions/5/mbox/ Test kms_pipe_crc_basic: Subgroup hang-read-crc-pipe-a: pass -> DMESG-WARN (fi-pnv-d510) fdo#101597 Subgroup suspend-read-crc-pipe-b: dmesg-warn -> PASS (fi-byt-j1900) fdo#101705 fdo#101597 https://bugs.freedesktop.org/show_bug.cgi?id=101597 fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705 fi-bdw-5557u total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:436s fi-bdw-gvtdvm total:279 pass:265 dwarn:0 dfail:0 fail:0 skip:14 time:431s fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:356s fi-bsw-n3050 total:279 pass:243 dwarn:0 dfail:0 fail:0 skip:36 time:523s fi-bxt-j4205 total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:514s fi-byt-j1900 total:279 pass:255 dwarn:0 dfail:0 fail:0 skip:24 time:492s fi-byt-n2820 total:279 pass:250 dwarn:1 dfail:0 fail:0 skip:28 time:486s fi-glk-2a total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:599s fi-hsw-4770 total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:442s fi-hsw-4770r total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:412s fi-ilk-650 total:279 pass:229 dwarn:0 dfail:0 fail:0 skip:50 time:426s fi-ivb-3520m total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:503s fi-ivb-3770 total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:471s fi-kbl-7500u total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:460s fi-kbl-7560u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:578s fi-kbl-r total:279 pass:260 dwarn:1 dfail:0 fail:0 skip:18 time:586s fi-pnv-d510 total:279 pass:222 dwarn:2 dfail:0 fail:0 skip:55 time:564s fi-skl-6260u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:457s fi-skl-6700hq total:279 pass:262 dwarn:0 dfail:0 fail:0 skip:17 time:594s fi-skl-6700k total:279 pass:257 dwarn:4 dfail:0 fail:0 skip:18 time:469s fi-skl-6770hq total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:477s fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:439s fi-skl-x1585l total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:500s fi-snb-2520m total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:539s fi-snb-2600 total:279 pass:250 dwarn:0 dfail:0 fail:0 skip:29 time:405s 85c472b33a364770b4c4af0caa8b8a828e0c0498 drm-tip: 2017y-07m-11d-14h-04m-44s UTC integration manifest 39f1ae5d drm/i915: Add NV12 support to intel_framebuffer_init 1dd7cae drm/i915: Add NV12 as supported format for sprite plane 26faf59 drm/i915: Add NV12 as supported format for primary plane 8ea488b drm/i915: Upscale scaler max scale for NV12 15c8578 drm/i915: Update format_is_yuv() to include NV12 4e2ec1c drm/i915: Set scaler mode for NV12 5721383 drm/i915: Add render decompression support 5663784 drm/i915: Implement .get_format_info() hook for CCS == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5162/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 0/8] Adding NV12 support for SKL display 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas ` (8 preceding siblings ...) 2017-07-11 14:55 ` ✓ Fi.CI.BAT: success for Adding NV12 support for SKL display (rev5) Patchwork @ 2017-07-11 16:18 ` Ville Syrjälä 2017-08-04 1:23 ` Hwang, Dongseong 9 siblings, 1 reply; 31+ messages in thread From: Ville Syrjälä @ 2017-07-11 16:18 UTC (permalink / raw) To: Vidya Srinivas; +Cc: intel-gfx On Tue, Jul 11, 2017 at 07:40:48PM +0530, Vidya Srinivas wrote: > This patch series is adding NV12 support for Skylake display after > rebasing on latest drm-intel-nightly. Initial series of the patches > can be found here: > https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html > > Feature has been currently tested with custom linux based test tool > IGT test development is under progress. Floating these patches for > initial review. These NV12 patches are dependent on Ville's patches > mentioned below. > > Update from last rev: > Patches were initial reviewed last when floated but > currently there was a design change with respect to > - the way fb offset is handled > - the way rotation is handled > Rebase of the current NV12 patch series has been done as per the > current changes on drm-intel-nightly. > Review comments from Ville (12th June 2017) have been addressed > Review comments from Clinton A Taylor (7th July 2017) have been > addressed > Review comments from Clinton A Taylor (10th July 2017) have been > addressed. Had missed out tested-by/reviewed-by in the patches. > Fixed that error in this series. > > Chandra Konduru (6): > drm/i915: Set scaler mode for NV12 > drm/i915: Update format_is_yuv() to include NV12 > drm/i915: Upscale scaler max scale for NV12 > drm/i915: Add NV12 as supported format for primary plane > drm/i915: Add NV12 as supported format for sprite plane > drm/i915: Add NV12 support to intel_framebuffer_init > > Ville Syrjälä (2): > drm/i915: Implement .get_format_info() hook for CCS > drm/i915: Add render decompression support These two are some old stale versions of my CCS patches. I suppose it shouldn't matter too much, as long as no one has based any userspace tests on these since later versions will change how interpret fb->offsets[]. > > drivers/gpu/drm/drm_fourcc.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 24 +++ > drivers/gpu/drm/i915/intel_atomic.c | 8 +- > drivers/gpu/drm/i915/intel_display.c | 313 ++++++++++++++++++++++++++++++++--- > drivers/gpu/drm/i915/intel_drv.h | 3 +- > drivers/gpu/drm/i915/intel_pm.c | 29 +++- > drivers/gpu/drm/i915/intel_sprite.c | 16 +- > include/drm/drm_mode_config.h | 3 +- > include/uapi/drm/drm_fourcc.h | 3 + > 9 files changed, 365 insertions(+), 36 deletions(-) > > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 0/8] Adding NV12 support for SKL display 2017-07-11 16:18 ` [PATCH 0/8] Adding NV12 support for SKL display Ville Syrjälä @ 2017-08-04 1:23 ` Hwang, Dongseong 2017-08-10 0:15 ` Hwang, Dongseong 0 siblings, 1 reply; 31+ messages in thread From: Hwang, Dongseong @ 2017-08-04 1:23 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx, Vidya Srinivas [-- Attachment #1.1: Type: text/plain, Size: 3538 bytes --] Thank you for working on NV12 plane support. ChromeOS eagerly wants this feature to save power on Youtube. If it's landed soon, I'll really appreciate it. Kristian is working on backporting it to the downstream ChromeOS kernel. https://chromium-review.googlesource.com/c/601288 I tested it on my Apollo Lake chromebook, but there is blackscreen flickering. NOTE: RGBA, RGBX, BGRA, BGRX, YUYV works without flickering. https://goo.gl/photos/tr5VfMiKeyEpDg9K6 Best regards, DS On Tue, Jul 11, 2017 at 9:18 AM, Ville Syrjälä < ville.syrjala@linux.intel.com> wrote: > On Tue, Jul 11, 2017 at 07:40:48PM +0530, Vidya Srinivas wrote: > > This patch series is adding NV12 support for Skylake display after > > rebasing on latest drm-intel-nightly. Initial series of the patches > > can be found here: > > https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html > > > > Feature has been currently tested with custom linux based test tool > > IGT test development is under progress. Floating these patches for > > initial review. These NV12 patches are dependent on Ville's patches > > mentioned below. > > > > Update from last rev: > > Patches were initial reviewed last when floated but > > currently there was a design change with respect to > > - the way fb offset is handled > > - the way rotation is handled > > Rebase of the current NV12 patch series has been done as per the > > current changes on drm-intel-nightly. > > Review comments from Ville (12th June 2017) have been addressed > > Review comments from Clinton A Taylor (7th July 2017) have been > > addressed > > Review comments from Clinton A Taylor (10th July 2017) have been > > addressed. Had missed out tested-by/reviewed-by in the patches. > > Fixed that error in this series. > > > > Chandra Konduru (6): > > drm/i915: Set scaler mode for NV12 > > drm/i915: Update format_is_yuv() to include NV12 > > drm/i915: Upscale scaler max scale for NV12 > > drm/i915: Add NV12 as supported format for primary plane > > drm/i915: Add NV12 as supported format for sprite plane > > drm/i915: Add NV12 support to intel_framebuffer_init > > > > Ville Syrjälä (2): > > drm/i915: Implement .get_format_info() hook for CCS > > drm/i915: Add render decompression support > > These two are some old stale versions of my CCS patches. I suppose it > shouldn't matter too much, as long as no one has based any userspace tests > on these since later versions will change how interpret fb->offsets[]. > > > > > drivers/gpu/drm/drm_fourcc.c | 2 +- > > drivers/gpu/drm/i915/i915_reg.h | 24 +++ > > drivers/gpu/drm/i915/intel_atomic.c | 8 +- > > drivers/gpu/drm/i915/intel_display.c | 313 > ++++++++++++++++++++++++++++++++--- > > drivers/gpu/drm/i915/intel_drv.h | 3 +- > > drivers/gpu/drm/i915/intel_pm.c | 29 +++- > > drivers/gpu/drm/i915/intel_sprite.c | 16 +- > > include/drm/drm_mode_config.h | 3 +- > > include/uapi/drm/drm_fourcc.h | 3 + > > 9 files changed, 365 insertions(+), 36 deletions(-) > > > > -- > > 1.9.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > [-- Attachment #1.2: Type: text/html, Size: 5156 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 0/8] Adding NV12 support for SKL display 2017-08-04 1:23 ` Hwang, Dongseong @ 2017-08-10 0:15 ` Hwang, Dongseong 0 siblings, 0 replies; 31+ messages in thread From: Hwang, Dongseong @ 2017-08-10 0:15 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx, Vidya Srinivas I tested it on my Kaby Lake chromebook, and it works perfectly. Best regards, DS On Thu, Aug 3, 2017 at 6:23 PM, Hwang, Dongseong <dongseong.hwang@intel.com> wrote: > Thank you for working on NV12 plane support. ChromeOS eagerly wants this > feature to save power on Youtube. If it's landed soon, I'll really > appreciate it. > > Kristian is working on backporting it to the downstream ChromeOS kernel. > https://chromium-review.googlesource.com/c/601288 > > I tested it on my Apollo Lake chromebook, but there is blackscreen > flickering. NOTE: RGBA, RGBX, BGRA, BGRX, YUYV works without flickering. > https://goo.gl/photos/tr5VfMiKeyEpDg9K6 > > Best regards, > DS > > > > On Tue, Jul 11, 2017 at 9:18 AM, Ville Syrjälä > <ville.syrjala@linux.intel.com> wrote: >> >> On Tue, Jul 11, 2017 at 07:40:48PM +0530, Vidya Srinivas wrote: >> > This patch series is adding NV12 support for Skylake display after >> > rebasing on latest drm-intel-nightly. Initial series of the patches >> > can be found here: >> > https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html >> > >> > Feature has been currently tested with custom linux based test tool >> > IGT test development is under progress. Floating these patches for >> > initial review. These NV12 patches are dependent on Ville's patches >> > mentioned below. >> > >> > Update from last rev: >> > Patches were initial reviewed last when floated but >> > currently there was a design change with respect to >> > - the way fb offset is handled >> > - the way rotation is handled >> > Rebase of the current NV12 patch series has been done as per the >> > current changes on drm-intel-nightly. >> > Review comments from Ville (12th June 2017) have been addressed >> > Review comments from Clinton A Taylor (7th July 2017) have been >> > addressed >> > Review comments from Clinton A Taylor (10th July 2017) have been >> > addressed. Had missed out tested-by/reviewed-by in the patches. >> > Fixed that error in this series. >> > >> > Chandra Konduru (6): >> > drm/i915: Set scaler mode for NV12 >> > drm/i915: Update format_is_yuv() to include NV12 >> > drm/i915: Upscale scaler max scale for NV12 >> > drm/i915: Add NV12 as supported format for primary plane >> > drm/i915: Add NV12 as supported format for sprite plane >> > drm/i915: Add NV12 support to intel_framebuffer_init >> > >> > Ville Syrjälä (2): >> > drm/i915: Implement .get_format_info() hook for CCS >> > drm/i915: Add render decompression support >> >> These two are some old stale versions of my CCS patches. I suppose it >> shouldn't matter too much, as long as no one has based any userspace tests >> on these since later versions will change how interpret fb->offsets[]. >> >> > >> > drivers/gpu/drm/drm_fourcc.c | 2 +- >> > drivers/gpu/drm/i915/i915_reg.h | 24 +++ >> > drivers/gpu/drm/i915/intel_atomic.c | 8 +- >> > drivers/gpu/drm/i915/intel_display.c | 313 >> > ++++++++++++++++++++++++++++++++--- >> > drivers/gpu/drm/i915/intel_drv.h | 3 +- >> > drivers/gpu/drm/i915/intel_pm.c | 29 +++- >> > drivers/gpu/drm/i915/intel_sprite.c | 16 +- >> > include/drm/drm_mode_config.h | 3 +- >> > include/uapi/drm/drm_fourcc.h | 3 + >> > 9 files changed, 365 insertions(+), 36 deletions(-) >> > >> > -- >> > 1.9.1 >> > >> > _______________________________________________ >> > Intel-gfx mailing list >> > Intel-gfx@lists.freedesktop.org >> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx >> >> -- >> Ville Syrjälä >> Intel OTC >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 0/8] Adding NV12 support @ 2017-07-31 7:04 Vidya Srinivas 2017-07-31 7:04 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 0 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-07-31 7:04 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas This patch series is adding NV12 support for Broxton display after rebasing on latest drm-intel-nightly. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Feature has been currently tested with custom linux based test tool IGT test development is under progress. Floating these patches for initial review. These NV12 patches are dependent on Ville's patches mentioned below. Update from last rev: Patches were initial reviewed last when floated but currently there was a design change with respect to - the way fb offset is handled - the way rotation is handled Rebase of the current NV12 patch series has been done as per the current changes on drm-intel-nightly. Review comments from Ville (12th June 2017) have been addressed Review comments from Clinton A Taylor (7th July 2017) have been addressed Review comments from Clinton A Taylor (10th July 2017) have been addressed. Had missed out tested-by/reviewed-by in the patches. Fixed that error in this series. Review comments from Ville (11th July 2017) addressed. Review comments from Paauwe, Bob (29th July 2017) addressed. Chandra Konduru (6): drm/i915: Set scaler mode for NV12 drm/i915: Update format_is_yuv() to include NV12 drm/i915: Upscale scaler max scale for NV12 drm/i915: Add NV12 as supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Ville Syrjälä (2): drm/i915: Implement .get_format_info() hook for CCS SKL+ display engine can scan out certain kinds of compressed surfaces produced by the render engine. This involved telling the display engine the location of the color control surfae (CCS) which describes which parts of the main surface are compressed and which are not. The location of CCS is provided by userspace as just another plane with its own offset. drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_atomic.c | 8 +- drivers/gpu/drm/i915/intel_display.c | 345 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_pm.c | 29 ++- drivers/gpu/drm/i915/intel_sprite.c | 38 +++- include/uapi/drm/drm_fourcc.h | 20 ++ 7 files changed, 428 insertions(+), 39 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-31 7:04 [PATCH 0/8] Adding NV12 support Vidya Srinivas @ 2017-07-31 7:04 ` Vidya Srinivas 0 siblings, 0 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-07-31 7:04 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 case in existing skl_plane_formats - Added the 10bpc RGB formats v4: Addressed review comments from Clinton A Taylor "Why are we adding 10 bit RGB formats with the NV12 series patches? Trying to set XR30 or AB30 results in error returned even though the modes are advertised for the planes" - Removed 10bit RGB formats added previously with NV12 series v5: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. Addressed review comments from Clinton A Taylor "Why are we adding 10 bit RGB formats with the NV12 series patches? Trying to set XR30 or AB30 results in error returned even though the modes are advertised for the planes" - Previous version has 10bit RGB format removed from VLV formats by mistake. Fixing that in this version. Removed 10bit RGB formats added previously with NV12 series for SKL. v6: Addressed review comments by Ville Restricting the NV12 to BXT and PIPE A and B Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_sprite.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 24f769a..7d16912 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1074,6 +1074,19 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, DRM_FORMAT_VYUY, }; +static uint32_t nv12_plane_formats[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, +}; + struct intel_plane * intel_sprite_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe, int plane) @@ -1106,8 +1119,14 @@ struct intel_plane * intel_plane->update_plane = skl_update_plane; intel_plane->disable_plane = skl_disable_plane; - plane_formats = skl_plane_formats; - num_plane_formats = ARRAY_SIZE(skl_plane_formats); + if (IS_BROXTON(dev_priv) && + ((pipe == PIPE_A || pipe == PIPE_B) && (plane == 0))) { + plane_formats = nv12_plane_formats; + num_plane_formats = ARRAY_SIZE(nv12_plane_formats); + } else { + plane_formats = skl_plane_formats; + num_plane_formats = ARRAY_SIZE(skl_plane_formats); + } } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { intel_plane->can_scale = false; intel_plane->max_downscale = 1; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 0/8] Adding NV12 support for BXT display @ 2017-07-24 4:27 Vidya Srinivas 2017-07-24 4:27 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 0 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-07-24 4:27 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas This patch series is adding NV12 support for Broxton display after rebasing on latest drm-intel-nightly. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Feature has been currently tested with custom linux based test tool IGT test development is under progress. Floating these patches for initial review. These NV12 patches are dependent on Ville's patches mentioned below. Update from last rev: Patches were initial reviewed last when floated but currently there was a design change with respect to - the way fb offset is handled - the way rotation is handled Rebase of the current NV12 patch series has been done as per the current changes on drm-intel-nightly. Review comments from Ville (12th June 2017) have been addressed Review comments from Clinton A Taylor (7th July 2017) have been addressed Review comments from Clinton A Taylor (10th July 2017) have been addressed. Had missed out tested-by/reviewed-by in the patches. Fixed that error in this series. Review comments from Ville (11th July 2017) addressed. Chandra Konduru (6): drm/i915: Set scaler mode for NV12 drm/i915: Update format_is_yuv() to include NV12 drm/i915: Upscale scaler max scale for NV12 drm/i915: Add NV12 as supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Ville Syrjälä (2): drm/i915: Implement .get_format_info() hook for CCS SKL+ display engine can scan out certain kinds of compressed surfaces produced by the render engine. This involved telling the display engine the location of the color control surfae (CCS) which describes which parts of the main surface are compressed and which are not. The location of CCS is provided by userspace as just another plane with its own offset. drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_atomic.c | 8 +- drivers/gpu/drm/i915/intel_display.c | 345 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_pm.c | 29 ++- drivers/gpu/drm/i915/intel_sprite.c | 38 +++- include/uapi/drm/drm_fourcc.h | 20 ++ 7 files changed, 428 insertions(+), 39 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-24 4:27 [PATCH 0/8] Adding NV12 support for BXT display Vidya Srinivas @ 2017-07-24 4:27 ` Vidya Srinivas 0 siblings, 0 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-07-24 4:27 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 case in existing skl_plane_formats - Added the 10bpc RGB formats v4: Addressed review comments from Clinton A Taylor "Why are we adding 10 bit RGB formats with the NV12 series patches? Trying to set XR30 or AB30 results in error returned even though the modes are advertised for the planes" - Removed 10bit RGB formats added previously with NV12 series v5: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. Addressed review comments from Clinton A Taylor "Why are we adding 10 bit RGB formats with the NV12 series patches? Trying to set XR30 or AB30 results in error returned even though the modes are advertised for the planes" - Previous version has 10bit RGB format removed from VLV formats by mistake. Fixing that in this version. Removed 10bit RGB formats added previously with NV12 series for SKL. v6: Addressed review comments by Ville Restricting the NV12 to BXT and PIPE A and B Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_sprite.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 24f769a..7d16912 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1074,6 +1074,19 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, DRM_FORMAT_VYUY, }; +static uint32_t nv12_plane_formats[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, +}; + struct intel_plane * intel_sprite_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe, int plane) @@ -1106,8 +1119,14 @@ struct intel_plane * intel_plane->update_plane = skl_update_plane; intel_plane->disable_plane = skl_disable_plane; - plane_formats = skl_plane_formats; - num_plane_formats = ARRAY_SIZE(skl_plane_formats); + if (IS_BROXTON(dev_priv) && + ((pipe == PIPE_A || pipe == PIPE_B) && (plane == 0))) { + plane_formats = nv12_plane_formats; + num_plane_formats = ARRAY_SIZE(nv12_plane_formats); + } else { + plane_formats = skl_plane_formats; + num_plane_formats = ARRAY_SIZE(skl_plane_formats); + } } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { intel_plane->can_scale = false; intel_plane->max_downscale = 1; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 0/8] Adding NV12 support for SKL display @ 2017-07-10 6:53 Vidya Srinivas 2017-07-10 6:53 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 0 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-07-10 6:53 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas This patch series is adding NV12 support for Skylake display after rebasing on latest drm-intel-nightly. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Feature has been currently tested with custom linux based test tool IGT test development is under progress. Floating these patches for initial review. These NV12 patches are dependent on Ville's patches mentioned below. Update from last rev: Patches were initial reviewed last when floated but currently there was a design change with respect to - the way fb offset is handled - the way rotation is handled Rebase of the current NV12 patch series has been done as per the current changes on drm-intel-nightly. Review comments from Ville (12th June 2017) have been addressed Review comments from Clinton A Taylor (7th July 2017) have been addressed Chandra Konduru (6): drm/i915: Set scaler mode for NV12 drm/i915: Update format_is_yuv() to include NV12 drm/i915: Upscale scaler max scale for NV12 drm/i915: Add NV12 as supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Ville Syrjälä (2): drm/i915: Implement .get_format_info() hook for CCS drm/i915: Add render decompression support drivers/gpu/drm/drm_fourcc.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_atomic.c | 8 +- drivers/gpu/drm/i915/intel_display.c | 313 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_pm.c | 29 +++- drivers/gpu/drm/i915/intel_sprite.c | 20 ++- include/drm/drm_mode_config.h | 3 +- include/uapi/drm/drm_fourcc.h | 3 + 9 files changed, 367 insertions(+), 38 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-10 6:53 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas @ 2017-07-10 6:53 ` Vidya Srinivas 2017-07-10 17:59 ` Clint Taylor 0 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-07-10 6:53 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 case in existing skl_plane_formats - Added the 10bpc RGB formats v4: Addressed review comments from Clinton A Taylor "Why are we adding 10 bit RGB formats with the NV12 series patches? Trying to set XR30 or AB30 results in error returned even though the modes are advertised for the planes" - Removed 10bit RGB formats added previously with NV12 series Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_sprite.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 9a6b011..a48e5f8 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1060,8 +1060,6 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, DRM_FORMAT_ARGB8888, DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888, - DRM_FORMAT_XBGR2101010, - DRM_FORMAT_ABGR2101010, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY, @@ -1074,10 +1072,13 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, DRM_FORMAT_ARGB8888, DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888, + DRM_FORMAT_XBGR2101010, + DRM_FORMAT_ABGR2101010, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, }; struct intel_plane * -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-10 6:53 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas @ 2017-07-10 17:59 ` Clint Taylor 0 siblings, 0 replies; 31+ messages in thread From: Clint Taylor @ 2017-07-10 17:59 UTC (permalink / raw) To: Vidya Srinivas, intel-gfx On 07/09/2017 11:53 PM, Vidya Srinivas wrote: > From: Chandra Konduru <chandra.konduru@intel.com> > > This patch adds NV12 to list of supported formats for sprite plane. > > v2: Rebased (me) > > v3: Review comments by Ville addressed > - Removed skl_plane_formats_with_nv12 and added > NV12 case in existing skl_plane_formats > - Added the 10bpc RGB formats > > v4: Addressed review comments from Clinton A Taylor > "Why are we adding 10 bit RGB formats with the NV12 series patches? > Trying to set XR30 or AB30 results in error returned even though > the modes are advertised for the planes" > - Removed 10bit RGB formats added previously with NV12 series > > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_sprite.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 9a6b011..a48e5f8 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -1060,8 +1060,6 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, > DRM_FORMAT_ARGB8888, > DRM_FORMAT_XBGR8888, > DRM_FORMAT_XRGB8888, > - DRM_FORMAT_XBGR2101010, > - DRM_FORMAT_ABGR2101010, > DRM_FORMAT_YUYV, > DRM_FORMAT_YVYU, > DRM_FORMAT_UYVY, > @@ -1074,10 +1072,13 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, > DRM_FORMAT_ARGB8888, > DRM_FORMAT_XBGR8888, > DRM_FORMAT_XRGB8888, > + DRM_FORMAT_XBGR2101010, > + DRM_FORMAT_ABGR2101010, These are still present? This patch mistakingly removed them from vlv_plane_formats. -Clint > DRM_FORMAT_YUYV, > DRM_FORMAT_YVYU, > DRM_FORMAT_UYVY, > DRM_FORMAT_VYUY, > + DRM_FORMAT_NV12, > }; > > struct intel_plane * _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 0/8] Adding NV12 support for SKL display @ 2017-06-20 6:10 Vidya Srinivas 2017-06-20 6:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 0 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-06-20 6:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas This patch series is adding NV12 support for Skylake display after rebasing on latest drm-intel-nightly. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Feature has been currently tested with custom linux based test tool IGT test development is under progress. Floating these patches for initial review. These NV12 patches are dependent on Ville's patches mentioned below. Update from last rev: Patches were initial reviewed last when floated but currently there was a design change with respect to - the way fb offset is handled - the way rotation is handled Rebase of the current NV12 patch series has been done as per the current changes on drm-intel-nightly. Review comments from Ville (12th June 2017) have been addressed Chandra Konduru (6): drm/i915: Set scaler mode for NV12 drm/i915: Update format_is_yuv() to include NV12 drm/i915: Upscale scaler max scale for NV12 drm/i915: Add NV12 as supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Ville Syrjälä (2): drm/i915: Implement .get_format_info() hook for CCS drm/i915: Add render decompression support drivers/gpu/drm/drm_fourcc.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_atomic.c | 8 +- drivers/gpu/drm/i915/intel_display.c | 312 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_pm.c | 29 +++- drivers/gpu/drm/i915/intel_sprite.c | 18 +- include/drm/drm_mode_config.h | 3 +- include/uapi/drm/drm_fourcc.h | 3 + 9 files changed, 366 insertions(+), 36 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-06-20 6:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas @ 2017-06-20 6:10 ` Vidya Srinivas 2017-07-06 22:50 ` Clint Taylor 0 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-06-20 6:10 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 case in existing skl_plane_formats - Added the 10bpc RGB formats Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_sprite.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index d4665d2..2a388b6f 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1074,10 +1074,13 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, DRM_FORMAT_ARGB8888, DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888, + DRM_FORMAT_XBGR2101010, + DRM_FORMAT_ABGR2101010, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, }; struct intel_plane * -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-06-20 6:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas @ 2017-07-06 22:50 ` Clint Taylor 2017-07-07 5:11 ` Srinivas, Vidya 0 siblings, 1 reply; 31+ messages in thread From: Clint Taylor @ 2017-07-06 22:50 UTC (permalink / raw) To: Vidya Srinivas, intel-gfx On 06/19/2017 11:10 PM, Vidya Srinivas wrote: > From: Chandra Konduru <chandra.konduru@intel.com> > > This patch adds NV12 to list of supported formats for sprite plane. > > v2: Rebased (me) > > v3: Review comments by Ville addressed > - Removed skl_plane_formats_with_nv12 and added > NV12 case in existing skl_plane_formats > - Added the 10bpc RGB formats > > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_sprite.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index d4665d2..2a388b6f 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -1074,10 +1074,13 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, > DRM_FORMAT_ARGB8888, > DRM_FORMAT_XBGR8888, > DRM_FORMAT_XRGB8888, > + DRM_FORMAT_XBGR2101010, > + DRM_FORMAT_ABGR2101010, Why are we adding 10 bit RGB formats with the NV12 series patches? Trying to set XR30 or AB30 results in error returned even though the modes are advertised for the planes. -Clint > DRM_FORMAT_YUYV, > DRM_FORMAT_YVYU, > DRM_FORMAT_UYVY, > DRM_FORMAT_VYUY, > + DRM_FORMAT_NV12, > }; > > struct intel_plane * _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-07-06 22:50 ` Clint Taylor @ 2017-07-07 5:11 ` Srinivas, Vidya 0 siblings, 0 replies; 31+ messages in thread From: Srinivas, Vidya @ 2017-07-07 5:11 UTC (permalink / raw) To: Taylor, Clinton A, intel-gfx > -----Original Message----- > From: Taylor, Clinton A > Sent: Friday, July 7, 2017 4:20 AM > To: Srinivas, Vidya <vidya.srinivas@intel.com>; intel- > gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 7/8] drm/i915: Add NV12 as supported > format for sprite plane > > > > On 06/19/2017 11:10 PM, Vidya Srinivas wrote: > > From: Chandra Konduru <chandra.konduru@intel.com> > > > > This patch adds NV12 to list of supported formats for sprite plane. > > > > v2: Rebased (me) > > > > v3: Review comments by Ville addressed > > - Removed skl_plane_formats_with_nv12 and added > > NV12 case in existing skl_plane_formats > > - Added the 10bpc RGB formats > > > > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > > --- > > drivers/gpu/drm/i915/intel_sprite.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c > > b/drivers/gpu/drm/i915/intel_sprite.c > > index d4665d2..2a388b6f 100644 > > --- a/drivers/gpu/drm/i915/intel_sprite.c > > +++ b/drivers/gpu/drm/i915/intel_sprite.c > > @@ -1074,10 +1074,13 @@ int intel_sprite_set_colorkey(struct > drm_device *dev, void *data, > > DRM_FORMAT_ARGB8888, > > DRM_FORMAT_XBGR8888, > > DRM_FORMAT_XRGB8888, > > + DRM_FORMAT_XBGR2101010, > > + DRM_FORMAT_ABGR2101010, > > Why are we adding 10 bit RGB formats with the NV12 series patches? > Trying to set XR30 or AB30 results in error returned even though the modes > are advertised for the planes. Thank you. I will address the review comments and re-send the patches after rebasing. Regards Vidya > > -Clint > > > DRM_FORMAT_YUYV, > > DRM_FORMAT_YVYU, > > DRM_FORMAT_UYVY, > > DRM_FORMAT_VYUY, > > + DRM_FORMAT_NV12, > > }; > > > > struct intel_plane * _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 00/11] Adding NV12 support for SKL display @ 2017-06-07 4:51 Vidya Srinivas 2017-06-07 10:41 ` [PATCH 0/8] " Vidya Srinivas 2017-06-07 11:40 ` [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas 0 siblings, 2 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-06-07 4:51 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas This patch series is adding NV12 support for Skylake display after rebasing on latest drm-intel-nightly. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Feature has been currently tested with custom linux based test tool IGT test development is under progress. Floating these patches for initial review. These NV12 patches are dependent on Ville's patches mentioned below. Update from last rev: Patches were initial reviewed last when floated but currently there was a design change with respect to - the way fb offset is handled - the way rotation is handled Rebase of the current NV12 patch series has been done as per the current changes on drm-intel-nightly. Chandra Konduru (6): drm/i915: Set scaler mode for NV12 drm/i915: Update format_is_yuv() to include NV12 drm/i915: Upscale scaler max scale for NV12 drm/i915: Add NV12 as supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Ville Syrjälä (5): drm/i915: Add render decompression support drm/i915: Fix scaling check for 90/270 degree plane rotation drm/i915: Fix SKL+ watermarks for 90/270 rotation drm/i915: Fix 90/270 rotated coordinates for FBC drm/i915: Implement .get_format_info() hook for CCS drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_atomic.c | 6 + drivers/gpu/drm/i915/intel_display.c | 353 +++++++++++++++++++++++++++++++---- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_fbc.c | 19 +- drivers/gpu/drm/i915/intel_pm.c | 65 +++++-- drivers/gpu/drm/i915/intel_sprite.c | 39 +++- include/uapi/drm/drm_fourcc.h | 3 + 8 files changed, 445 insertions(+), 67 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 0/8] Adding NV12 support for SKL display 2017-06-07 4:51 [PATCH 00/11] Adding NV12 support for SKL display Vidya Srinivas @ 2017-06-07 10:41 ` Vidya Srinivas 2017-06-07 10:41 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 2017-06-07 11:40 ` [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas 1 sibling, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-06-07 10:41 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas This patch series is adding NV12 support for Skylake display after rebasing on latest drm-intel-nightly. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Feature has been currently tested with custom linux based test tool IGT test development is under progress. Floating these patches for initial review. These NV12 patches are dependent on Ville's patches mentioned below. Update from last rev: Patches were initial reviewed last when floated but currently there was a design change with respect to - the way fb offset is handled - the way rotation is handled Rebase of the current NV12 patch series has been done as per the current changes on drm-intel-nightly. Chandra Konduru (6): drm/i915: Set scaler mode for NV12 drm/i915: Update format_is_yuv() to include NV12 drm/i915: Upscale scaler max scale for NV12 drm/i915: Add NV12 as supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Ville Syrjälä (2): drm/i915: Add render decompression support drm/i915: Implement .get_format_info() hook for CCS drivers/gpu/drm/drm_fourcc.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_atomic.c | 6 + drivers/gpu/drm/i915/intel_display.c | 341 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_pm.c | 29 ++- drivers/gpu/drm/i915/intel_sprite.c | 39 +++- include/drm/drm_mode_config.h | 3 +- include/uapi/drm/drm_fourcc.h | 3 + 9 files changed, 410 insertions(+), 40 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-06-07 10:41 ` [PATCH 0/8] " Vidya Srinivas @ 2017-06-07 10:41 ` Vidya Srinivas 2017-06-12 14:20 ` Ville Syrjälä 0 siblings, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-06-07 10:41 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) Link: https://patchwork.kernel.org/patch/6426211/ Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_sprite.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index d4665d2..b90624b 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1080,6 +1080,19 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, DRM_FORMAT_VYUY, }; +static uint32_t skl_plane_formats_with_nv12[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, +}; + struct intel_plane * intel_sprite_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe, int plane) @@ -1111,9 +1124,14 @@ struct intel_plane * intel_plane->update_plane = skl_update_plane; intel_plane->disable_plane = skl_disable_plane; - - plane_formats = skl_plane_formats; - num_plane_formats = ARRAY_SIZE(skl_plane_formats); + if ((pipe == PIPE_A || pipe == PIPE_B) && (plane == 0)) { + plane_formats = skl_plane_formats_with_nv12; + num_plane_formats = + ARRAY_SIZE(skl_plane_formats_with_nv12); + } else { + plane_formats = skl_plane_formats; + num_plane_formats = ARRAY_SIZE(skl_plane_formats); + } } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { intel_plane->can_scale = false; intel_plane->max_downscale = 1; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-06-07 10:41 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas @ 2017-06-12 14:20 ` Ville Syrjälä 2017-06-15 11:30 ` Srinivas, Vidya 0 siblings, 1 reply; 31+ messages in thread From: Ville Syrjälä @ 2017-06-12 14:20 UTC (permalink / raw) To: Vidya Srinivas; +Cc: intel-gfx On Wed, Jun 07, 2017 at 04:11:47PM +0530, Vidya Srinivas wrote: > From: Chandra Konduru <chandra.konduru@intel.com> > > This patch adds NV12 to list of supported formats for sprite plane. > > v2: Rebased (me) > > Link: https://patchwork.kernel.org/patch/6426211/ > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_sprite.c | 24 +++++++++++++++++++++--- > 1 file changed, 21 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index d4665d2..b90624b 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -1080,6 +1080,19 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, > DRM_FORMAT_VYUY, > }; > > +static uint32_t skl_plane_formats_with_nv12[] = { Same as with previous patch, the _with_ doesn't seem to add anything useful. > + DRM_FORMAT_RGB565, > + DRM_FORMAT_ABGR8888, > + DRM_FORMAT_ARGB8888, > + DRM_FORMAT_XBGR8888, > + DRM_FORMAT_XRGB8888, > + DRM_FORMAT_YUYV, > + DRM_FORMAT_YVYU, > + DRM_FORMAT_UYVY, > + DRM_FORMAT_VYUY, > + DRM_FORMAT_NV12, > +}; We're missing the 10bpc RGB formats, but we're already missing them in the current format list, so I guess it's fine. We'll need to get rid of this primary/sprite duplication anyway at some point. > + > struct intel_plane * > intel_sprite_plane_create(struct drm_i915_private *dev_priv, > enum pipe pipe, int plane) > @@ -1111,9 +1124,14 @@ struct intel_plane * > > intel_plane->update_plane = skl_update_plane; > intel_plane->disable_plane = skl_disable_plane; > - > - plane_formats = skl_plane_formats; > - num_plane_formats = ARRAY_SIZE(skl_plane_formats); > + if ((pipe == PIPE_A || pipe == PIPE_B) && (plane == 0)) { Usless parens. I don't think we want to enable NV12 on SKL/BXT. Display w/a #870 seems to be telling me KBL+/GLK+ should be fine. > + plane_formats = skl_plane_formats_with_nv12; > + num_plane_formats = > + ARRAY_SIZE(skl_plane_formats_with_nv12); > + } else { > + plane_formats = skl_plane_formats; > + num_plane_formats = ARRAY_SIZE(skl_plane_formats); > + } > } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { > intel_plane->can_scale = false; > intel_plane->max_downscale = 1; > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-06-12 14:20 ` Ville Syrjälä @ 2017-06-15 11:30 ` Srinivas, Vidya 0 siblings, 0 replies; 31+ messages in thread From: Srinivas, Vidya @ 2017-06-15 11:30 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx > -----Original Message----- > From: Ville Syrjälä [mailto:ville.syrjala@linux.intel.com] > Sent: Monday, June 12, 2017 7:50 PM > To: Srinivas, Vidya <vidya.srinivas@intel.com> > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 7/8] drm/i915: Add NV12 as supported > format for sprite plane > > On Wed, Jun 07, 2017 at 04:11:47PM +0530, Vidya Srinivas wrote: > > From: Chandra Konduru <chandra.konduru@intel.com> > > > > This patch adds NV12 to list of supported formats for sprite plane. > > > > v2: Rebased (me) > > > > Link: https://patchwork.kernel.org/patch/6426211/ > > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> > > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > > --- > > drivers/gpu/drm/i915/intel_sprite.c | 24 +++++++++++++++++++++--- > > 1 file changed, 21 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c > > b/drivers/gpu/drm/i915/intel_sprite.c > > index d4665d2..b90624b 100644 > > --- a/drivers/gpu/drm/i915/intel_sprite.c > > +++ b/drivers/gpu/drm/i915/intel_sprite.c > > @@ -1080,6 +1080,19 @@ int intel_sprite_set_colorkey(struct > drm_device *dev, void *data, > > DRM_FORMAT_VYUY, > > }; > > > > +static uint32_t skl_plane_formats_with_nv12[] = { > > Same as with previous patch, the _with_ doesn't seem to add anything > useful. Thank you. I will make the necessary changes and re-submit. Regards Vidya > > > + DRM_FORMAT_RGB565, > > + DRM_FORMAT_ABGR8888, > > + DRM_FORMAT_ARGB8888, > > + DRM_FORMAT_XBGR8888, > > + DRM_FORMAT_XRGB8888, > > + DRM_FORMAT_YUYV, > > + DRM_FORMAT_YVYU, > > + DRM_FORMAT_UYVY, > > + DRM_FORMAT_VYUY, > > + DRM_FORMAT_NV12, > > +}; > > We're missing the 10bpc RGB formats, but we're already missing them in > the current format list, so I guess it's fine. We'll need to get rid of this > primary/sprite duplication anyway at some point. > > > + > > struct intel_plane * > > intel_sprite_plane_create(struct drm_i915_private *dev_priv, > > enum pipe pipe, int plane) > > @@ -1111,9 +1124,14 @@ struct intel_plane * > > > > intel_plane->update_plane = skl_update_plane; > > intel_plane->disable_plane = skl_disable_plane; > > - > > - plane_formats = skl_plane_formats; > > - num_plane_formats = ARRAY_SIZE(skl_plane_formats); > > + if ((pipe == PIPE_A || pipe == PIPE_B) && (plane == 0)) { > > Usless parens. > > I don't think we want to enable NV12 on SKL/BXT. Display w/a #870 seems > to be telling me KBL+/GLK+ should be fine. We were working on enabling the NV12 on the Apollo Lake (BXT) as well. I will check on this. Thank you. Regards Vidya > > > + plane_formats = skl_plane_formats_with_nv12; > > + num_plane_formats = > > + ARRAY_SIZE(skl_plane_formats_with_nv12); > > + } else { > > + plane_formats = skl_plane_formats; > > + num_plane_formats = > ARRAY_SIZE(skl_plane_formats); > > + } > > } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { > > intel_plane->can_scale = false; > > intel_plane->max_downscale = 1; > > -- > > 1.9.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 0/8] Adding NV12 support for SKL display 2017-06-07 4:51 [PATCH 00/11] Adding NV12 support for SKL display Vidya Srinivas 2017-06-07 10:41 ` [PATCH 0/8] " Vidya Srinivas @ 2017-06-07 11:40 ` Vidya Srinivas 2017-06-07 11:41 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 1 sibling, 1 reply; 31+ messages in thread From: Vidya Srinivas @ 2017-06-07 11:40 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas This patch series is adding NV12 support for Skylake display after rebasing on latest drm-intel-nightly. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Feature has been currently tested with custom linux based test tool IGT test development is under progress. Floating these patches for initial review. These NV12 patches are dependent on Ville's patches mentioned below. Update from last rev: Patches were initial reviewed last when floated but currently there was a design change with respect to - the way fb offset is handled - the way rotation is handled Rebase of the current NV12 patch series has been done as per the current changes on drm-intel-nightly. Chandra Konduru (6): drm/i915: Set scaler mode for NV12 drm/i915: Update format_is_yuv() to include NV12 drm/i915: Upscale scaler max scale for NV12 drm/i915: Add NV12 as supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Ville Syrjälä (2): drm/i915: Implement .get_format_info() hook for CCS drm/i915: Add render decompression support drivers/gpu/drm/drm_fourcc.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_atomic.c | 6 + drivers/gpu/drm/i915/intel_display.c | 341 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_pm.c | 29 ++- drivers/gpu/drm/i915/intel_sprite.c | 39 +++- include/drm/drm_mode_config.h | 3 +- include/uapi/drm/drm_fourcc.h | 3 + 9 files changed, 410 insertions(+), 40 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane 2017-06-07 11:40 ` [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas @ 2017-06-07 11:41 ` Vidya Srinivas 0 siblings, 0 replies; 31+ messages in thread From: Vidya Srinivas @ 2017-06-07 11:41 UTC (permalink / raw) To: intel-gfx; +Cc: Vidya Srinivas From: Chandra Konduru <chandra.konduru@intel.com> This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) Link: https://patchwork.kernel.org/patch/6426211/ Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/intel_sprite.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index d4665d2..b90624b 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1080,6 +1080,19 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, DRM_FORMAT_VYUY, }; +static uint32_t skl_plane_formats_with_nv12[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, +}; + struct intel_plane * intel_sprite_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe, int plane) @@ -1111,9 +1124,14 @@ struct intel_plane * intel_plane->update_plane = skl_update_plane; intel_plane->disable_plane = skl_disable_plane; - - plane_formats = skl_plane_formats; - num_plane_formats = ARRAY_SIZE(skl_plane_formats); + if ((pipe == PIPE_A || pipe == PIPE_B) && (plane == 0)) { + plane_formats = skl_plane_formats_with_nv12; + num_plane_formats = + ARRAY_SIZE(skl_plane_formats_with_nv12); + } else { + plane_formats = skl_plane_formats; + num_plane_formats = ARRAY_SIZE(skl_plane_formats); + } } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { intel_plane->can_scale = false; intel_plane->max_downscale = 1; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 31+ messages in thread
end of thread, other threads:[~2017-08-10 0:16 UTC | newest] Thread overview: 31+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas 2017-07-11 14:10 ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas 2017-07-11 14:10 ` [PATCH 2/8] drm/i915: Add render decompression support Vidya Srinivas 2017-07-11 14:10 ` [PATCH 3/8] drm/i915: Set scaler mode for NV12 Vidya Srinivas 2017-07-11 14:10 ` [PATCH 4/8] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas 2017-07-11 14:10 ` [PATCH 5/8] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas 2017-07-11 16:16 ` Ville Syrjälä 2017-07-11 14:10 ` [PATCH 6/8] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas 2017-07-11 16:14 ` Ville Syrjälä 2017-07-11 14:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 2017-07-11 15:04 ` Clint Taylor 2017-07-11 16:12 ` Ville Syrjälä 2017-07-20 10:05 ` Srinivas, Vidya 2017-07-24 4:24 ` Srinivas, Vidya 2017-07-11 14:10 ` [PATCH 8/8] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas 2017-07-11 16:13 ` Ville Syrjälä 2017-07-11 14:55 ` ✓ Fi.CI.BAT: success for Adding NV12 support for SKL display (rev5) Patchwork 2017-07-11 16:18 ` [PATCH 0/8] Adding NV12 support for SKL display Ville Syrjälä 2017-08-04 1:23 ` Hwang, Dongseong 2017-08-10 0:15 ` Hwang, Dongseong -- strict thread matches above, loose matches on Subject: below -- 2017-07-31 7:04 [PATCH 0/8] Adding NV12 support Vidya Srinivas 2017-07-31 7:04 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 2017-07-24 4:27 [PATCH 0/8] Adding NV12 support for BXT display Vidya Srinivas 2017-07-24 4:27 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 2017-07-10 6:53 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas 2017-07-10 6:53 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 2017-07-10 17:59 ` Clint Taylor 2017-06-20 6:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas 2017-06-20 6:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 2017-07-06 22:50 ` Clint Taylor 2017-07-07 5:11 ` Srinivas, Vidya 2017-06-07 4:51 [PATCH 00/11] Adding NV12 support for SKL display Vidya Srinivas 2017-06-07 10:41 ` [PATCH 0/8] " Vidya Srinivas 2017-06-07 10:41 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas 2017-06-12 14:20 ` Ville Syrjälä 2017-06-15 11:30 ` Srinivas, Vidya 2017-06-07 11:40 ` [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas 2017-06-07 11:41 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
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