From: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> To: Abhishek Sahu <absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> Cc: dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, richard-/L3Ra7n9ekc@public.gmane.org, cyrille.pitchen-yU5RGvR974pGWvitb5QawA@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, andy.gross-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org Subject: Re: [PATCH v2 12/25] dt-bindings: qcom_nandc: QPIC NAND documentation Date: Wed, 19 Jul 2017 21:39:04 +0200 [thread overview] Message-ID: <20170719213904.60d9b681@bbrezillon> (raw) In-Reply-To: <1500464893-11352-13-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> On Wed, 19 Jul 2017 17:18:00 +0530 Abhishek Sahu <absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote: > 1. QPIC NAND will use compatible string "qcom,qpic-nandc-v1.4.0" > 2. QPIC NAND will 3 BAM channels: command, data tx and data rx > while EBI2 NAND uses only single ADM channel. > 3. CRCI is only required for ADM DMA and its not required for > QPIC NAND. > > Signed-off-by: Abhishek Sahu <absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> > --- > .../devicetree/bindings/mtd/qcom_nandc.txt | 54 ++++++++++++++++++++-- > 1 file changed, 51 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt > index b24adfe..8efaeb0 100644 > --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt > +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt > @@ -1,13 +1,15 @@ > * Qualcomm NAND controller > > Required properties: > -- compatible: should be "qcom,ebi2-nandc" - EBI2 NAND which uses ADM > - DMA like IPQ8064. > - > +- compatible: must be one of the following: > + * "qcom,ebi2-nandc" - EBI2 NAND which uses ADM DMA like IPQ8064. > + * "qcom,qpic-nandc-v1.4.0" - QPIC NAND v1.4.0 which uses BAM DMA like IPQ4019. > - reg: MMIO address range > - clocks: must contain core clock and always on clock > - clock-names: must contain "core" for the core clock and "aon" for the > always on clock > + > +EBI2 specific properties: > - dmas: DMA specifier, consisting of a phandle to the ADM DMA > controller node and the channel number to be used for > NAND. Refer to dma.txt and qcom_adm.txt for more details > @@ -18,6 +20,12 @@ Required properties: > - qcom,data-crci: must contain the ADM data type CRCI block instance > number specified for the NAND controller on the given > platform > + > +QPIC specific properties: > +- dmas: DMA specifier, consisting of a phandle to the BAM DMA > + and the channel number to be used for NAND. Refer to > + dma.txt, qcom_bam_dma.txt for more details > +- dma-names: must contain all 3 channel names : "tx", "rx", "cmd" > - #address-cells: <1> - subnodes give the chip-select number > - #size-cells: <0> > > @@ -84,3 +92,43 @@ nand@1ac00000 { > }; > }; > }; > + > +nand@79b0000 { I think I already mentioned I'd prefer to have nand-controller@xxxx { > + compatible = "qcom,qpic-nandc-v1.4.0"; > + reg = <0x79b0000 0x1000>; > + > + clocks = <&gcc GCC_QPIC_CLK>, > + <&gcc GCC_QPIC_AHB_CLK>; > + clock-names = "core", "aon"; > + > + dmas = <&qpicbam 0>, > + <&qpicbam 1>, > + <&qpicbam 2>; > + dma-names = "tx", "rx", "cmd"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + nandcs@0 { and nand@x { here. > + reg = <0>; > + nand-ecc-strength = <4>; > + nand-ecc-step-size = <512>; > + nand-bus-width = <8>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "boot-nand"; > + reg = <0 0x58a0000>; > + }; > + > + partition@58a0000 { > + label = "fs-nand"; > + reg = <0x58a0000 0x4000000>; > + }; > + }; > + }; > +}; -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@free-electrons.com> To: Abhishek Sahu <absahu@codeaurora.org> Cc: dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, richard@nod.at, cyrille.pitchen@wedev4u.fr, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, architt@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, andy.gross@linaro.org, sricharan@codeaurora.org Subject: Re: [PATCH v2 12/25] dt-bindings: qcom_nandc: QPIC NAND documentation Date: Wed, 19 Jul 2017 21:39:04 +0200 [thread overview] Message-ID: <20170719213904.60d9b681@bbrezillon> (raw) In-Reply-To: <1500464893-11352-13-git-send-email-absahu@codeaurora.org> On Wed, 19 Jul 2017 17:18:00 +0530 Abhishek Sahu <absahu@codeaurora.org> wrote: > 1. QPIC NAND will use compatible string "qcom,qpic-nandc-v1.4.0" > 2. QPIC NAND will 3 BAM channels: command, data tx and data rx > while EBI2 NAND uses only single ADM channel. > 3. CRCI is only required for ADM DMA and its not required for > QPIC NAND. > > Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> > --- > .../devicetree/bindings/mtd/qcom_nandc.txt | 54 ++++++++++++++++++++-- > 1 file changed, 51 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt > index b24adfe..8efaeb0 100644 > --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt > +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt > @@ -1,13 +1,15 @@ > * Qualcomm NAND controller > > Required properties: > -- compatible: should be "qcom,ebi2-nandc" - EBI2 NAND which uses ADM > - DMA like IPQ8064. > - > +- compatible: must be one of the following: > + * "qcom,ebi2-nandc" - EBI2 NAND which uses ADM DMA like IPQ8064. > + * "qcom,qpic-nandc-v1.4.0" - QPIC NAND v1.4.0 which uses BAM DMA like IPQ4019. > - reg: MMIO address range > - clocks: must contain core clock and always on clock > - clock-names: must contain "core" for the core clock and "aon" for the > always on clock > + > +EBI2 specific properties: > - dmas: DMA specifier, consisting of a phandle to the ADM DMA > controller node and the channel number to be used for > NAND. Refer to dma.txt and qcom_adm.txt for more details > @@ -18,6 +20,12 @@ Required properties: > - qcom,data-crci: must contain the ADM data type CRCI block instance > number specified for the NAND controller on the given > platform > + > +QPIC specific properties: > +- dmas: DMA specifier, consisting of a phandle to the BAM DMA > + and the channel number to be used for NAND. Refer to > + dma.txt, qcom_bam_dma.txt for more details > +- dma-names: must contain all 3 channel names : "tx", "rx", "cmd" > - #address-cells: <1> - subnodes give the chip-select number > - #size-cells: <0> > > @@ -84,3 +92,43 @@ nand@1ac00000 { > }; > }; > }; > + > +nand@79b0000 { I think I already mentioned I'd prefer to have nand-controller@xxxx { > + compatible = "qcom,qpic-nandc-v1.4.0"; > + reg = <0x79b0000 0x1000>; > + > + clocks = <&gcc GCC_QPIC_CLK>, > + <&gcc GCC_QPIC_AHB_CLK>; > + clock-names = "core", "aon"; > + > + dmas = <&qpicbam 0>, > + <&qpicbam 1>, > + <&qpicbam 2>; > + dma-names = "tx", "rx", "cmd"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + nandcs@0 { and nand@x { here. > + reg = <0>; > + nand-ecc-strength = <4>; > + nand-ecc-step-size = <512>; > + nand-bus-width = <8>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "boot-nand"; > + reg = <0 0x58a0000>; > + }; > + > + partition@58a0000 { > + label = "fs-nand"; > + reg = <0x58a0000 0x4000000>; > + }; > + }; > + }; > +};
next prev parent reply other threads:[~2017-07-19 19:39 UTC|newest] Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-07-19 11:47 [PATCH v2 00/25] Add QCOM QPIC NAND support Abhishek Sahu 2017-07-19 11:47 ` [PATCH v2 01/25] mtd: nand: qcom: fix config error for BCH Abhishek Sahu 2017-08-02 5:47 ` Archit Taneja 2017-08-03 15:56 ` Boris Brezillon 2017-08-03 17:52 ` Abhishek Sahu 2017-08-03 18:47 ` Boris Brezillon 2017-08-03 19:02 ` Abhishek Sahu 2017-08-04 7:46 ` Boris Brezillon 2017-07-19 11:47 ` [PATCH v2 02/25] mtd: nand: qcom: program NAND_DEV_CMD_VLD register Abhishek Sahu 2017-08-02 5:49 ` Archit Taneja 2017-08-03 15:47 ` Boris Brezillon 2017-08-03 17:59 ` Abhishek Sahu 2017-08-03 17:59 ` Abhishek Sahu [not found] ` <1500464893-11352-3-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-08-03 15:48 ` Boris Brezillon 2017-08-03 15:48 ` Boris Brezillon 2017-08-03 17:54 ` Abhishek Sahu 2017-08-03 17:54 ` Abhishek Sahu 2017-07-19 11:47 ` [PATCH v2 03/25] mtd: nand: qcom: change compatible string for EBI2 NANDC Abhishek Sahu 2017-07-19 11:47 ` [PATCH v2 05/25] mtd: nand: qcom: remove redundant chip select compatible string Abhishek Sahu 2017-08-02 5:51 ` Archit Taneja 2017-08-04 7:47 ` Boris Brezillon 2017-07-19 11:47 ` [PATCH v2 06/25] dt-bindings: qcom_nandc: remove " Abhishek Sahu 2017-07-24 19:14 ` Rob Herring 2017-07-24 19:14 ` Rob Herring 2017-08-04 7:47 ` Boris Brezillon 2017-07-19 11:47 ` [PATCH v2 07/25] mtd: nand: qcom: reorganize nand page read Abhishek Sahu [not found] ` <1500464893-11352-8-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-08-02 5:56 ` Archit Taneja 2017-08-02 5:56 ` Archit Taneja 2017-08-04 7:48 ` Boris Brezillon 2017-08-04 7:48 ` Boris Brezillon 2017-07-19 11:47 ` [PATCH v2 08/25] mtd: nand: qcom: reorganize nand page write Abhishek Sahu 2017-08-02 6:01 ` Archit Taneja 2017-08-02 13:54 ` Abhishek Sahu 2017-08-04 7:48 ` Boris Brezillon 2017-07-19 11:47 ` [PATCH v2 09/25] mtd: nand: qcom: remove memset for clearing read register buffer Abhishek Sahu [not found] ` <1500464893-11352-10-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-08-02 6:06 ` Archit Taneja 2017-08-02 6:06 ` Archit Taneja 2017-08-04 7:48 ` Boris Brezillon 2017-07-19 11:47 ` [PATCH v2 10/25] mtd: nand: qcom: reorganize nand devices probing Abhishek Sahu [not found] ` <1500464893-11352-11-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-08-02 8:21 ` Archit Taneja 2017-08-02 8:21 ` Archit Taneja 2017-08-02 13:56 ` Abhishek Sahu [not found] ` <772b9720-cd17-0897-4ee1-836abb748f34-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-08-04 7:49 ` Boris Brezillon 2017-08-04 7:49 ` Boris Brezillon 2017-07-19 11:47 ` [PATCH v2 11/25] mtd: nand: qcom: support for NAND controller properties Abhishek Sahu 2017-08-02 8:31 ` Archit Taneja 2017-08-04 7:49 ` Boris Brezillon 2017-08-04 7:56 ` Boris Brezillon 2017-08-04 12:39 ` Boris Brezillon 2017-07-19 11:48 ` [PATCH v2 12/25] dt-bindings: qcom_nandc: QPIC NAND documentation Abhishek Sahu [not found] ` <1500464893-11352-13-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-07-19 19:39 ` Boris Brezillon [this message] 2017-07-19 19:39 ` Boris Brezillon 2017-07-20 5:33 ` Abhishek Sahu 2017-07-24 19:17 ` Rob Herring 2017-07-25 18:43 ` Abhishek Sahu 2017-07-31 16:05 ` Abhishek Sahu 2017-08-04 12:45 ` Boris Brezillon 2017-08-04 13:11 ` Abhishek Sahu 2017-08-04 13:22 ` Boris Brezillon 2017-07-19 11:48 ` [PATCH v2 13/25] mtd: nand: qcom: add QPIC NAND compatible string Abhishek Sahu 2017-08-02 8:36 ` Archit Taneja 2017-07-19 11:48 ` [PATCH v2 14/25] mtd: nand: qcom: add and initialize QPIC DMA resources Abhishek Sahu 2017-08-02 8:41 ` Archit Taneja 2017-08-02 13:59 ` Abhishek Sahu 2017-07-19 11:48 ` [PATCH v2 15/25] mtd: nand: qcom: DMA mapping support for register read buffer Abhishek Sahu [not found] ` <1500464893-11352-16-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-08-04 5:26 ` Archit Taneja 2017-08-04 5:26 ` Archit Taneja [not found] ` <1500464893-11352-1-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-07-19 11:47 ` [PATCH v2 04/25] dt-bindings: qcom_nandc: change compatible string for EBI2 NANDC Abhishek Sahu 2017-07-19 11:47 ` Abhishek Sahu 2017-07-24 19:13 ` Rob Herring 2017-07-24 19:13 ` Rob Herring 2017-07-19 11:48 ` [PATCH v2 16/25] mtd: nand: qcom: allocate BAM transaction Abhishek Sahu 2017-07-19 11:48 ` Abhishek Sahu [not found] ` <1500464893-11352-17-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-07-21 20:28 ` kbuild test robot 2017-07-21 20:28 ` kbuild test robot 2017-08-04 5:43 ` Archit Taneja 2017-07-19 11:48 ` [PATCH v2 17/25] mtd: nand: qcom: add BAM DMA descriptor handling Abhishek Sahu [not found] ` <1500464893-11352-18-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-08-04 5:54 ` Archit Taneja 2017-08-04 5:54 ` Archit Taneja 2017-07-19 11:48 ` [PATCH v2 18/25] mtd: nand: qcom: support for passing flags in transfer functions Abhishek Sahu 2017-07-19 11:48 ` [PATCH v2 19/25] mtd: nand: qcom: support for read location registers Abhishek Sahu 2017-07-19 11:48 ` Abhishek Sahu 2017-07-19 11:48 ` [PATCH v2 20/25] mtd: nand: qcom: erased codeword detection configuration Abhishek Sahu 2017-07-19 11:48 ` [PATCH v2 21/25] mtd: nand: qcom: support for QPIC page read/write Abhishek Sahu 2017-07-19 11:48 ` [PATCH v2 22/25] mtd: nand: qcom: QPIC raw write support Abhishek Sahu 2017-07-19 11:48 ` [PATCH v2 23/25] mtd: nand: qcom: change register offset defines with enums Abhishek Sahu 2017-07-19 11:48 ` [PATCH v2 24/25] dt-bindings: qcom_nandc: compatible string for version 1.5.0 Abhishek Sahu 2017-07-19 11:48 ` [PATCH v2 25/25] mtd: nand: qcom: support for QPIC " Abhishek Sahu 2017-08-04 7:53 ` [PATCH v2 00/25] Add QCOM QPIC NAND support Boris Brezillon 2017-08-04 7:55 ` Boris Brezillon 2017-08-04 7:55 ` Boris Brezillon 2017-08-04 8:47 ` Abhishek Sahu 2017-08-04 8:47 ` Abhishek Sahu
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