* [PATCH] drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
@ 2017-07-19 17:39 ` Matthias Kaehlcke
0 siblings, 0 replies; 7+ messages in thread
From: Matthias Kaehlcke @ 2017-07-19 17:39 UTC (permalink / raw)
To: Daniel Vetter, Jani Nikula, David Airlie, Daniel Vetter
Cc: intel-gfx, dri-devel, Linux Kernel Mailing List,
Stéphane Marchesin, Grant Grundler, Matthias Kaehlcke
Commit a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
transcoders") misses some pieces, due to a problem with the patch
format, this patch adds the remaining bits.
Fixes: a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
transcoders")
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---
drivers/gpu/drm/i915/intel_display.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a89d0fd1c2e1..5c7054c3be0e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5347,8 +5347,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
return;
if (intel_crtc->config->has_pch_encoder)
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
- false);
+ intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
@@ -5433,8 +5432,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_wait_for_vblank(dev_priv, pipe);
intel_wait_for_vblank(dev_priv, pipe);
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
- true);
+ intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
/* If we change the relative order between pipe/planes enabling, we need
@@ -5531,8 +5529,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
if (intel_crtc->config->has_pch_encoder)
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
- false);
+ intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_encoders_disable(crtc, old_crtc_state, old_state);
@@ -5560,8 +5557,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
intel_encoders_post_disable(crtc, old_crtc_state, old_state);
if (old_crtc_state->has_pch_encoder)
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
- true);
+ intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
static void i9xx_pfit_enable(struct intel_crtc *crtc)
--
2.14.0.rc0.284.gd933b75aa4-goog
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH] drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
@ 2017-07-19 17:39 ` Matthias Kaehlcke
0 siblings, 0 replies; 7+ messages in thread
From: Matthias Kaehlcke @ 2017-07-19 17:39 UTC (permalink / raw)
To: Daniel Vetter, Jani Nikula, David Airlie, Daniel Vetter
Cc: Grant Grundler, intel-gfx, Linux Kernel Mailing List, dri-devel,
Stéphane Marchesin, Matthias Kaehlcke
Commit a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
transcoders") misses some pieces, due to a problem with the patch
format, this patch adds the remaining bits.
Fixes: a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
transcoders")
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---
drivers/gpu/drm/i915/intel_display.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a89d0fd1c2e1..5c7054c3be0e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5347,8 +5347,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
return;
if (intel_crtc->config->has_pch_encoder)
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
- false);
+ intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
@@ -5433,8 +5432,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_wait_for_vblank(dev_priv, pipe);
intel_wait_for_vblank(dev_priv, pipe);
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
- true);
+ intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
/* If we change the relative order between pipe/planes enabling, we need
@@ -5531,8 +5529,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
if (intel_crtc->config->has_pch_encoder)
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
- false);
+ intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_encoders_disable(crtc, old_crtc_state, old_state);
@@ -5560,8 +5557,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
intel_encoders_post_disable(crtc, old_crtc_state, old_state);
if (old_crtc_state->has_pch_encoder)
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
- true);
+ intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
static void i9xx_pfit_enable(struct intel_crtc *crtc)
--
2.14.0.rc0.284.gd933b75aa4-goog
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
2017-07-19 17:39 ` Matthias Kaehlcke
(?)
@ 2017-07-19 17:57 ` Patchwork
-1 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-07-19 17:57 UTC (permalink / raw)
To: Matthias Kaehlcke; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
URL : https://patchwork.freedesktop.org/series/27591/
State : success
== Summary ==
Series 27591v1 drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
https://patchwork.freedesktop.org/api/1.0/series/27591/revisions/1/mbox/
Test gem_sync:
Subgroup basic-store-all:
fail -> PASS (fi-ivb-3520m) fdo#100007
Test kms_busy:
Subgroup basic-flip-default-a:
pass -> DMESG-WARN (fi-skl-6700hq) fdo#101144
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS (fi-byt-n2820) fdo#101705
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705
fi-bdw-5557u total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:447s
fi-bdw-gvtdvm total:279 pass:265 dwarn:0 dfail:0 fail:0 skip:14 time:433s
fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:355s
fi-bsw-n3050 total:279 pass:243 dwarn:0 dfail:0 fail:0 skip:36 time:533s
fi-bxt-j4205 total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:509s
fi-byt-j1900 total:279 pass:254 dwarn:1 dfail:0 fail:0 skip:24 time:497s
fi-byt-n2820 total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:486s
fi-glk-2a total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:597s
fi-hsw-4770 total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:437s
fi-hsw-4770r total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:417s
fi-ilk-650 total:279 pass:229 dwarn:0 dfail:0 fail:0 skip:50 time:422s
fi-ivb-3520m total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:505s
fi-ivb-3770 total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:469s
fi-kbl-7500u total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:467s
fi-kbl-7560u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:661s
fi-kbl-r total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:586s
fi-skl-6260u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:460s
fi-skl-6700hq total:279 pass:261 dwarn:1 dfail:0 fail:0 skip:17 time:595s
fi-skl-6700k total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:468s
fi-skl-6770hq total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:482s
fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:435s
fi-skl-x1585l total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:472s
fi-snb-2520m total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:541s
fi-snb-2600 total:279 pass:250 dwarn:0 dfail:0 fail:0 skip:29 time:404s
fi-pnv-d510 failed to collect. IGT log at Patchwork_5237/fi-pnv-d510/igt.log
f1c32d67a1e143cba1b0ad042448f39d75d9ccaa drm-tip: 2017y-07m-19d-13h-38m-55s UTC integration manifest
406ffba drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5237/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
2017-07-19 17:39 ` Matthias Kaehlcke
@ 2017-07-20 8:27 ` Daniel Vetter
-1 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2017-07-20 8:27 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: Daniel Vetter, Jani Nikula, David Airlie, Daniel Vetter,
intel-gfx, dri-devel, Linux Kernel Mailing List,
Stéphane Marchesin, Grant Grundler
On Wed, Jul 19, 2017 at 10:39:28AM -0700, Matthias Kaehlcke wrote:
> Commit a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
> transcoders") misses some pieces, due to a problem with the patch
> format, this patch adds the remaining bits.
>
> Fixes: a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
> transcoders")
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Applied, and this time successfully it seems!
Thanks a lot, and sorry for the slight ordeal, I still have no clear idea
what happened with your v2 patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 12 ++++--------
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a89d0fd1c2e1..5c7054c3be0e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5347,8 +5347,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
> return;
>
> if (intel_crtc->config->has_pch_encoder)
> - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> - false);
> + intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
>
> intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
>
> @@ -5433,8 +5432,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
> intel_wait_for_vblank(dev_priv, pipe);
> intel_wait_for_vblank(dev_priv, pipe);
> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> - true);
> + intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
> }
>
> /* If we change the relative order between pipe/planes enabling, we need
> @@ -5531,8 +5529,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
> enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
>
> if (intel_crtc->config->has_pch_encoder)
> - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> - false);
> + intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
>
> intel_encoders_disable(crtc, old_crtc_state, old_state);
>
> @@ -5560,8 +5557,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
> intel_encoders_post_disable(crtc, old_crtc_state, old_state);
>
> if (old_crtc_state->has_pch_encoder)
> - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> - true);
> + intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
> }
>
> static void i9xx_pfit_enable(struct intel_crtc *crtc)
> --
> 2.14.0.rc0.284.gd933b75aa4-goog
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
@ 2017-07-20 8:27 ` Daniel Vetter
0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2017-07-20 8:27 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: intel-gfx, Linux Kernel Mailing List, dri-devel, Grant Grundler,
Daniel Vetter
On Wed, Jul 19, 2017 at 10:39:28AM -0700, Matthias Kaehlcke wrote:
> Commit a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
> transcoders") misses some pieces, due to a problem with the patch
> format, this patch adds the remaining bits.
>
> Fixes: a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
> transcoders")
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Applied, and this time successfully it seems!
Thanks a lot, and sorry for the slight ordeal, I still have no clear idea
what happened with your v2 patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 12 ++++--------
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a89d0fd1c2e1..5c7054c3be0e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5347,8 +5347,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
> return;
>
> if (intel_crtc->config->has_pch_encoder)
> - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> - false);
> + intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
>
> intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
>
> @@ -5433,8 +5432,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
> intel_wait_for_vblank(dev_priv, pipe);
> intel_wait_for_vblank(dev_priv, pipe);
> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> - true);
> + intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
> }
>
> /* If we change the relative order between pipe/planes enabling, we need
> @@ -5531,8 +5529,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
> enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
>
> if (intel_crtc->config->has_pch_encoder)
> - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> - false);
> + intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
>
> intel_encoders_disable(crtc, old_crtc_state, old_state);
>
> @@ -5560,8 +5557,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
> intel_encoders_post_disable(crtc, old_crtc_state, old_state);
>
> if (old_crtc_state->has_pch_encoder)
> - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> - true);
> + intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
> }
>
> static void i9xx_pfit_enable(struct intel_crtc *crtc)
> --
> 2.14.0.rc0.284.gd933b75aa4-goog
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
2017-07-20 8:27 ` Daniel Vetter
@ 2017-07-20 16:46 ` Matthias Kaehlcke
-1 siblings, 0 replies; 7+ messages in thread
From: Matthias Kaehlcke @ 2017-07-20 16:46 UTC (permalink / raw)
To: Matthias Kaehlcke, Jani Nikula, David Airlie, Daniel Vetter,
intel-gfx, dri-devel, Linux Kernel Mailing List,
Stéphane Marchesin, Grant Grundler
Cc: Daniel Vetter
On Thu, Jul 20, 2017 at 1:27 AM, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Wed, Jul 19, 2017 at 10:39:28AM -0700, Matthias Kaehlcke wrote:
>> Commit a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
>> transcoders") misses some pieces, due to a problem with the patch
>> format, this patch adds the remaining bits.
>>
>> Fixes: a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
>> transcoders")
>>
>> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
>
> Applied, and this time successfully it seems!
Great, thanks!
> Thanks a lot, and sorry for the slight ordeal, I still have no clear idea
> what happened with your v2 patch.
Me neither, supposing that 'git send-email' works correctly I guess
that I somehow deleted the '@' in the editor session opened by 'git
send-email' ...
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
@ 2017-07-20 16:46 ` Matthias Kaehlcke
0 siblings, 0 replies; 7+ messages in thread
From: Matthias Kaehlcke @ 2017-07-20 16:46 UTC (permalink / raw)
To: Matthias Kaehlcke, Jani Nikula, David Airlie, Daniel Vetter,
intel-gfx, dri-devel, Linux Kernel Mailing List,
Stéphane Marchesin, Grant Grundler
On Thu, Jul 20, 2017 at 1:27 AM, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Wed, Jul 19, 2017 at 10:39:28AM -0700, Matthias Kaehlcke wrote:
>> Commit a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
>> transcoders") misses some pieces, due to a problem with the patch
>> format, this patch adds the remaining bits.
>>
>> Fixes: a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
>> transcoders")
>>
>> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
>
> Applied, and this time successfully it seems!
Great, thanks!
> Thanks a lot, and sorry for the slight ordeal, I still have no clear idea
> what happened with your v2 patch.
Me neither, supposing that 'git send-email' works correctly I guess
that I somehow deleted the '@' in the editor session opened by 'git
send-email' ...
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-07-20 16:46 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-07-19 17:39 [PATCH] drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting() Matthias Kaehlcke
2017-07-19 17:39 ` Matthias Kaehlcke
2017-07-19 17:57 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-07-20 8:27 ` [PATCH] " Daniel Vetter
2017-07-20 8:27 ` Daniel Vetter
2017-07-20 16:46 ` Matthias Kaehlcke
2017-07-20 16:46 ` Matthias Kaehlcke
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