* [PATCH 0/4] dts: rskrza1: Add pin configurations
@ 2017-07-20 18:20 ` Chris Brandt
0 siblings, 0 replies; 9+ messages in thread
From: Chris Brandt @ 2017-07-20 18:20 UTC (permalink / raw)
To: Simon Horman, Geert Uytterhoeven, Rob Herring, Mark Rutland
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA, Chris Brandt
Now that the RZ/A1 pin control driver has appeared in 4.13-rc1, it
is safe to now add pin configurations for RZ/A1 boards.
Chris Brandt (4):
arm: dts: rskrza1: Add SCIF2 pin group
arm: dts: rskrza1: Add Ethernet pin group
arm: dts: rskrza1: Add SDHI1 pin group
arm: dts: rskrza1: Add LED0 pin support
arch/arm/boot/dts/r7s72100-rskrza1.dts | 61 ++++++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
--
2.13.0
--
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 0/4] dts: rskrza1: Add pin configurations
@ 2017-07-20 18:20 ` Chris Brandt
0 siblings, 0 replies; 9+ messages in thread
From: Chris Brandt @ 2017-07-20 18:20 UTC (permalink / raw)
To: Simon Horman, Geert Uytterhoeven, Rob Herring, Mark Rutland
Cc: devicetree, linux-renesas-soc, Chris Brandt
Now that the RZ/A1 pin control driver has appeared in 4.13-rc1, it
is safe to now add pin configurations for RZ/A1 boards.
Chris Brandt (4):
arm: dts: rskrza1: Add SCIF2 pin group
arm: dts: rskrza1: Add Ethernet pin group
arm: dts: rskrza1: Add SDHI1 pin group
arm: dts: rskrza1: Add LED0 pin support
arch/arm/boot/dts/r7s72100-rskrza1.dts | 61 ++++++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
--
2.13.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/4] arm: dts: rskrza1: Add SCIF2 pin group
2017-07-20 18:20 ` Chris Brandt
(?)
@ 2017-07-20 18:20 ` Chris Brandt
-1 siblings, 0 replies; 9+ messages in thread
From: Chris Brandt @ 2017-07-20 18:20 UTC (permalink / raw)
To: Simon Horman, Geert Uytterhoeven, Rob Herring, Mark Rutland
Cc: devicetree, linux-renesas-soc, Chris Brandt
Add pin configuration for SCIF2 serial console interface.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
arch/arm/boot/dts/r7s72100-rskrza1.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index 72df20a04320..5fac0f82d742 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -10,6 +10,7 @@
/dts-v1/;
#include "r7s72100.dtsi"
+#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
/ {
model = "RSKRZA1";
@@ -47,6 +48,15 @@
clock-frequency = <32768>;
};
+&pinctrl {
+
+ /* Serial Console */
+ scif2_pins: serial2 {
+ pinmux = <RZA1_PINMUX(3, 0, 6)>, /* TxD2 */
+ <RZA1_PINMUX(3, 2, 4)>; /* RxD2 */
+ };
+};
+
&mtu2 {
status = "okay";
};
@@ -78,5 +88,7 @@
};
&scif2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&scif2_pins>;
status = "okay";
};
--
2.13.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/4] arm: dts: rskrza1: Add Ethernet pin group
2017-07-20 18:20 ` Chris Brandt
(?)
(?)
@ 2017-07-20 18:20 ` Chris Brandt
-1 siblings, 0 replies; 9+ messages in thread
From: Chris Brandt @ 2017-07-20 18:20 UTC (permalink / raw)
To: Simon Horman, Geert Uytterhoeven, Rob Herring, Mark Rutland
Cc: devicetree, linux-renesas-soc, Chris Brandt
Add pin configuration for Ethernet.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
arch/arm/boot/dts/r7s72100-rskrza1.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index 5fac0f82d742..cedf887e809a 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -55,6 +55,29 @@
pinmux = <RZA1_PINMUX(3, 0, 6)>, /* TxD2 */
<RZA1_PINMUX(3, 2, 4)>; /* RxD2 */
};
+
+ /* Ethernet */
+ ether_pins: ether {
+ /* Ethernet on Ports 1,2,3,5 */
+ pinmux = <RZA1_PINMUX(1, 14, 4)>, /* ET_COL */
+ <RZA1_PINMUX(5, 9, 2)>, /* ET_MDC */
+ <RZA1_PINMUX(3, 3, 2)>, /* ET_MDIO */
+ <RZA1_PINMUX(3, 4, 2)>, /* ET_RXCLK */
+ <RZA1_PINMUX(3, 5, 2)>, /* ET_RXER */
+ <RZA1_PINMUX(3, 6, 2)>, /* ET_RXDV */
+ <RZA1_PINMUX(2, 0, 2)>, /* ET_TXCLK */
+ <RZA1_PINMUX(2, 1, 2)>, /* ET_TXER */
+ <RZA1_PINMUX(2, 2, 2)>, /* ET_TXEN */
+ <RZA1_PINMUX(2, 3, 2)>, /* ET_CRS */
+ <RZA1_PINMUX(2, 4, 2)>, /* ET_TXD0 */
+ <RZA1_PINMUX(2, 5, 2)>, /* ET_TXD1 */
+ <RZA1_PINMUX(2, 6, 2)>, /* ET_TXD2 */
+ <RZA1_PINMUX(2, 7, 2)>, /* ET_TXD3 */
+ <RZA1_PINMUX(2, 8, 2)>, /* ET_RXD0 */
+ <RZA1_PINMUX(2, 9, 2)>, /* ET_RXD1 */
+ <RZA1_PINMUX(2, 10, 2)>, /* ET_RXD2 */
+ <RZA1_PINMUX(2, 11, 2)>; /* ET_RXD3 */
+ };
};
&mtu2 {
@@ -62,6 +85,8 @@
};
ðer {
+ pinctrl-names = "default";
+ pinctrl-0 = <ðer_pins>;
status = "okay";
renesas,no-ether-link;
phy-handle = <&phy0>;
--
2.13.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/4] arm: dts: rskrza1: Add SDHI1 pin group
2017-07-20 18:20 ` Chris Brandt
@ 2017-07-20 18:20 ` Chris Brandt
-1 siblings, 0 replies; 9+ messages in thread
From: Chris Brandt @ 2017-07-20 18:20 UTC (permalink / raw)
To: Simon Horman, Geert Uytterhoeven, Rob Herring, Mark Rutland
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA, Chris Brandt
Add pin configuration for SDHI ch1.
Signed-off-by: Chris Brandt <chris.brandt-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/boot/dts/r7s72100-rskrza1.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index cedf887e809a..f8285b951140 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -78,6 +78,18 @@
<RZA1_PINMUX(2, 10, 2)>, /* ET_RXD2 */
<RZA1_PINMUX(2, 11, 2)>; /* ET_RXD3 */
};
+
+ /* SDHI ch1 on CN1 */
+ sdhi1_pins: sdhi1 {
+ pinmux = <RZA1_PINMUX(3, 8, 7)>, /* SD_CD_1 */
+ <RZA1_PINMUX(3, 9, 7)>, /* SD_WP_1 */
+ <RZA1_PINMUX(3, 10, 7)>, /* SD_D1_1 */
+ <RZA1_PINMUX(3, 11, 7)>, /* SD_D0_1 */
+ <RZA1_PINMUX(3, 12, 7)>, /* SD_CLK_1 */
+ <RZA1_PINMUX(3, 13, 7)>, /* SD_CMD_1 */
+ <RZA1_PINMUX(3, 14, 7)>, /* SD_D3_1 */
+ <RZA1_PINMUX(3, 15, 7)>; /* SD_D2_1 */
+ };
};
&mtu2 {
@@ -96,6 +108,8 @@
};
&sdhi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhi1_pins>;
bus-width = <4>;
status = "okay";
};
--
2.13.0
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/4] arm: dts: rskrza1: Add SDHI1 pin group
@ 2017-07-20 18:20 ` Chris Brandt
0 siblings, 0 replies; 9+ messages in thread
From: Chris Brandt @ 2017-07-20 18:20 UTC (permalink / raw)
To: Simon Horman, Geert Uytterhoeven, Rob Herring, Mark Rutland
Cc: devicetree, linux-renesas-soc, Chris Brandt
Add pin configuration for SDHI ch1.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
arch/arm/boot/dts/r7s72100-rskrza1.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index cedf887e809a..f8285b951140 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -78,6 +78,18 @@
<RZA1_PINMUX(2, 10, 2)>, /* ET_RXD2 */
<RZA1_PINMUX(2, 11, 2)>; /* ET_RXD3 */
};
+
+ /* SDHI ch1 on CN1 */
+ sdhi1_pins: sdhi1 {
+ pinmux = <RZA1_PINMUX(3, 8, 7)>, /* SD_CD_1 */
+ <RZA1_PINMUX(3, 9, 7)>, /* SD_WP_1 */
+ <RZA1_PINMUX(3, 10, 7)>, /* SD_D1_1 */
+ <RZA1_PINMUX(3, 11, 7)>, /* SD_D0_1 */
+ <RZA1_PINMUX(3, 12, 7)>, /* SD_CLK_1 */
+ <RZA1_PINMUX(3, 13, 7)>, /* SD_CMD_1 */
+ <RZA1_PINMUX(3, 14, 7)>, /* SD_D3_1 */
+ <RZA1_PINMUX(3, 15, 7)>; /* SD_D2_1 */
+ };
};
&mtu2 {
@@ -96,6 +108,8 @@
};
&sdhi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhi1_pins>;
bus-width = <4>;
status = "okay";
};
--
2.13.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/4] arm: dts: rskrza1: Add LED0 pin support
2017-07-20 18:20 ` Chris Brandt
` (2 preceding siblings ...)
(?)
@ 2017-07-20 18:20 ` Chris Brandt
-1 siblings, 0 replies; 9+ messages in thread
From: Chris Brandt @ 2017-07-20 18:20 UTC (permalink / raw)
To: Simon Horman, Geert Uytterhoeven, Rob Herring, Mark Rutland
Cc: devicetree, linux-renesas-soc, Chris Brandt
Add pin configuration for LED0 which is connected to a GPIO.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
arch/arm/boot/dts/r7s72100-rskrza1.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index f8285b951140..5dcaaf131d27 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -10,6 +10,7 @@
/dts-v1/;
#include "r7s72100.dtsi"
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
/ {
@@ -34,6 +35,15 @@
#address-cells = <1>;
#size-cells = <1>;
};
+
+ leds {
+ status = "okay";
+ compatible = "gpio-leds";
+
+ led0 {
+ gpios = <&port7 1 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&extal_clk {
--
2.13.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 0/4] dts: rskrza1: Add pin configurations
2017-07-20 18:20 ` Chris Brandt
@ 2017-07-27 15:03 ` Simon Horman
-1 siblings, 0 replies; 9+ messages in thread
From: Simon Horman @ 2017-07-27 15:03 UTC (permalink / raw)
To: Chris Brandt
Cc: Geert Uytterhoeven, Rob Herring, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA
On Thu, Jul 20, 2017 at 01:20:15PM -0500, Chris Brandt wrote:
> Now that the RZ/A1 pin control driver has appeared in 4.13-rc1, it
> is safe to now add pin configurations for RZ/A1 boards.
>
>
> Chris Brandt (4):
> arm: dts: rskrza1: Add SCIF2 pin group
> arm: dts: rskrza1: Add Ethernet pin group
> arm: dts: rskrza1: Add SDHI1 pin group
> arm: dts: rskrza1: Add LED0 pin support
>
> arch/arm/boot/dts/r7s72100-rskrza1.dts | 61 ++++++++++++++++++++++++++++++++++
Thanks, applied for v4.14.
--
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/4] dts: rskrza1: Add pin configurations
@ 2017-07-27 15:03 ` Simon Horman
0 siblings, 0 replies; 9+ messages in thread
From: Simon Horman @ 2017-07-27 15:03 UTC (permalink / raw)
To: Chris Brandt
Cc: Geert Uytterhoeven, Rob Herring, Mark Rutland, devicetree,
linux-renesas-soc
On Thu, Jul 20, 2017 at 01:20:15PM -0500, Chris Brandt wrote:
> Now that the RZ/A1 pin control driver has appeared in 4.13-rc1, it
> is safe to now add pin configurations for RZ/A1 boards.
>
>
> Chris Brandt (4):
> arm: dts: rskrza1: Add SCIF2 pin group
> arm: dts: rskrza1: Add Ethernet pin group
> arm: dts: rskrza1: Add SDHI1 pin group
> arm: dts: rskrza1: Add LED0 pin support
>
> arch/arm/boot/dts/r7s72100-rskrza1.dts | 61 ++++++++++++++++++++++++++++++++++
Thanks, applied for v4.14.
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2017-07-27 15:04 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-07-20 18:20 [PATCH 0/4] dts: rskrza1: Add pin configurations Chris Brandt
2017-07-20 18:20 ` Chris Brandt
2017-07-20 18:20 ` [PATCH 1/4] arm: dts: rskrza1: Add SCIF2 pin group Chris Brandt
2017-07-20 18:20 ` [PATCH 2/4] arm: dts: rskrza1: Add Ethernet " Chris Brandt
2017-07-20 18:20 ` [PATCH 4/4] arm: dts: rskrza1: Add LED0 pin support Chris Brandt
[not found] ` <20170720182019.85075-1-chris.brandt-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
2017-07-20 18:20 ` [PATCH 3/4] arm: dts: rskrza1: Add SDHI1 pin group Chris Brandt
2017-07-20 18:20 ` Chris Brandt
2017-07-27 15:03 ` [PATCH 0/4] dts: rskrza1: Add pin configurations Simon Horman
2017-07-27 15:03 ` Simon Horman
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