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* [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board.
@ 2017-07-31  6:57 Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 1/6] ARM: at91: spl: Adjust switching to oscillator for SAMA5D2 Wenyou Yang
                   ` (6 more replies)
  0 siblings, 7 replies; 9+ messages in thread
From: Wenyou Yang @ 2017-07-31  6:57 UTC (permalink / raw)
  To: u-boot

The SAMA5D27-SOM1-EK board embeds a SAMA5D27 SOM1 module, which includes
a SAMA5D27-SiP chip and QSPI flash, Phy and MAC EEPROM. The SAMA5D27 SiP
integrates the SAMA5D2 with 1Gbit DDR2-SDRAM in a single package.
It is based on
	1./ [PATCH v2 0/8] sf: improve support of (Q)SPI flash memories
	https://lists.denx.de/pipermail/u-boot/2017-July/298806.html
	2./ [PATCH v2 0/3] board: atmel: Set the ethernet mac address from eeprom
	https://lists.denx.de/pipermail/u-boot/2017-July/300527.html
	3./ [PATCH 0/7] board: atmel: Convert to support DM_VIDEO
	https://lists.denx.de/pipermail/u-boot/2017-July/300533.html

Changes in v2:
 - Add the reviewed-by tag.
 - Add the help in Kconfig to describe the board and peripherals.
 - Add the code to display the company's logo and board information.
 - Replace the code to set the ethernet mac address with the common
   code from the board/atmel/common folder.

Wenyou Yang (6):
  ARM: at91: spl: Adjust switching to oscillator for SAMA5D2
  ARM: at91: spl: Add mck function to lower rate while switching
  ARM: at91: spl: Add boot device for boot from QSPI
  ARM: at91: mach: Add missing defines of MPDDRC
  ARM: at91: Get the Chip ID of SAMA5D2 SiP
  board: atmel: Add SAMA5D27 SOM1 EK board

 arch/arm/dts/Makefile                           |   3 +
 arch/arm/dts/at91-sama5d27_som1_ek.dts          | 215 ++++++++++++++++++++++++
 arch/arm/dts/sama5d2.dtsi                       |  20 +++
 arch/arm/dts/sama5d27_som1.dtsi                 | 159 ++++++++++++++++++
 arch/arm/mach-at91/Kconfig                      |  14 ++
 arch/arm/mach-at91/armv7/clock.c                |  36 ++++
 arch/arm/mach-at91/armv7/sama5d2_devices.c      |  26 ++-
 arch/arm/mach-at91/include/mach/at91_common.h   |   1 +
 arch/arm/mach-at91/include/mach/at91_pmc.h      |   2 +
 arch/arm/mach-at91/include/mach/atmel_mpddrc.h  |   4 +
 arch/arm/mach-at91/include/mach/sama5d2.h       |   7 +-
 arch/arm/mach-at91/spl.c                        |   2 +
 arch/arm/mach-at91/spl_atmel.c                  |  18 +-
 board/atmel/sama5d27_som1_ek/Kconfig            |  15 ++
 board/atmel/sama5d27_som1_ek/MAINTAINERS        |   6 +
 board/atmel/sama5d27_som1_ek/Makefile           |   8 +
 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 189 +++++++++++++++++++++
 configs/sama5d27_som1_ek_mmc_defconfig          |  86 ++++++++++
 configs/sama5d27_som1_ek_spiflash_defconfig     |  86 ++++++++++
 include/configs/sama5d27_som1_ek.h              |  95 +++++++++++
 20 files changed, 988 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/at91-sama5d27_som1_ek.dts
 create mode 100644 arch/arm/dts/sama5d27_som1.dtsi
 create mode 100644 board/atmel/sama5d27_som1_ek/Kconfig
 create mode 100644 board/atmel/sama5d27_som1_ek/MAINTAINERS
 create mode 100644 board/atmel/sama5d27_som1_ek/Makefile
 create mode 100644 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
 create mode 100644 configs/sama5d27_som1_ek_mmc_defconfig
 create mode 100644 configs/sama5d27_som1_ek_spiflash_defconfig
 create mode 100644 include/configs/sama5d27_som1_ek.h

-- 
2.13.0

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [U-Boot] [PATCH v2 1/6] ARM: at91: spl: Adjust switching to oscillator for SAMA5D2
  2017-07-31  6:57 [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Wenyou Yang
@ 2017-07-31  6:57 ` Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 2/6] ARM: at91: spl: Add mck function to lower rate while switching Wenyou Yang
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 9+ messages in thread
From: Wenyou Yang @ 2017-07-31  6:57 UTC (permalink / raw)
  To: u-boot

As said in 29.5.7 section of SAMA5D2 datasheet, before switching to
the crystal oscillator, a check must be carried out to ensure that
the oscillator is present and that its freqency is valid.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 arch/arm/mach-at91/include/mach/at91_pmc.h |  2 ++
 arch/arm/mach-at91/spl_atmel.c             | 18 +++++++++++++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 2875ff20b1..08ad1bf2d0 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -87,6 +87,8 @@ typedef struct at91_pmc {
 
 #define AT91_PMC_MCFR_MAINRDY		0x00010000
 #define AT91_PMC_MCFR_MAINF_MASK	0x0000FFFF
+#define AT91_PMC_MCFR_RCMEAS		0x00100000
+#define AT91_PMC_MCFR_CCSS_XTAL_OSC	0x01000000
 
 #define AT91_PMC_MCKR_CSS_SLOW		0x00000000
 #define AT91_PMC_MCKR_CSS_MAIN		0x00000001
diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
index b75c2ccefd..ce16ef3bdb 100644
--- a/arch/arm/mach-at91/spl_atmel.c
+++ b/arch/arm/mach-at91/spl_atmel.c
@@ -32,6 +32,20 @@ static void switch_to_main_crystal_osc(void)
 	while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
 		;
 
+#if defined(CONFIG_SAMA5D2)
+	/* Enable a measurement of the external oscillator */
+	tmp = readl(&pmc->mcfr);
+	tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC;
+	tmp |= AT91_PMC_MCFR_RCMEAS;
+	writel(tmp, &pmc->mcfr);
+
+	while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY))
+		;
+
+	if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK))
+		hang();
+#endif
+
 	tmp = readl(&pmc->mor);
 	tmp &= ~AT91_PMC_MOR_OSCBYPASS;
 	tmp &= ~AT91_PMC_MOR_KEY(0xff);
@@ -47,11 +61,13 @@ static void switch_to_main_crystal_osc(void)
 	while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
 		;
 
+#if !defined(CONFIG_SAMA5D2)
 	/* Wait until MAINRDY field is set to make sure main clock is stable */
 	while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))
 		;
+#endif
 
-#ifndef CONFIG_SAMA5D4
+#if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2)
 	tmp = readl(&pmc->mor);
 	tmp &= ~AT91_PMC_MOR_MOSCRCEN;
 	tmp &= ~AT91_PMC_MOR_KEY(0xff);
-- 
2.13.0

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [U-Boot] [PATCH v2 2/6] ARM: at91: spl: Add mck function to lower rate while switching
  2017-07-31  6:57 [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 1/6] ARM: at91: spl: Adjust switching to oscillator for SAMA5D2 Wenyou Yang
@ 2017-07-31  6:57 ` Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 3/6] ARM: at91: spl: Add boot device for boot from QSPI Wenyou Yang
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 9+ messages in thread
From: Wenyou Yang @ 2017-07-31  6:57 UTC (permalink / raw)
  To: u-boot

Refer to the commit 70f8c8316ad(PMC: add new mck function to lower
rate while switching) from AT91Bootstrap.

While switching to a lower clock source, we must switch the clock
source first instead of last. Otherwise, we could end up with
too high frequency on internal bus and peripherals.
This happen on SAMA5D2 as we exit from ROM code @396MHz.

Add a function pmc_mck_init_down() to allow this sequence.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
---

Changes in v2: None

 arch/arm/mach-at91/armv7/clock.c              | 36 +++++++++++++++++++++++++++
 arch/arm/mach-at91/include/mach/at91_common.h |  1 +
 2 files changed, 37 insertions(+)

diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index 2e55953799..8ae01f4020 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -150,6 +150,42 @@ void at91_mck_init(u32 mckr)
 		;
 }
 
+void at91_mck_init_down(u32 mckr)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	u32 tmp;
+
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_CSS_MASK);
+	tmp |= (mckr & AT91_PMC_MCKR_CSS_MASK);
+	writel(tmp, &pmc->mckr);
+
+	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
+		;
+
+#ifdef CPU_HAS_H32MXDIV
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_H32MXDIV);
+	tmp |= (mckr & AT91_PMC_MCKR_H32MXDIV);
+	writel(tmp, &pmc->mckr);
+#endif
+
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_PLLADIV_MASK);
+	tmp |= (mckr & AT91_PMC_MCKR_PLLADIV_MASK);
+	writel(tmp, &pmc->mckr);
+
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_MDIV_MASK);
+	tmp |= (mckr & AT91_PMC_MCKR_MDIV_MASK);
+	writel(tmp, &pmc->mckr);
+
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_PRES_MASK);
+	tmp |= (mckr & AT91_PMC_MCKR_PRES_MASK);
+	writel(tmp, &pmc->mckr);
+}
+
 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
diff --git a/arch/arm/mach-at91/include/mach/at91_common.h b/arch/arm/mach-at91/include/mach/at91_common.h
index 5416eb455d..0b09ce7b2e 100644
--- a/arch/arm/mach-at91/include/mach/at91_common.h
+++ b/arch/arm/mach-at91/include/mach/at91_common.h
@@ -25,6 +25,7 @@ void at91_lcd_hw_init(void);
 void at91_plla_init(u32 pllar);
 void at91_pllb_init(u32 pllar);
 void at91_mck_init(u32 mckr);
+void at91_mck_init_down(u32 mckr);
 void at91_pmc_init(void);
 void mem_init(void);
 void at91_phy_reset(void);
-- 
2.13.0

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [U-Boot] [PATCH v2 3/6] ARM: at91: spl: Add boot device for boot from QSPI
  2017-07-31  6:57 [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 1/6] ARM: at91: spl: Adjust switching to oscillator for SAMA5D2 Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 2/6] ARM: at91: spl: Add mck function to lower rate while switching Wenyou Yang
@ 2017-07-31  6:57 ` Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 4/6] ARM: at91: mach: Add missing defines of MPDDRC Wenyou Yang
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 9+ messages in thread
From: Wenyou Yang @ 2017-07-31  6:57 UTC (permalink / raw)
  To: u-boot

Add the boot device for booting from the QSPI flash.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 arch/arm/mach-at91/spl.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c
index e113336b7b..98337aebbe 100644
--- a/arch/arm/mach-at91/spl.c
+++ b/arch/arm/mach-at91/spl.c
@@ -56,6 +56,8 @@ u32 spl_boot_device(void)
 	if (dev == ATMEL_SAMA5_BOOT_FROM_SPI)
 		return BOOT_DEVICE_SPI;
 #endif
+	if (dev == ATMEL_SAMA5_BOOT_FROM_QSPI)
+		return BOOT_DEVICE_SPI;
 
 	if (dev == ATMEL_SAMA5_BOOT_FROM_SMC)
 		return BOOT_DEVICE_NAND;
-- 
2.13.0

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [U-Boot] [PATCH v2 4/6] ARM: at91: mach: Add missing defines of MPDDRC
  2017-07-31  6:57 [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Wenyou Yang
                   ` (2 preceding siblings ...)
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 3/6] ARM: at91: spl: Add boot device for boot from QSPI Wenyou Yang
@ 2017-07-31  6:57 ` Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 5/6] ARM: at91: Get the Chip ID of SAMA5D2 SiP Wenyou Yang
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 9+ messages in thread
From: Wenyou Yang @ 2017-07-31  6:57 UTC (permalink / raw)
  To: u-boot

Add missing defines of Multiport DDR-SDRAM Controller (MPDDRC).

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 arch/arm/mach-at91/include/mach/atmel_mpddrc.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h
index 803501f5cf..40e1cf0a0a 100644
--- a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h
+++ b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h
@@ -96,6 +96,10 @@ int ddr3_init(const unsigned int base,
 #define ATMEL_MPDDRC_CR_DLL_RESET_ENABLED	(0x1 << 7)
 #define ATMEL_MPDDRC_CR_DIC_DS			(0x1 << 8)
 #define ATMEL_MPDDRC_CR_DIS_DLL			(0x1 << 9)
+#define ATMEL_MPDDRC_CR_ZQ_INIT			(0x0 << 10)
+#define ATMEL_MPDDRC_CR_ZQ_LONG			(0x1 << 10)
+#define ATMEL_MPDDRC_CR_ZQ_SHORT		(0x2 << 10)
+#define ATMEL_MPDDRC_CR_ZQ_RESET		(0x3 << 10)
 #define ATMEL_MPDDRC_CR_OCD_DEFAULT		(0x7 << 12)
 #define ATMEL_MPDDRC_CR_DQMS_SHARED		(0x1 << 16)
 #define ATMEL_MPDDRC_CR_ENRDM_ON		(0x1 << 17)
-- 
2.13.0

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [U-Boot] [PATCH v2 5/6] ARM: at91: Get the Chip ID of SAMA5D2 SiP
  2017-07-31  6:57 [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Wenyou Yang
                   ` (3 preceding siblings ...)
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 4/6] ARM: at91: mach: Add missing defines of MPDDRC Wenyou Yang
@ 2017-07-31  6:57 ` Wenyou Yang
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 6/6] board: atmel: Add SAMA5D27 SOM1 EK board Wenyou Yang
  2017-08-25  1:15 ` [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Yang, Wenyou
  6 siblings, 0 replies; 9+ messages in thread
From: Wenyou Yang @ 2017-07-31  6:57 UTC (permalink / raw)
  To: u-boot

From: Wenyou Yang <wenyou.yang@atmel.com>

The SAMA5D2 SiP(System in Package) has different Chip IDs in the
CHIPID and CHIP_EXID registers.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 arch/arm/mach-at91/armv7/sama5d2_devices.c | 26 ++++++++++++++++++++++++--
 arch/arm/mach-at91/include/mach/sama5d2.h  |  7 ++++++-
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/armv7/sama5d2_devices.c b/arch/arm/mach-at91/armv7/sama5d2_devices.c
index 978eac29bd..de1d9b5bfb 100644
--- a/arch/arm/mach-at91/armv7/sama5d2_devices.c
+++ b/arch/arm/mach-at91/armv7/sama5d2_devices.c
@@ -10,11 +10,20 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/sama5d2.h>
 
-char *get_cpu_name()
+int cpu_is_sama5d2(void)
 {
+	unsigned int chip_id = get_chip_id();
+
+	return ((chip_id == ARCH_ID_SAMA5D2) ||
+		(chip_id == ARCH_ID_SAMA5D2_SIP)) ? 1 : 0;
+}
+
+char *get_cpu_name(void)
+{
+	unsigned int chip_id = get_chip_id();
 	unsigned int extension_id = get_extension_chip_id();
 
-	if (cpu_is_sama5d2()) {
+	if (chip_id == ARCH_ID_SAMA5D2) {
 		switch (extension_id) {
 		case ARCH_EXID_SAMA5D21CU:
 			return "SAMA5D21";
@@ -41,6 +50,19 @@ char *get_cpu_name()
 		}
 	}
 
+	if ((chip_id == ARCH_ID_SAMA5D2) || (chip_id == ARCH_ID_SAMA5D2_SIP)) {
+		switch (extension_id) {
+		case ARCH_EXID_SAMA5D225C_D1M:
+			return "SAMA5D225 128M bits DDR2 SDRAM";
+		case ARCH_EXID_SAMA5D27C_D5M:
+			return "SAMA5D27 512M bits DDR2 SDRAM";
+		case ARCH_EXID_SAMA5D27C_D1G:
+			return "SAMA5D27 1G bits DDR2 SDRAM";
+		case ARCH_EXID_SAMA5D28C_D1G:
+			return "SAMA5D28 1G bits DDR2 SDRAM";
+		}
+	}
+
 	return "Unknown CPU type";
 }
 
diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h
index 25c85411e5..49283ed86b 100644
--- a/arch/arm/mach-at91/include/mach/sama5d2.h
+++ b/arch/arm/mach-at91/include/mach/sama5d2.h
@@ -222,7 +222,11 @@
 #define ARCH_EXID_SAMA5D28CU	0x00000010
 #define ARCH_EXID_SAMA5D28CN	0x00000020
 
-#define cpu_is_sama5d2()	(get_chip_id() == ARCH_ID_SAMA5D2)
+#define ARCH_ID_SAMA5D2_SIP		0x8a5c08c2
+#define ARCH_EXID_SAMA5D225C_D1M	0x00000053
+#define ARCH_EXID_SAMA5D27C_D5M		0x00000032
+#define ARCH_EXID_SAMA5D27C_D1G		0x00000033
+#define ARCH_EXID_SAMA5D28C_D1G		0x00000013
 
 /* PIT Timer(PIT_PIIR) */
 #define CONFIG_SYS_TIMER_COUNTER	0xf804803c
@@ -233,6 +237,7 @@
 #ifndef __ASSEMBLY__
 unsigned int get_chip_id(void);
 unsigned int get_extension_chip_id(void);
+int cpu_is_sama5d2(void);
 unsigned int has_lcdc(void);
 char *get_cpu_name(void);
 #endif
-- 
2.13.0

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [U-Boot] [PATCH v2 6/6] board: atmel: Add SAMA5D27 SOM1 EK board
  2017-07-31  6:57 [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Wenyou Yang
                   ` (4 preceding siblings ...)
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 5/6] ARM: at91: Get the Chip ID of SAMA5D2 SiP Wenyou Yang
@ 2017-07-31  6:57 ` Wenyou Yang
  2017-08-25  1:15 ` [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Yang, Wenyou
  6 siblings, 0 replies; 9+ messages in thread
From: Wenyou Yang @ 2017-07-31  6:57 UTC (permalink / raw)
  To: u-boot

From: Wenyou Yang <wenyou.yang@atmel.com>

The SAMA5D27-SiP (System in Package) integrates the SAMA5D2
with 1Gbit DDR2-SDRAM in a single package.

The SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and
Mac-address EEPROM.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
---

Changes in v2:
 - Add the reviewed-by tag.
 - Add the help in Kconfig to describe the board and peripherals.
 - Add the code to display the company's logo and board information.
 - Replace the code to set the ethernet mac address with the common
   code from the board/atmel/common folder.

 arch/arm/dts/Makefile                           |   3 +
 arch/arm/dts/at91-sama5d27_som1_ek.dts          | 215 ++++++++++++++++++++++++
 arch/arm/dts/sama5d2.dtsi                       |  20 +++
 arch/arm/dts/sama5d27_som1.dtsi                 | 159 ++++++++++++++++++
 arch/arm/mach-at91/Kconfig                      |  14 ++
 board/atmel/sama5d27_som1_ek/Kconfig            |  15 ++
 board/atmel/sama5d27_som1_ek/MAINTAINERS        |   6 +
 board/atmel/sama5d27_som1_ek/Makefile           |   8 +
 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 189 +++++++++++++++++++++
 configs/sama5d27_som1_ek_mmc_defconfig          |  86 ++++++++++
 configs/sama5d27_som1_ek_spiflash_defconfig     |  86 ++++++++++
 include/configs/sama5d27_som1_ek.h              |  95 +++++++++++
 12 files changed, 896 insertions(+)
 create mode 100644 arch/arm/dts/at91-sama5d27_som1_ek.dts
 create mode 100644 arch/arm/dts/sama5d27_som1.dtsi
 create mode 100644 board/atmel/sama5d27_som1_ek/Kconfig
 create mode 100644 board/atmel/sama5d27_som1_ek/MAINTAINERS
 create mode 100644 board/atmel/sama5d27_som1_ek/Makefile
 create mode 100644 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
 create mode 100644 configs/sama5d27_som1_ek_mmc_defconfig
 create mode 100644 configs/sama5d27_som1_ek_spiflash_defconfig
 create mode 100644 include/configs/sama5d27_som1_ek.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 132fa69fe5..0a68663e9f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -404,6 +404,9 @@ dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
 dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
 	at91-sama5d2_xplained.dtb
 
+dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
+	at91-sama5d27_som1_ek.dtb
+
 dtb-$(CONFIG_TARGET_SAMA5D3XEK) += \
 	sama5d31ek.dtb \
 	sama5d33ek.dtb \
diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts
new file mode 100644
index 0000000000..5e62d4af71
--- /dev/null
+++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts
@@ -0,0 +1,215 @@
+/*
+ * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27 SOM1 EK board
+ *
+ *  Copyright (C) 2017 Microchip Corporation
+ *                     Wenyou Yang <wenyou.yang@microchip.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+#include "sama5d27_som1.dtsi"
+
+/ {
+	model = "Atmel SAMA5D27 SOM1 EK";
+	compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5";
+
+	chosen {
+		u-boot,dm-pre-reloc;
+		stdout-path = &uart1;
+	};
+
+	ahb {
+		usb1: ohci at 00400000 {
+			num-ports = <3>;
+			atmel,vbus-gpio = <&pioA 42 0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_usb_default>;
+			status = "okay";
+		};
+
+		usb2: ehci at 00500000 {
+			status = "okay";
+		};
+
+		sdmmc0: sdio-host at a0000000 {
+			bus-width = <8>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
+			status = "okay";
+			u-boot,dm-pre-reloc;
+		};
+
+		sdmmc1: sdio-host at b0000000 {
+			bus-width = <4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
+			status = "okay"; /* conflict with qspi0 */
+			u-boot,dm-pre-reloc;
+		};
+
+		apb {
+			hlcdc: hlcdc at f0000000 {
+				atmel,vl-bpix = <4>;
+				atmel,guard-time = <1>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
+				status = "okay";
+				u-boot,dm-pre-reloc;
+
+				display-timings {
+					u-boot,dm-pre-reloc;
+					480x272 {
+						clock-frequency = <9000000>;
+						hactive = <480>;
+						vactive = <272>;
+						hsync-len = <41>;
+						hfront-porch = <2>;
+						hback-porch = <2>;
+						vfront-porch = <2>;
+						vback-porch = <2>;
+						vsync-len = <11>;
+						u-boot,dm-pre-reloc;
+					};
+				};
+			};
+
+			uart1: serial at f8020000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_uart1_default>;
+				status = "okay";
+				u-boot,dm-pre-reloc;
+			};
+
+			pioA: gpio at fc038000 {
+				pinctrl {
+					pinctrl_lcd_base: pinctrl_lcd_base {
+						pinmux = <PIN_PC5__LCDVSYNC>,
+							 <PIN_PC6__LCDHSYNC>,
+							 <PIN_PC8__LCDDEN>,
+							 <PIN_PC7__LCDPCK>;
+						bias-disable;
+					};
+
+					pinctrl_lcd_pwm: pinctrl_lcd_pwm {
+						pinmux = <PIN_PC3__LCDPWM>;
+						bias-disable;
+					};
+
+					pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
+						pinmux = <PIN_PB13__LCDDAT2>,
+							 <PIN_PB14__LCDDAT3>,
+							 <PIN_PB15__LCDDAT4>,
+							 <PIN_PB16__LCDDAT5>,
+							 <PIN_PB17__LCDDAT6>,
+							 <PIN_PB18__LCDDAT7>,
+							 <PIN_PB21__LCDDAT10>,
+							 <PIN_PB22__LCDDAT11>,
+							 <PIN_PB23__LCDDAT12>,
+							 <PIN_PB24__LCDDAT13>,
+							 <PIN_PB25__LCDDAT14>,
+							 <PIN_PB26__LCDDAT15>,
+							 <PIN_PB29__LCDDAT18>,
+							 <PIN_PB30__LCDDAT19>,
+							 <PIN_PB31__LCDDAT20>,
+							 <PIN_PC0__LCDDAT21>,
+							 <PIN_PC1__LCDDAT22>,
+							 <PIN_PC2__LCDDAT23>;
+						bias-disable;
+					};
+
+					pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
+						pinmux = <PIN_PA1__SDMMC0_CMD>,
+							 <PIN_PA2__SDMMC0_DAT0>,
+							 <PIN_PA3__SDMMC0_DAT1>,
+							 <PIN_PA4__SDMMC0_DAT2>,
+							 <PIN_PA5__SDMMC0_DAT3>,
+							 <PIN_PA6__SDMMC0_DAT4>,
+							 <PIN_PA7__SDMMC0_DAT5>,
+							 <PIN_PA8__SDMMC0_DAT6>,
+							 <PIN_PA9__SDMMC0_DAT7>;
+						bias-pull-up;
+						u-boot,dm-pre-reloc;
+					};
+
+					pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
+						pinmux = <PIN_PA0__SDMMC0_CK>,
+							 <PIN_PA10__SDMMC0_RSTN>,
+							 <PIN_PA13__SDMMC0_CD>;
+						bias-disable;
+						u-boot,dm-pre-reloc;
+					};
+
+					pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
+						pinmux = <PIN_PA28__SDMMC1_CMD>,
+							 <PIN_PA18__SDMMC1_DAT0>,
+							 <PIN_PA19__SDMMC1_DAT1>,
+							 <PIN_PA20__SDMMC1_DAT2>,
+							 <PIN_PA21__SDMMC1_DAT3>;
+						bias-pull-up;
+						u-boot,dm-pre-reloc;
+					};
+
+					pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
+						pinmux = <PIN_PA22__SDMMC1_CK>,
+							 <PIN_PA30__SDMMC1_CD>;
+						bias-disable;
+						u-boot,dm-pre-reloc;
+					};
+
+					pinctrl_uart1_default: uart1_default {
+						pinmux = <PIN_PD2__URXD1>,
+							 <PIN_PD3__UTXD1>;
+						bias-disable;
+						u-boot,dm-pre-reloc;
+					};
+
+					pinctrl_usb_default: usb_default {
+						pinmux = <PIN_PB10__GPIO>;
+						bias-disable;
+					};
+
+					pinctrl_usba_vbus: usba_vbus {
+						pinmux = <PIN_PA31__GPIO>;
+						bias-disable;
+					};
+				};
+			};
+		};
+	};
+};
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index fbaac0834c..b55af6593d 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -511,11 +511,13 @@
 					qspi0_clk: qspi0_clk at 52 {
 						#clock-cells = <0>;
 						reg = <52>;
+						u-boot,dm-pre-reloc;
 					};
 
 					qspi1_clk: qspi1_clk at 53 {
 						#clock-cells = <0>;
 						reg = <53>;
+						u-boot,dm-pre-reloc;
 					};
 				};
 
@@ -602,6 +604,16 @@
 				status = "disabled";
 			};
 
+			qspi1: spi at f0024000 {
+				compatible = "atmel,sama5d2-qspi";
+				reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
+				reg-names = "qspi_base", "qspi_mmap";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&qspi1_clk>;
+				status = "disabled";
+			};
+
 			spi0: spi at f8000000 {
 				compatible = "atmel,at91rm9200-spi";
 				reg = <0xf8000000 0x100>;
@@ -673,6 +685,14 @@
 				status = "disabled";
 			};
 
+			uart3: serial at fc008000 {
+				compatible = "atmel,at91sam9260-usart";
+				reg = <0xfc008000 0x100>;
+				clocks = <&uart3_clk>;
+				clock-names = "usart";
+				status = "disabled";
+			};
+
 			i2c1: i2c at fc028000 {
 				compatible = "atmel,sama5d2-i2c";
 				reg = <0xfc028000 0x100>;
diff --git a/arch/arm/dts/sama5d27_som1.dtsi b/arch/arm/dts/sama5d27_som1.dtsi
new file mode 100644
index 0000000000..0c44a97f64
--- /dev/null
+++ b/arch/arm/dts/sama5d27_som1.dtsi
@@ -0,0 +1,159 @@
+/*
+ * sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SOM1
+ *
+ *  Copyright (C) 2017 Microchip Corporation
+ *                     Wenyou Yang <wenyou.yang@microchip.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sama5d2.dtsi"
+#include "sama5d2-pinfunc.h"
+/ {
+	model = "Atmel SAMA5D27 SOM1 EK";
+	compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5";
+
+	memory {
+		reg = <0x20000000 0x8000000>;
+	};
+
+	aliases {
+		spi0 = &qspi1;
+		u-boot,dm-pre-reloc;
+	};
+
+	ahb {
+		apb {
+			qspi1: spi at f0024000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;
+				status = "okay";
+				u-boot,dm-pre-reloc;
+
+				spi_flash at 0 {
+					compatible = "spi-flash";
+					reg = <0>;
+					spi-max-frequency = <50000000>;
+					spi-rx-bus-width = <4>;
+					spi-tx-bus-width = <4>;
+					u-boot,dm-pre-reloc;
+				};
+			};
+
+			macb0: ethernet at f8008000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
+				phy-mode = "rmii";
+				status = "okay";
+
+				ethernet-phy at 1 {
+					reg = <0x1>;
+				};
+			};
+
+			i2c0: i2c at f8028000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2c0_default>;
+				status = "okay";
+
+				i2c_eeprom: i2c_eeprom at 50 {
+					compatible = "microchip,24aa02e48";
+					reg = <0x50>;
+				};
+			};
+
+			i2c1: i2c at fc028000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2c1_default>;
+				status = "okay";
+			};
+
+			pioA: gpio at fc038000 {
+				pinctrl {
+					pinctrl_i2c0_default: i2c0_default {
+						pinmux = <PIN_PD21__TWD0>,
+							 <PIN_PD22__TWCK0>;
+						bias-disable;
+					};
+
+					pinctrl_i2c1_default: i2c1_default {
+						pinmux = <PIN_PD4__TWD1>,
+							 <PIN_PD5__TWCK1>;
+						bias-disable;
+					};
+
+					pinctrl_macb0_phy_irq: macb0_phy_irq {
+						pinmux = <PIN_PD31__GPIO>;
+						bias-disable;
+					};
+
+					pinctrl_macb0_rmii: macb0_rmii {
+						pinmux = <PIN_PD9__GTXCK>,
+							 <PIN_PD10__GTXEN>,
+							 <PIN_PD11__GRXDV>,
+							 <PIN_PD12__GRXER>,
+							 <PIN_PD13__GRX0>,
+							 <PIN_PD14__GRX1>,
+							 <PIN_PD15__GTX0>,
+							 <PIN_PD16__GTX1>,
+							 <PIN_PD17__GMDC>,
+							 <PIN_PD18__GMDIO>;
+						bias-disable;
+					};
+
+					pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
+						pinmux = <PIN_PB5__QSPI1_SCK>,
+							 <PIN_PB6__QSPI1_CS>;
+						bias-disable;
+						u-boot,dm-pre-reloc;
+					};
+
+					pinctrl_qspi1_dat_default: qspi1_dat_default {
+						pinmux = <PIN_PB7__QSPI1_IO0>,
+							 <PIN_PB8__QSPI1_IO1>,
+							 <PIN_PB9__QSPI1_IO2>,
+							 <PIN_PB10__QSPI1_IO3>;
+						bias-pull-up;
+						u-boot,dm-pre-reloc;
+					};
+				};
+			};
+		};
+	};
+};
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 9f39e210b1..6ae1dca9ab 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -100,6 +100,19 @@ config TARGET_SAMA5D2_XPLAINED
 	select BOARD_EARLY_INIT_F
 	select BOARD_LATE_INIT
 
+config TARGET_SAMA5D27_SOM1_EK
+	bool "SAMA5D27 SOM1 EK board"
+	select CPU_V7
+	select SUPPORT_SPL
+	select BOARD_EARLY_INIT_F
+	select BOARD_LATE_INIT
+	help
+	  The SAMA5D27 SOM1 embeds SAMA5D2 SiP(System in Package),
+	  a 64Mbit QSPI flash, KSZ8081 Phy and a Mac-address EEPROM
+	  24AA02E48. The SAMA5D2 SiP integrates the ARM Cortex-A5
+	  processor-based SAMA5D2 MPU with up to 1 Gbit DDR2-SDRAM
+	  in a single package.
+
 config TARGET_SAMA5D3_XPLAINED
 	bool "SAMA5D3 Xplained board"
 	select CPU_V7
@@ -184,6 +197,7 @@ source "board/atmel/at91sam9rlek/Kconfig"
 source "board/atmel/at91sam9x5ek/Kconfig"
 source "board/atmel/sama5d2_ptc/Kconfig"
 source "board/atmel/sama5d2_xplained/Kconfig"
+source "board/atmel/sama5d27_som1_ek/Kconfig"
 source "board/atmel/sama5d3_xplained/Kconfig"
 source "board/atmel/sama5d3xek/Kconfig"
 source "board/atmel/sama5d4_xplained/Kconfig"
diff --git a/board/atmel/sama5d27_som1_ek/Kconfig b/board/atmel/sama5d27_som1_ek/Kconfig
new file mode 100644
index 0000000000..3276214d8c
--- /dev/null
+++ b/board/atmel/sama5d27_som1_ek/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_SAMA5D27_SOM1_EK
+
+config SYS_BOARD
+	default "sama5d27_som1_ek"
+
+config SYS_VENDOR
+	default "atmel"
+
+config SYS_SOC
+	default "at91"
+
+config SYS_CONFIG_NAME
+	default "sama5d27_som1_ek"
+
+endif
diff --git a/board/atmel/sama5d27_som1_ek/MAINTAINERS b/board/atmel/sama5d27_som1_ek/MAINTAINERS
new file mode 100644
index 0000000000..609583c341
--- /dev/null
+++ b/board/atmel/sama5d27_som1_ek/MAINTAINERS
@@ -0,0 +1,6 @@
+SAMA5D27 SOM1 EK BOARD
+M:	Wenyou Yang <wenyou.yang@microchip.com>
+S:	Maintained
+F:	board/atmel/sama5d27_som1_ek/
+F:	include/configs/sama5d27_som1_ek.h
+F:	configs/sama5d27_som1_ek_mmc_defconfig
diff --git a/board/atmel/sama5d27_som1_ek/Makefile b/board/atmel/sama5d27_som1_ek/Makefile
new file mode 100644
index 0000000000..4ab242c4ac
--- /dev/null
+++ b/board/atmel/sama5d27_som1_ek/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2017 Microchip Corporation
+#		     Wenyou Yang <wenyou.yang@microchip.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += sama5d27_som1_ek.o
diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
new file mode 100644
index 0000000000..80d772518d
--- /dev/null
+++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2017 Microchip Corporation
+ *		      Wenyou.Yang <wenyou.yang@microchip.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/atmel_pio4.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/atmel_sdhci.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/sama5d2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void board_usb_hw_init(void)
+{
+	atmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 1);
+}
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+#ifdef CONFIG_DM_VIDEO
+	at91_video_show_board_info();
+#endif
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+static void board_uart1_hw_init(void)
+{
+	atmel_pio4_set_a_periph(AT91_PIO_PORTD, 2, 1);	/* URXD1 */
+	atmel_pio4_set_a_periph(AT91_PIO_PORTD, 3, 0);	/* UTXD1 */
+
+	at91_periph_clk_enable(ATMEL_ID_UART1);
+}
+
+void board_debug_uart_init(void)
+{
+	board_uart1_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+	debug_uart_init();
+#endif
+
+	return 0;
+}
+#endif
+
+int board_init(void)
+{
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_CMD_USB
+	board_usb_hw_init();
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+#define MAC24AA_MAC_OFFSET	0xfa
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+#ifdef CONFIG_I2C_EEPROM
+	at91_set_ethaddr(MAC24AA_MAC_OFFSET);
+#endif
+	return 0;
+}
+#endif
+
+/* SPL */
+#ifdef CONFIG_SPL_BUILD
+void spl_board_init(void)
+{
+}
+
+static void ddrc_conf(struct atmel_mpddrc_config *ddrc)
+{
+	ddrc->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
+
+	ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+		    ATMEL_MPDDRC_CR_NR_ROW_13 |
+		    ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
+		    ATMEL_MPDDRC_CR_DIC_DS |
+		    ATMEL_MPDDRC_CR_ZQ_LONG |
+		    ATMEL_MPDDRC_CR_NB_8BANKS |
+		    ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
+		    ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
+
+	ddrc->rtr = 0x511;
+
+	ddrc->tpr0 = ((7 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET) |
+		      (3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET) |
+		      (3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) |
+		      (9 << ATMEL_MPDDRC_TPR0_TRC_OFFSET) |
+		      (3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET) |
+		      (4 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET) |
+		      (4 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET) |
+		      (2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET));
+
+	ddrc->tpr1 = ((22 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) |
+		      (23 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET) |
+		      (200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET) |
+		      (3 << ATMEL_MPDDRC_TPR1_TXP_OFFSET));
+
+	ddrc->tpr2 = ((2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET) |
+		      (8 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET) |
+		      (4 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET) |
+		      (4 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET) |
+		      (8 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
+}
+
+void mem_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
+	struct atmel_mpddrc_config ddrc_config;
+	u32 reg;
+
+	ddrc_conf(&ddrc_config);
+
+	at91_periph_clk_enable(ATMEL_ID_MPDDRC);
+	writel(AT91_PMC_DDR, &pmc->scer);
+
+	reg = readl(&mpddrc->io_calibr);
+	reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;
+	reg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;
+	reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;
+	reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(101);
+	writel(reg, &mpddrc->io_calibr);
+
+	writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE,
+	       &mpddrc->rd_data_path);
+
+	ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);
+
+	writel(0x3, &mpddrc->cal_mr4);
+	writel(64, &mpddrc->tim_cal);
+}
+
+void at91_pmc_init(void)
+{
+	u32 tmp;
+
+	/*
+	 * while coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz
+	 * so we need to slow down and configure MCKR accordingly.
+	 * This is why we have a special flavor of the switching function.
+	 */
+	tmp = AT91_PMC_MCKR_PLLADIV_2 |
+	      AT91_PMC_MCKR_MDIV_3 |
+	      AT91_PMC_MCKR_CSS_MAIN;
+	at91_mck_init_down(tmp);
+
+	tmp = AT91_PMC_PLLAR_29 |
+	      AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
+	      AT91_PMC_PLLXR_MUL(40) |
+	      AT91_PMC_PLLXR_DIV(1);
+	at91_plla_init(tmp);
+
+	tmp = AT91_PMC_MCKR_H32MXDIV |
+	      AT91_PMC_MCKR_PLLADIV_2 |
+	      AT91_PMC_MCKR_MDIV_3 |
+	      AT91_PMC_MCKR_CSS_PLLA;
+	at91_mck_init(tmp);
+}
+#endif
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
new file mode 100644
index 0000000000..201deba46c
--- /dev/null
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -0,0 +1,86 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_TARGET_SAMA5D27_SOM1_EK=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=3
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SPL=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_ATMEL_PIO4=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_EEPROM=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf8020000
+CONFIG_DEBUG_UART_CLOCK=82000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_QSPI=y
+CONFIG_ATMEL_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
diff --git a/configs/sama5d27_som1_ek_spiflash_defconfig b/configs/sama5d27_som1_ek_spiflash_defconfig
new file mode 100644
index 0000000000..cb98ed546c
--- /dev/null
+++ b/configs/sama5d27_som1_ek_spiflash_defconfig
@@ -0,0 +1,86 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_TARGET_SAMA5D27_SOM1_EK=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
+CONFIG_QSPI_BOOT=y
+CONFIG_BOOTDELAY=3
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SPL=y
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_OF_TRANSLATE is not set
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_ATMEL_PIO4=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_EEPROM=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf8020000
+CONFIG_DEBUG_UART_CLOCK=82000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_QSPI=y
+CONFIG_ATMEL_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h
new file mode 100644
index 0000000000..47e3c2d8b8
--- /dev/null
+++ b/include/configs/sama5d27_som1_ek.h
@@ -0,0 +1,95 @@
+/*
+ * Configuration file for the SAMA5D27 SOM1 EK Board.
+ *
+ * Copyright (C) 2017 Microchip Corporation
+ *		      Wenyou Yang <wenyou.yang@microchip.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "at91-sama5_common.h"
+
+#undef CONFIG_SYS_TEXT_BASE
+#undef CONFIG_SYS_AT91_MAIN_CLOCK
+#define CONFIG_SYS_TEXT_BASE		0x23f00000
+#define CONFIG_SYS_AT91_MAIN_CLOCK      24000000 /* from 24 MHz crystal */
+
+#define CONFIG_MISC_INIT_R
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_SIZE		0x8000000
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_INIT_SP_ADDR		0x218000
+#else
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+#endif
+
+#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
+
+/* NAND flash */
+#undef CONFIG_CMD_NAND
+
+/* SPI flash */
+#define CONFIG_SF_DEFAULT_SPEED		66000000
+
+#ifdef CONFIG_SD_BOOT
+/* u-boot env in sd/mmc card */
+#define CONFIG_ENV_IS_IN_FAT
+#define CONFIG_FAT_WRITE
+#define FAT_ENV_INTERFACE	"mmc"
+#define FAT_ENV_DEVICE_AND_PART	"0"
+#define FAT_ENV_FILE		"uboot.env"
+#define CONFIG_ENV_SIZE		0x4000
+/* bootstrap + u-boot + env in sd card */
+#define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 at91-sama5d27_som1_ek.dtb; " \
+				"fatload mmc 0:1 0x22000000 zImage; " \
+				"bootz 0x22000000 - 0x21000000"
+#undef CONFIG_BOOTARGS
+#define CONFIG_BOOTARGS \
+	"console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
+#endif
+
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET		0xb0000
+#define CONFIG_ENV_SIZE			0x10000
+#define CONFIG_ENV_SECT_SIZE		0x10000
+#define CONFIG_BOOTCOMMAND		"sf probe 0; "				\
+					"sf read 0x21000000 0xc0000 0x20000; "	\
+					"sf read 0x22000000 0xe0000 0x400000; "	\
+					"bootz 0x22000000 - 0x21000000"
+#undef CONFIG_BOOTARGS
+#define CONFIG_BOOTARGS \
+	"console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
+#endif
+
+/* SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x200000
+#define CONFIG_SPL_MAX_SIZE		0x10000
+#define CONFIG_SPL_BSS_START_ADDR	0x20000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
+#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
+
+#define CONFIG_SYS_MONITOR_LEN		(512 << 10)
+
+#ifdef CONFIG_SD_BOOT
+#define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/armv7/u-boot-spl.lds
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
+#endif
+
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x10000
+#endif
+
+#endif
-- 
2.13.0

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board.
  2017-07-31  6:57 [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Wenyou Yang
                   ` (5 preceding siblings ...)
  2017-07-31  6:57 ` [U-Boot] [PATCH v2 6/6] board: atmel: Add SAMA5D27 SOM1 EK board Wenyou Yang
@ 2017-08-25  1:15 ` Yang, Wenyou
  2017-08-29  7:08   ` Andy Pont
  6 siblings, 1 reply; 9+ messages in thread
From: Yang, Wenyou @ 2017-08-25  1:15 UTC (permalink / raw)
  To: u-boot

Hi,

Do you have comments on this patch series?


Best Regards,
Wenyou Yang

On 2017/7/31 14:57, Wenyou Yang wrote:
> The SAMA5D27-SOM1-EK board embeds a SAMA5D27 SOM1 module, which includes
> a SAMA5D27-SiP chip and QSPI flash, Phy and MAC EEPROM. The SAMA5D27 SiP
> integrates the SAMA5D2 with 1Gbit DDR2-SDRAM in a single package.
> It is based on
> 	1./ [PATCH v2 0/8] sf: improve support of (Q)SPI flash memories
> 	https://lists.denx.de/pipermail/u-boot/2017-July/298806.html
> 	2./ [PATCH v2 0/3] board: atmel: Set the ethernet mac address from eeprom
> 	https://lists.denx.de/pipermail/u-boot/2017-July/300527.html
> 	3./ [PATCH 0/7] board: atmel: Convert to support DM_VIDEO
> 	https://lists.denx.de/pipermail/u-boot/2017-July/300533.html
>
> Changes in v2:
>   - Add the reviewed-by tag.
>   - Add the help in Kconfig to describe the board and peripherals.
>   - Add the code to display the company's logo and board information.
>   - Replace the code to set the ethernet mac address with the common
>     code from the board/atmel/common folder.
>
> Wenyou Yang (6):
>    ARM: at91: spl: Adjust switching to oscillator for SAMA5D2
>    ARM: at91: spl: Add mck function to lower rate while switching
>    ARM: at91: spl: Add boot device for boot from QSPI
>    ARM: at91: mach: Add missing defines of MPDDRC
>    ARM: at91: Get the Chip ID of SAMA5D2 SiP
>    board: atmel: Add SAMA5D27 SOM1 EK board
>
>   arch/arm/dts/Makefile                           |   3 +
>   arch/arm/dts/at91-sama5d27_som1_ek.dts          | 215 ++++++++++++++++++++++++
>   arch/arm/dts/sama5d2.dtsi                       |  20 +++
>   arch/arm/dts/sama5d27_som1.dtsi                 | 159 ++++++++++++++++++
>   arch/arm/mach-at91/Kconfig                      |  14 ++
>   arch/arm/mach-at91/armv7/clock.c                |  36 ++++
>   arch/arm/mach-at91/armv7/sama5d2_devices.c      |  26 ++-
>   arch/arm/mach-at91/include/mach/at91_common.h   |   1 +
>   arch/arm/mach-at91/include/mach/at91_pmc.h      |   2 +
>   arch/arm/mach-at91/include/mach/atmel_mpddrc.h  |   4 +
>   arch/arm/mach-at91/include/mach/sama5d2.h       |   7 +-
>   arch/arm/mach-at91/spl.c                        |   2 +
>   arch/arm/mach-at91/spl_atmel.c                  |  18 +-
>   board/atmel/sama5d27_som1_ek/Kconfig            |  15 ++
>   board/atmel/sama5d27_som1_ek/MAINTAINERS        |   6 +
>   board/atmel/sama5d27_som1_ek/Makefile           |   8 +
>   board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 189 +++++++++++++++++++++
>   configs/sama5d27_som1_ek_mmc_defconfig          |  86 ++++++++++
>   configs/sama5d27_som1_ek_spiflash_defconfig     |  86 ++++++++++
>   include/configs/sama5d27_som1_ek.h              |  95 +++++++++++
>   20 files changed, 988 insertions(+), 4 deletions(-)
>   create mode 100644 arch/arm/dts/at91-sama5d27_som1_ek.dts
>   create mode 100644 arch/arm/dts/sama5d27_som1.dtsi
>   create mode 100644 board/atmel/sama5d27_som1_ek/Kconfig
>   create mode 100644 board/atmel/sama5d27_som1_ek/MAINTAINERS
>   create mode 100644 board/atmel/sama5d27_som1_ek/Makefile
>   create mode 100644 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
>   create mode 100644 configs/sama5d27_som1_ek_mmc_defconfig
>   create mode 100644 configs/sama5d27_som1_ek_spiflash_defconfig
>   create mode 100644 include/configs/sama5d27_som1_ek.h
>

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board.
  2017-08-25  1:15 ` [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Yang, Wenyou
@ 2017-08-29  7:08   ` Andy Pont
  0 siblings, 0 replies; 9+ messages in thread
From: Andy Pont @ 2017-08-29  7:08 UTC (permalink / raw)
  To: u-boot

Wenyou wrote...

> On 2017/7/31 14:57, Wenyou Yang wrote:
> > The SAMA5D27-SOM1-EK board embeds a SAMA5D27 SOM1 module, which includes
> > a SAMA5D27-SiP chip and QSPI flash, Phy and MAC EEPROM. The SAMA5D27 SiP
> > integrates the SAMA5D2 with 1Gbit DDR2-SDRAM in a single package.
> > It is based on
> > 	1./ [PATCH v2 0/8] sf: improve support of (Q)SPI flash memories
> > 	https://lists.denx.de/pipermail/u-boot/2017-July/298806.html
> > 	2./ [PATCH v2 0/3] board: atmel: Set the ethernet mac address from
> >   eeprom
> > 	https://lists.denx.de/pipermail/u-boot/2017-July/300527.html
> > 	3./ [PATCH 0/7] board: atmel: Convert to support DM_VIDEO
> > 	https://lists.denx.de/pipermail/u-boot/2017-July/300533.html

Do we assume that these aren't now going to make it into 2017.09 and we have to wait for the 2017.12 tagged release?

-Andy.

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2017-08-29  7:08 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-07-31  6:57 [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Wenyou Yang
2017-07-31  6:57 ` [U-Boot] [PATCH v2 1/6] ARM: at91: spl: Adjust switching to oscillator for SAMA5D2 Wenyou Yang
2017-07-31  6:57 ` [U-Boot] [PATCH v2 2/6] ARM: at91: spl: Add mck function to lower rate while switching Wenyou Yang
2017-07-31  6:57 ` [U-Boot] [PATCH v2 3/6] ARM: at91: spl: Add boot device for boot from QSPI Wenyou Yang
2017-07-31  6:57 ` [U-Boot] [PATCH v2 4/6] ARM: at91: mach: Add missing defines of MPDDRC Wenyou Yang
2017-07-31  6:57 ` [U-Boot] [PATCH v2 5/6] ARM: at91: Get the Chip ID of SAMA5D2 SiP Wenyou Yang
2017-07-31  6:57 ` [U-Boot] [PATCH v2 6/6] board: atmel: Add SAMA5D27 SOM1 EK board Wenyou Yang
2017-08-25  1:15 ` [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board Yang, Wenyou
2017-08-29  7:08   ` Andy Pont

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