* [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers
@ 2017-07-14 13:51 Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 01/28] mips: cpu: move mmu/fpu/mvp_init to realize time Igor Mammedov
` (27 more replies)
0 siblings, 28 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber, Eduardo Habkost, Peter Maydell
While looking at ways to to get rid of ad-hoc cpu_model
parsing in every machine/*-user and unifying -cpu option
parsing, making it generic, I've noticed that most of
the targets have cpu_FOO_init() helper that does nothing
except of calling cpu_generic_init() and a few that do
additional ad-hoc cpu initialization outside of QOM model.
The most of the later could be easily fixed and
the 2 remaining mips/sparc targets are missing proper
conversion of cpu models to cpu subclasses and/or
cpu features to properties, with that fixed it's
possible get rid of custom cpu_FOO_init() helpers and
reuse cpu_generic_init() instead (which reduces code
size quite a bit).
That's what this series (1st part of cpu_model unification) does.
Patches:
* 1-2: complete QOMifying MIPS cpu and cpu models into classes
* 4-9: complete QOMifying SPARC cpu including features into properties
conversion and cpu models into classes so it could use
cpu_generic_init() to create cpus.
above patches care only about completing CPU QOMinfication and
might be not pretty or clean as they could be,
but leave cleanups and follow up code simplification is way out of scope
and (might|should) be done on top by respective maintainers or someone
who cares about it.
* the rest of the patches are just replacing custom cpu_FOO_init()
with cpu_generic_init() and sometimes dealing with target
specific oddities in handling cpu name to typename conversion
git tree for testing/viewing:
https://github.com/imammedo/qemu.git cpu_init_def_target_cpu
https://github.com/imammedo/qemu/commits/cpu_init_def_target_cpu
PS:
Series for most targets is trivial and riskfree so it would be nice
if it's merged into 2.10 to have clean road for follow up refactoring.
MIPS/SPARC are the only targets that received 'heavy' refactoring
so I've treated them with more manual testing the rest of series if
slightly tested /make check for softmmu targets and running busybox for
the most of *-linux targets /, and not regressions were noticed.
I've CCed related maintainers on individual patches but it would be
nice if someone would ghelp out with reviewing less popular targets.
And now about follow up series, as end result of unificathion,
I'm looking for:
- replacing many ad-hoc ways of specifying default cpu with
a one generic way
- cpu_model parsing done with common cpu_model_helper that
will be called from 3 places: generic machine code and [linux|bsd]-user
- cpu_model_helper returning cpu type name that
the rest of the code will deal with
- get rid of cpu_init() and leave only cpu_generic_init() throughout the tree
- make cpu_model_helper will be usable at pre machine_init()
so that commands like hotplugable-cpus could be used
in with HMP/QMP preconfiguration interface I'm working on.
(it's the real reason why I'm doing all of of this)
CC: Andreas Färber <afaerber@suse.de>
CC: Eduardo Habkost <ehabkost@redhat.com>
CC: Peter Maydell <peter.maydell@linaro.org>
Igor Mammedov (28):
mips: cpu: move mmu/fpu/mvp_init to realize time
mips: MIPSCPU model subclasses
mips: replace cpu_mips_init() with cpu_generic_init()
sparc: convert cpu models to SPARC cpu subclasses
sparc: embed sparc_def_t into CPUSPARCState
sparc: convert cpu features to qdev properties
sparc: move adhoc CPUSPARCState initialization to realize time
x86: extract legacy cpu features format parser
sparc: replace custom cpu feature parsing with
cpu_legacy_parse_featurestr()
sparc: replace cpu_sparc_init() with cpu_generic_init()
s390x: replace cpu_s390x_init() with cpu_generic_init()
alpha: replace cpu_alpha_init() with cpu_generic_init()
hppa: replace cpu_hppa_init() with cpu_generic_init()
m68k: replace cpu_m68k_init() with cpu_generic_init()
microblaze: replace cpu_mb_init() with cpu_generic_init()
nios2: replace cpu_nios2_init() with cpu_generic_init()
tilegx: replace cpu_tilegx_init() with cpu_generic_init()
xtensa: replace cpu_xtensa_init() with cpu_generic_init()
tricore: replace cpu_tricore_init() with cpu_generic_init()
sh4: replace cpu_sh4_init() with cpu_generic_init()
arm: replace cpu_arm_init() with cpu_generic_init()
cris: replace cpu_cris_init() with cpu_generic_init()
x86: replace cpu_x86_init() with cpu_generic_init()
lm32: replace cpu_lm32_init() with cpu_generic_init()
moxie: replace cpu_moxie_init() with cpu_generic_init()
openrisc: replace cpu_openrisc_init() with cpu_generic_init()
unicore32: replace uc32_cpu_init() with cpu_generic_init()
ppc: replace cpu_ppc_init() with cpu_generic_init()
include/qom/cpu.h | 6 +
linux-user/sparc/target_syscall.h | 2 +-
target/alpha/cpu.h | 4 +-
target/arm/cpu.h | 3 +-
target/cris/cpu.h | 3 +-
target/hppa/cpu.h | 4 +-
target/i386/cpu.h | 3 +-
target/lm32/cpu.h | 3 +-
target/m68k/cpu.h | 3 +-
target/microblaze/cpu.h | 3 +-
target/mips/cpu-qom.h | 2 +
target/mips/cpu.h | 63 +++++-
target/moxie/cpu.h | 3 +-
target/nios2/cpu.h | 3 +-
target/openrisc/cpu.h | 4 +-
target/ppc/cpu.h | 3 +-
target/s390x/cpu.h | 3 +-
target/sh4/cpu.h | 3 +-
target/sparc/cpu-qom.h | 2 +
target/sparc/cpu.h | 11 +-
target/tilegx/cpu.h | 4 +-
target/tricore/cpu.h | 4 +-
target/unicore32/cpu.h | 4 +-
target/xtensa/cpu.h | 4 +-
default-configs/i386-bsd-user.mak | 1 +
default-configs/i386-linux-user.mak | 1 +
default-configs/i386-softmmu.mak | 1 +
default-configs/sparc-bsd-user.mak | 1 +
default-configs/sparc-linux-user.mak | 1 +
default-configs/sparc-softmmu.mak | 1 +
default-configs/sparc32plus-linux-user.mak | 1 +
default-configs/sparc64-bsd-user.mak | 1 +
default-configs/sparc64-linux-user.mak | 1 +
default-configs/sparc64-softmmu.mak | 1 +
default-configs/x86_64-bsd-user.mak | 1 +
default-configs/x86_64-linux-user.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/alpha/dp264.c | 8 +-
hw/arm/musicpal.c | 2 +-
hw/arm/omap1.c | 2 +-
hw/arm/omap2.c | 2 +-
hw/arm/pxa2xx.c | 4 +-
hw/arm/strongarm.c | 2 +-
hw/cris/axis_dev88.c | 2 +-
hw/lm32/lm32_boards.c | 4 +-
hw/lm32/milkymist.c | 2 +-
hw/m68k/an5206.c | 2 +-
hw/m68k/mcf5208.c | 2 +-
hw/mips/cps.c | 2 +-
hw/mips/mips_fulong2e.c | 2 +-
hw/mips/mips_jazz.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/mips/mips_mipssim.c | 2 +-
hw/mips/mips_r4k.c | 2 +-
hw/moxie/moxiesim.c | 2 +-
hw/nios2/10m50_devboard.c | 2 +-
hw/openrisc/openrisc_sim.c | 2 +-
hw/ppc/e500.c | 3 +-
hw/ppc/mac_newworld.c | 3 +-
hw/ppc/mac_oldworld.c | 3 +-
hw/ppc/ppc440_bamboo.c | 2 +-
hw/ppc/ppc4xx_devs.c | 2 +-
hw/ppc/prep.c | 5 +-
hw/ppc/virtex_ml507.c | 2 +-
hw/sh4/r2d.c | 2 +-
hw/sh4/shix.c | 2 +-
hw/sparc/leon3.c | 2 +-
hw/sparc/sun4m.c | 2 +-
hw/sparc64/sparc64.c | 2 +-
hw/tricore/tricore_testboard.c | 2 +-
hw/unicore32/puv3.c | 2 +-
hw/xtensa/sim.c | 2 +-
hw/xtensa/xtfpga.c | 2 +-
target/alpha/cpu.c | 20 +-
target/arm/helper.c | 5 -
target/cris/cpu.c | 5 -
target/hppa/cpu.c | 11 +-
target/i386/cpu.c | 129 +----------
target/lm32/helper.c | 5 -
target/m68k/cpu.c | 2 +
target/m68k/helper.c | 20 --
target/microblaze/cpu.c | 6 +
target/microblaze/translate.c | 11 -
target/mips/cpu.c | 60 +++++
target/mips/translate.c | 25 ---
target/mips/translate_init.c | 63 +-----
target/moxie/cpu.c | 5 -
target/nios2/cpu.c | 9 +-
target/openrisc/cpu.c | 5 -
target/ppc/translate_init.c | 5 -
target/s390x/cpu.c | 7 +
target/s390x/helper.c | 14 --
target/sh4/cpu.c | 5 -
target/sparc/cpu.c | 341 ++++++++++++++---------------
target/sparc/int32_helper.c | 2 +-
target/sparc/int64_helper.c | 2 +-
target/sparc/ldst_helper.c | 14 +-
target/sparc/mmu_helper.c | 2 +-
target/sparc/translate.c | 2 +-
target/sparc/win_helper.c | 4 +-
target/tilegx/cpu.c | 11 +-
target/tricore/helper.c | 5 -
target/unicore32/helper.c | 5 -
target/xtensa/cpu.c | 3 +
target/xtensa/helper.c | 22 --
util/Makefile.objs | 1 +
util/legacy_cpu_features_parser.c | 153 +++++++++++++
107 files changed, 584 insertions(+), 643 deletions(-)
create mode 100644 util/legacy_cpu_features_parser.c
--
2.7.4
^ permalink raw reply [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 01/28] mips: cpu: move mmu/fpu/mvp_init to realize time
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
@ 2017-07-14 13:51 ` Igor Mammedov
2017-07-15 21:48 ` Philippe Mathieu-Daudé
2017-07-14 13:51 ` [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses Igor Mammedov
` (26 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Aurelien Jarno, Yongbok Kim
it will help to replace custom cpu_mips_init() with cpu_generic_init().
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Aurelien Jarno <aurelien@aurel32.net>
CC: Yongbok Kim <yongbok.kim@imgtec.com>
---
target/mips/cpu.h | 3 +++
target/mips/cpu.c | 9 +++++++++
target/mips/translate.c | 7 -------
target/mips/translate_init.c | 6 +++---
4 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 4a4747a..9c32228 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1070,4 +1070,7 @@ static inline void QEMU_NORETURN do_raise_exception(CPUMIPSState *env,
do_raise_exception_err(env, exception, 0, pc);
}
+void mips_cpu_mmu_init(CPUMIPSState *env, const mips_def_t *def);
+void mips_cpu_fpu_init(CPUMIPSState *env, const mips_def_t *def);
+void mips_cpu_mvp_init(CPUMIPSState *env, const mips_def_t *def);
#endif /* MIPS_CPU_H */
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 1bb66b7..82afdaa 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -122,9 +122,18 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) {
static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
+ MIPSCPU *cpu = MIPS_CPU(dev);
+ CPUMIPSState *env = &cpu->env;
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
Error *local_err = NULL;
+ env->exception_base = (int32_t)0xBFC00000;
+#ifndef CONFIG_USER_ONLY
+ mips_cpu_mmu_init(env, env->cpu_model);
+#endif
+ mips_cpu_fpu_init(env, env->cpu_model);
+ mips_cpu_mvp_init(env, env->cpu_model);
+
cpu_exec_realizefn(cs, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 559f8fe..7b3ae81 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20203,13 +20203,6 @@ MIPSCPU *cpu_mips_init(const char *cpu_model)
cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU));
env = &cpu->env;
env->cpu_model = def;
- env->exception_base = (int32_t)0xBFC00000;
-
-#ifndef CONFIG_USER_ONLY
- mmu_init(env, def);
-#endif
- fpu_init(env, def);
- mvp_init(env, def);
object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
index 6ae23e4..c771ff1 100644
--- a/target/mips/translate_init.c
+++ b/target/mips/translate_init.c
@@ -851,7 +851,7 @@ static void r4k_mmu_init (CPUMIPSState *env, const mips_def_t *def)
env->tlb->helper_tlbinvf = r4k_helper_tlbinvf;
}
-static void mmu_init (CPUMIPSState *env, const mips_def_t *def)
+void mips_cpu_mmu_init(CPUMIPSState *env, const mips_def_t *def)
{
MIPSCPU *cpu = mips_env_get_cpu(env);
@@ -876,7 +876,7 @@ static void mmu_init (CPUMIPSState *env, const mips_def_t *def)
}
#endif /* CONFIG_USER_ONLY */
-static void fpu_init (CPUMIPSState *env, const mips_def_t *def)
+void mips_cpu_fpu_init(CPUMIPSState *env, const mips_def_t *def)
{
int i;
@@ -886,7 +886,7 @@ static void fpu_init (CPUMIPSState *env, const mips_def_t *def)
memcpy(&env->active_fpu, &env->fpus[0], sizeof(env->active_fpu));
}
-static void mvp_init (CPUMIPSState *env, const mips_def_t *def)
+void mips_cpu_mvp_init(CPUMIPSState *env, const mips_def_t *def)
{
env->mvp = g_malloc0(sizeof(CPUMIPSMVPContext));
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 01/28] mips: cpu: move mmu/fpu/mvp_init to realize time Igor Mammedov
@ 2017-07-14 13:51 ` Igor Mammedov
2017-07-15 21:48 ` Philippe Mathieu-Daudé
2017-07-14 13:51 ` [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init() Igor Mammedov
` (25 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Aurelien Jarno, Yongbok Kim
Register separate QOM types for each mips cpu model,
so it would be possible to reuse generic CPU creation
routines.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Aurelien Jarno <aurelien@aurel32.net>
CC: Yongbok Kim <yongbok.kim@imgtec.com>
---
target/mips/cpu-qom.h | 2 ++
target/mips/cpu.h | 57 +++++++++++++++++++++++++++++++++++++++++++-
target/mips/cpu.c | 51 +++++++++++++++++++++++++++++++++++++++
target/mips/translate.c | 13 +++++-----
target/mips/translate_init.c | 57 ++------------------------------------------
5 files changed, 117 insertions(+), 63 deletions(-)
diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
index 3f5bf23..4b32401 100644
--- a/target/mips/cpu-qom.h
+++ b/target/mips/cpu-qom.h
@@ -35,6 +35,7 @@
#define MIPS_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(MIPSCPUClass, (obj), TYPE_MIPS_CPU)
+typedef struct mips_def_t mips_def_t;
/**
* MIPSCPUClass:
* @parent_realize: The parent class' realize handler.
@@ -49,6 +50,7 @@ typedef struct MIPSCPUClass {
DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
+ const mips_def_t *cpu_def;
} MIPSCPUClass;
typedef struct MIPSCPU MIPSCPU;
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 9c32228..7c2e0bf 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -161,7 +161,62 @@ struct CPUMIPSMVPContext {
#define CP0MVPC1_PCP1 0
};
-typedef struct mips_def_t mips_def_t;
+/* MMU types, the first four entries have the same layout as the
+ CP0C0_MT field. */
+enum mips_mmu_types {
+ MMU_TYPE_NONE,
+ MMU_TYPE_R4000,
+ MMU_TYPE_RESERVED,
+ MMU_TYPE_FMT,
+ MMU_TYPE_R3000,
+ MMU_TYPE_R6000,
+ MMU_TYPE_R8000
+};
+
+struct mips_def_t {
+ const char *name;
+ int32_t CP0_PRid;
+ int32_t CP0_Config0;
+ int32_t CP0_Config1;
+ int32_t CP0_Config2;
+ int32_t CP0_Config3;
+ int32_t CP0_Config4;
+ int32_t CP0_Config4_rw_bitmask;
+ int32_t CP0_Config5;
+ int32_t CP0_Config5_rw_bitmask;
+ int32_t CP0_Config6;
+ int32_t CP0_Config7;
+ target_ulong CP0_LLAddr_rw_bitmask;
+ int CP0_LLAddr_shift;
+ int32_t SYNCI_Step;
+ int32_t CCRes;
+ int32_t CP0_Status_rw_bitmask;
+ int32_t CP0_TCStatus_rw_bitmask;
+ int32_t CP0_SRSCtl;
+ int32_t CP1_fcr0;
+ int32_t CP1_fcr31_rw_bitmask;
+ int32_t CP1_fcr31;
+ int32_t MSAIR;
+ int32_t SEGBITS;
+ int32_t PABITS;
+ int32_t CP0_SRSConf0_rw_bitmask;
+ int32_t CP0_SRSConf0;
+ int32_t CP0_SRSConf1_rw_bitmask;
+ int32_t CP0_SRSConf1;
+ int32_t CP0_SRSConf2_rw_bitmask;
+ int32_t CP0_SRSConf2;
+ int32_t CP0_SRSConf3_rw_bitmask;
+ int32_t CP0_SRSConf3;
+ int32_t CP0_SRSConf4_rw_bitmask;
+ int32_t CP0_SRSConf4;
+ int32_t CP0_PageGrain_rw_bitmask;
+ int32_t CP0_PageGrain;
+ int insn_flags;
+ enum mips_mmu_types mmu_type;
+};
+
+extern const struct mips_def_t mips_defs[];
+extern const int mips_defs_number;
#define MIPS_SHADOW_SET_MAX 16
#define MIPS_TC_MAX 5
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 82afdaa..111b5ae 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -151,12 +151,37 @@ static void mips_cpu_initfn(Object *obj)
CPUState *cs = CPU(obj);
MIPSCPU *cpu = MIPS_CPU(obj);
CPUMIPSState *env = &cpu->env;
+ MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(obj);
cs->env_ptr = env;
if (tcg_enabled()) {
mips_tcg_init();
}
+
+ if (mcc->cpu_def) {
+ env->cpu_model = mcc->cpu_def;
+ }
+}
+
+static char *mips_cpu_type_name(const char *cpu_model)
+{
+ return g_strdup_printf("%s-" TYPE_MIPS_CPU, cpu_model);
+}
+
+static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
+{
+ ObjectClass *oc;
+ char *typename;
+
+ if (cpu_model == NULL) {
+ return NULL;
+ }
+
+ typename = mips_cpu_type_name(cpu_model);
+ oc = object_class_by_name(typename);
+ g_free(typename);
+ return oc;
}
static void mips_cpu_class_init(ObjectClass *c, void *data)
@@ -171,6 +196,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = mips_cpu_reset;
+ cc->class_by_name = mips_cpu_class_by_name;
cc->has_work = mips_cpu_has_work;
cc->do_interrupt = mips_cpu_do_interrupt;
cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
@@ -203,9 +229,34 @@ static const TypeInfo mips_cpu_type_info = {
.class_init = mips_cpu_class_init,
};
+static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data)
+{
+ MIPSCPUClass *mcc = MIPS_CPU_CLASS(oc);
+ mcc->cpu_def = data;
+}
+
+static void mips_register_cpudef_type(const struct mips_def_t *def)
+{
+ char *typename = mips_cpu_type_name(def->name);
+ TypeInfo ti = {
+ .name = typename,
+ .parent = TYPE_MIPS_CPU,
+ .class_init = mips_cpu_cpudef_class_init,
+ .class_data = (void *)def,
+ };
+
+ type_register(&ti);
+ g_free(typename);
+}
+
static void mips_cpu_register_types(void)
{
+ int i;
+
type_register_static(&mips_cpu_type_info);
+ for (i = 0; i < mips_defs_number; i++) {
+ mips_register_cpudef_type(&mips_defs[i]);
+ }
}
type_init(mips_cpu_register_types)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 7b3ae81..ae7ca80 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20193,16 +20193,15 @@ void mips_tcg_init(void)
MIPSCPU *cpu_mips_init(const char *cpu_model)
{
+ ObjectClass *oc;
MIPSCPU *cpu;
- CPUMIPSState *env;
- const mips_def_t *def;
- def = cpu_mips_find_by_name(cpu_model);
- if (!def)
+ oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
+ if (oc == NULL) {
return NULL;
- cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU));
- env = &cpu->env;
- env->cpu_model = def;
+ }
+
+ cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
index c771ff1..16c214b 100644
--- a/target/mips/translate_init.c
+++ b/target/mips/translate_init.c
@@ -51,63 +51,9 @@
#define MIPS_CONFIG5 \
((0 << CP0C5_M))
-/* MMU types, the first four entries have the same layout as the
- CP0C0_MT field. */
-enum mips_mmu_types {
- MMU_TYPE_NONE,
- MMU_TYPE_R4000,
- MMU_TYPE_RESERVED,
- MMU_TYPE_FMT,
- MMU_TYPE_R3000,
- MMU_TYPE_R6000,
- MMU_TYPE_R8000
-};
-
-struct mips_def_t {
- const char *name;
- int32_t CP0_PRid;
- int32_t CP0_Config0;
- int32_t CP0_Config1;
- int32_t CP0_Config2;
- int32_t CP0_Config3;
- int32_t CP0_Config4;
- int32_t CP0_Config4_rw_bitmask;
- int32_t CP0_Config5;
- int32_t CP0_Config5_rw_bitmask;
- int32_t CP0_Config6;
- int32_t CP0_Config7;
- target_ulong CP0_LLAddr_rw_bitmask;
- int CP0_LLAddr_shift;
- int32_t SYNCI_Step;
- int32_t CCRes;
- int32_t CP0_Status_rw_bitmask;
- int32_t CP0_TCStatus_rw_bitmask;
- int32_t CP0_SRSCtl;
- int32_t CP1_fcr0;
- int32_t CP1_fcr31_rw_bitmask;
- int32_t CP1_fcr31;
- int32_t MSAIR;
- int32_t SEGBITS;
- int32_t PABITS;
- int32_t CP0_SRSConf0_rw_bitmask;
- int32_t CP0_SRSConf0;
- int32_t CP0_SRSConf1_rw_bitmask;
- int32_t CP0_SRSConf1;
- int32_t CP0_SRSConf2_rw_bitmask;
- int32_t CP0_SRSConf2;
- int32_t CP0_SRSConf3_rw_bitmask;
- int32_t CP0_SRSConf3;
- int32_t CP0_SRSConf4_rw_bitmask;
- int32_t CP0_SRSConf4;
- int32_t CP0_PageGrain_rw_bitmask;
- int32_t CP0_PageGrain;
- int insn_flags;
- enum mips_mmu_types mmu_type;
-};
-
/*****************************************************************************/
/* MIPS CPU definitions */
-static const mips_def_t mips_defs[] =
+const mips_def_t mips_defs[] =
{
{
.name = "4Kc",
@@ -803,6 +749,7 @@ static const mips_def_t mips_defs[] =
#endif
};
+const int mips_defs_number = ARRAY_SIZE(mips_defs);
static const mips_def_t *cpu_mips_find_by_name (const char *name)
{
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 01/28] mips: cpu: move mmu/fpu/mvp_init to realize time Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses Igor Mammedov
@ 2017-07-14 13:51 ` Igor Mammedov
2017-07-15 6:09 ` Hervé Poussineau
2017-07-15 21:48 ` Philippe Mathieu-Daudé
2017-07-14 13:51 ` [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses Igor Mammedov
` (24 subsequent siblings)
27 siblings, 2 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Aurelien Jarno, Yongbok Kim, Hervé Poussineau
now cpu_mips_init() reimplements subset of cpu_generic_init()
tasks, so just drop it and use cpu_generic_init() directly.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Aurelien Jarno <aurelien@aurel32.net>
CC: Yongbok Kim <yongbok.kim@imgtec.com>
CC: "Hervé Poussineau" <hpoussin@reactos.org>
---
target/mips/cpu.h | 3 +--
hw/mips/cps.c | 2 +-
hw/mips/mips_fulong2e.c | 2 +-
hw/mips/mips_jazz.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/mips/mips_mipssim.c | 2 +-
hw/mips/mips_r4k.c | 2 +-
target/mips/translate.c | 17 -----------------
8 files changed, 7 insertions(+), 25 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 7c2e0bf..efc8025 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -865,10 +865,9 @@ enum {
#define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
void mips_tcg_init(void);
-MIPSCPU *cpu_mips_init(const char *cpu_model);
int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
-#define cpu_init(cpu_model) CPU(cpu_mips_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model)
bool cpu_supports_cps_smp(const char *cpu_model);
bool cpu_supports_isa(const char *cpu_model, unsigned int isa);
void cpu_set_exception_base(int vp_index, target_ulong address);
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 4ef337d..708899c 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
bool itu_present = false;
for (i = 0; i < s->num_vp; i++) {
- cpu = cpu_mips_init(s->cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model));
if (cpu == NULL) {
error_setg(errp, "%s: CPU initialization failed", __func__);
return;
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index dbe2805..02a1712 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -277,7 +277,7 @@ static void mips_fulong2e_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "Loongson-2E";
}
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index 1cef581..ee58c44 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -151,7 +151,7 @@ static void mips_jazz_init(MachineState *machine,
if (cpu_model == NULL) {
cpu_model = "R4000";
}
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 95cdabb..21dd2c3 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -928,7 +928,7 @@ static void create_cpu_without_cps(const char *cpu_model,
int i;
for (i = 0; i < smp_cpus; i++) {
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
index 1b91195..80e2bab 100644
--- a/hw/mips/mips_mipssim.c
+++ b/hw/mips/mips_mipssim.c
@@ -162,7 +162,7 @@ mips_mipssim_init(MachineState *machine)
cpu_model = "24Kf";
#endif
}
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index f4de9fc..81dba5e 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -191,7 +191,7 @@ void mips_r4k_init(MachineState *machine)
cpu_model = "24Kf";
#endif
}
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/target/mips/translate.c b/target/mips/translate.c
index ae7ca80..ad4242f 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20191,23 +20191,6 @@ void mips_tcg_init(void)
#include "translate_init.c"
-MIPSCPU *cpu_mips_init(const char *cpu_model)
-{
- ObjectClass *oc;
- MIPSCPU *cpu;
-
- oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
- if (oc == NULL) {
- return NULL;
- }
-
- cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
-}
-
bool cpu_supports_cps_smp(const char *cpu_model)
{
const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (2 preceding siblings ...)
2017-07-14 13:51 ` [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init() Igor Mammedov
@ 2017-07-14 13:51 ` Igor Mammedov
2017-08-14 7:56 ` Igor Mammedov
2017-08-17 3:50 ` Philippe Mathieu-Daudé
2017-07-14 13:51 ` [Qemu-devel] [PATCH 05/28] sparc: embed sparc_def_t into CPUSPARCState Igor Mammedov
` (23 subsequent siblings)
27 siblings, 2 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Mark Cave-Ayland, Artyom Tarasenko
QOMfy cpu models handling introducing propper cpu types
for each cpu model.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
with this and conversion of features to properties,
it would be possible to replace cpu_sparc_init() with
cpu_generic_init() and reuse common -cpu handling
infrastructure.
CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
CC: Artyom Tarasenko <atar4qemu@gmail.com>
---
target/sparc/cpu-qom.h | 2 +
target/sparc/cpu.c | 119 +++++++++++++++++++++++++++++++++----------------
2 files changed, 83 insertions(+), 38 deletions(-)
diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h
index f63af72..af6d57a 100644
--- a/target/sparc/cpu-qom.h
+++ b/target/sparc/cpu-qom.h
@@ -35,6 +35,7 @@
#define SPARC_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(SPARCCPUClass, (obj), TYPE_SPARC_CPU)
+typedef struct sparc_def_t sparc_def_t;
/**
* SPARCCPUClass:
* @parent_realize: The parent class' realize handler.
@@ -49,6 +50,7 @@ typedef struct SPARCCPUClass {
DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
+ sparc_def_t *cpu_def;
} SPARCCPUClass;
typedef struct SPARCCPU SPARCCPU;
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index d606eb5..f8cf751 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -25,8 +25,6 @@
//#define DEBUG_FEATURES
-static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
-
/* CPUClass::reset() */
static void sparc_cpu_reset(CPUState *s)
{
@@ -111,17 +109,9 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
{
CPUSPARCState *env = &cpu->env;
char *s = g_strdup(cpu_model);
- char *featurestr, *name = strtok(s, ",");
- sparc_def_t def1, *def = &def1;
+ char *featurestr = strtok(s, ",");
Error *err = NULL;
- if (cpu_sparc_find_by_name(def, name) < 0) {
- g_free(s);
- return -1;
- }
-
- env->def = g_memdup(def, sizeof(*def));
-
featurestr = strtok(NULL, ",");
sparc_cpu_parse_features(CPU(cpu), featurestr, &err);
g_free(s);
@@ -130,18 +120,18 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
return -1;
}
- env->version = def->iu_version;
- env->fsr = def->fpu_version;
- env->nwindows = def->nwindows;
+ env->version = env->def->iu_version;
+ env->fsr = env->def->fpu_version;
+ env->nwindows = env->def->nwindows;
#if !defined(TARGET_SPARC64)
- env->mmuregs[0] |= def->mmu_version;
+ env->mmuregs[0] |= env->def->mmu_version;
cpu_sparc_set_id(env, 0);
- env->mxccregs[7] |= def->mxcc_version;
+ env->mxccregs[7] |= env->def->mxcc_version;
#else
- env->mmu_version = def->mmu_version;
- env->maxtl = def->maxtl;
- env->version |= def->maxtl << 8;
- env->version |= def->nwindows - 1;
+ env->mmu_version = env->def->mmu_version;
+ env->maxtl = env->def->maxtl;
+ env->version |= env->def->maxtl << 8;
+ env->version |= env->def->nwindows - 1;
#endif
return 0;
}
@@ -149,8 +139,19 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
SPARCCPU *cpu_sparc_init(const char *cpu_model)
{
SPARCCPU *cpu;
+ ObjectClass *oc;
+ char *str, *name;
+
+ str = g_strdup(cpu_model);
+ name = strtok(str, ",");
+ oc = cpu_class_by_name(TYPE_SPARC_CPU, name);
+ if (oc == NULL) {
+ g_free(str);
+ return NULL;
+ }
+ g_free(str);
- cpu = SPARC_CPU(object_new(TYPE_SPARC_CPU));
+ cpu = SPARC_CPU(object_new(object_class_get_name(oc)));
if (cpu_sparc_register(cpu, cpu_model) < 0) {
object_unref(OBJECT(cpu));
@@ -553,23 +554,6 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features)
error_report("CPU feature %s not found", flagname);
}
-static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *name)
-{
- unsigned int i;
- const sparc_def_t *def = NULL;
-
- for (i = 0; i < ARRAY_SIZE(sparc_defs); i++) {
- if (strcasecmp(name, sparc_defs[i].name) == 0) {
- def = &sparc_defs[i];
- }
- }
- if (!def) {
- return -1;
- }
- memcpy(cpu_def, def, sizeof(*def));
- return 0;
-}
-
static void sparc_cpu_parse_features(CPUState *cs, char *features,
Error **errp)
{
@@ -796,6 +780,36 @@ static bool sparc_cpu_has_work(CPUState *cs)
cpu_interrupts_enabled(env);
}
+static char *sparc_cpu_type_name(const char *cpu_model)
+{
+ char *name = g_strdup_printf("%s-" TYPE_SPARC_CPU, cpu_model);
+ char *s = name;
+
+ /* SPARC cpu model names happen to have whitespaces,
+ * as type names shouldn't have spaces replace them with '-'
+ */
+ while ((s = strchr(s, ' '))) {
+ *s = '-';
+ }
+
+ return name;
+}
+
+static ObjectClass *sparc_cpu_class_by_name(const char *cpu_model)
+{
+ ObjectClass *oc;
+ char *typename;
+
+ if (cpu_model == NULL) {
+ return NULL;
+ }
+
+ typename = sparc_cpu_type_name(cpu_model);
+ oc = object_class_by_name(typename);
+ g_free(typename);
+ return oc;
+}
+
static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -825,6 +839,7 @@ static void sparc_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
SPARCCPU *cpu = SPARC_CPU(obj);
+ SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(obj);
CPUSPARCState *env = &cpu->env;
cs->env_ptr = env;
@@ -832,6 +847,8 @@ static void sparc_cpu_initfn(Object *obj)
if (tcg_enabled()) {
gen_intermediate_code_init(env);
}
+
+ env->def = g_memdup(scc->cpu_def, sizeof(*scc->cpu_def));
}
static void sparc_cpu_uninitfn(Object *obj)
@@ -854,6 +871,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
scc->parent_reset = cc->reset;
cc->reset = sparc_cpu_reset;
+ cc->class_by_name = sparc_cpu_class_by_name;
cc->has_work = sparc_cpu_has_work;
cc->do_interrupt = sparc_cpu_do_interrupt;
cc->cpu_exec_interrupt = sparc_cpu_exec_interrupt;
@@ -893,9 +911,34 @@ static const TypeInfo sparc_cpu_type_info = {
.class_init = sparc_cpu_class_init,
};
+static void sparc_cpu_cpudef_class_init(ObjectClass *oc, void *data)
+{
+ SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
+ scc->cpu_def = data;
+}
+
+static void sparc_register_cpudef_type(const struct sparc_def_t *def)
+{
+ char *typename = sparc_cpu_type_name(def->name);
+ TypeInfo ti = {
+ .name = typename,
+ .parent = TYPE_SPARC_CPU,
+ .class_init = sparc_cpu_cpudef_class_init,
+ .class_data = (void *)def,
+ };
+
+ type_register(&ti);
+ g_free(typename);
+}
+
static void sparc_cpu_register_types(void)
{
+ int i;
+
type_register_static(&sparc_cpu_type_info);
+ for (i = 0; i < ARRAY_SIZE(sparc_defs); i++) {
+ sparc_register_cpudef_type(&sparc_defs[i]);
+ }
}
type_init(sparc_cpu_register_types)
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 05/28] sparc: embed sparc_def_t into CPUSPARCState
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (3 preceding siblings ...)
2017-07-14 13:51 ` [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses Igor Mammedov
@ 2017-07-14 13:51 ` Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 06/28] sparc: convert cpu features to qdev properties Igor Mammedov
` (22 subsequent siblings)
27 siblings, 0 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Riku Voipio,
Laurent Vivier, Mark Cave-Ayland, Artyom Tarasenko
Make CPUSPARCState::def embedded so it would be allocated as part
of cpu instance and we won't have to worry about cleaning def pointer
up mannualy on cpu destruction.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
Embedded CPUSPARCState::def also needed for follow up patch
to use its fields with static qdev properties.
CC: Riku Voipio <riku.voipio@iki.fi>
CC: Laurent Vivier <laurent@vivier.eu>
CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
CC: Artyom Tarasenko <atar4qemu@gmail.com>
---
linux-user/sparc/target_syscall.h | 2 +-
target/sparc/cpu.h | 8 ++++----
target/sparc/cpu.c | 39 ++++++++++++++++-----------------------
target/sparc/int32_helper.c | 2 +-
target/sparc/int64_helper.c | 2 +-
target/sparc/ldst_helper.c | 14 +++++++-------
target/sparc/mmu_helper.c | 2 +-
target/sparc/translate.c | 2 +-
target/sparc/win_helper.c | 4 ++--
9 files changed, 34 insertions(+), 41 deletions(-)
diff --git a/linux-user/sparc/target_syscall.h b/linux-user/sparc/target_syscall.h
index f97aa6b..5f09abf 100644
--- a/linux-user/sparc/target_syscall.h
+++ b/linux-user/sparc/target_syscall.h
@@ -31,7 +31,7 @@ struct target_pt_regs {
static inline abi_ulong target_shmlba(CPUSPARCState *env)
{
- if (!(env->def->features & CPU_FEATURE_FLUSH)) {
+ if (!(env->def.features & CPU_FEATURE_FLUSH)) {
return 64 * 1024;
} else {
return 256 * 1024;
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 95a36a4..0e41916 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -529,7 +529,7 @@ struct CPUSPARCState {
#define SOFTINT_INTRMASK (0xFFFE)
#define SOFTINT_REG_MASK (SOFTINT_STIMER|SOFTINT_INTRMASK|SOFTINT_TIMER)
#endif
- sparc_def_t *def;
+ sparc_def_t def;
void *irq_manager;
void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno);
@@ -679,7 +679,7 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
#if defined (TARGET_SPARC64)
static inline int cpu_has_hypervisor(CPUSPARCState *env1)
{
- return env1->def->features & CPU_FEATURE_HYPV;
+ return env1->def.features & CPU_FEATURE_HYPV;
}
static inline int cpu_hypervisor_mode(CPUSPARCState *env1)
@@ -788,14 +788,14 @@ static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc,
if (env->pstate & PS_AM) {
flags |= TB_FLAG_AM_ENABLED;
}
- if ((env->def->features & CPU_FEATURE_FLOAT)
+ if ((env->def.features & CPU_FEATURE_FLOAT)
&& (env->pstate & PS_PEF)
&& (env->fprs & FPRS_FEF)) {
flags |= TB_FLAG_FPU_ENABLED;
}
flags |= env->asi << TB_FLAG_ASI_SHIFT;
#else
- if ((env->def->features & CPU_FEATURE_FLOAT) && env->psref) {
+ if ((env->def.features & CPU_FEATURE_FLOAT) && env->psref) {
flags |= TB_FLAG_FPU_ENABLED;
}
#endif
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index f8cf751..110a5cd 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -66,7 +66,7 @@ static void sparc_cpu_reset(CPUState *s)
env->lsu = 0;
#else
env->mmuregs[0] &= ~(MMU_E | MMU_NF);
- env->mmuregs[0] |= env->def->mmu_bm;
+ env->mmuregs[0] |= env->def.mmu_bm;
#endif
env->pc = 0;
env->npc = env->pc + 4;
@@ -120,18 +120,18 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
return -1;
}
- env->version = env->def->iu_version;
- env->fsr = env->def->fpu_version;
- env->nwindows = env->def->nwindows;
+ env->version = env->def.iu_version;
+ env->fsr = env->def.fpu_version;
+ env->nwindows = env->def.nwindows;
#if !defined(TARGET_SPARC64)
- env->mmuregs[0] |= env->def->mmu_version;
+ env->mmuregs[0] |= env->def.mmu_version;
cpu_sparc_set_id(env, 0);
- env->mxccregs[7] |= env->def->mxcc_version;
+ env->mxccregs[7] |= env->def.mxcc_version;
#else
- env->mmu_version = env->def->mmu_version;
- env->maxtl = env->def->maxtl;
- env->version |= env->def->maxtl << 8;
- env->version |= env->def->nwindows - 1;
+ env->mmu_version = env->def.mmu_version;
+ env->maxtl = env->def.maxtl;
+ env->version |= env->def.maxtl << 8;
+ env->version |= env->def.nwindows - 1;
#endif
return 0;
}
@@ -558,7 +558,7 @@ static void sparc_cpu_parse_features(CPUState *cs, char *features,
Error **errp)
{
SPARCCPU *cpu = SPARC_CPU(cs);
- sparc_def_t *cpu_def = cpu->env.def;
+ sparc_def_t *cpu_def = &cpu->env.def;
char *featurestr;
uint32_t plus_features = 0;
uint32_t minus_features = 0;
@@ -819,8 +819,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
SPARCCPU *cpu = SPARC_CPU(dev);
CPUSPARCState *env = &cpu->env;
- if ((env->def->features & CPU_FEATURE_FLOAT)) {
- env->def->features |= CPU_FEATURE_FLOAT128;
+ if ((env->def.features & CPU_FEATURE_FLOAT)) {
+ env->def.features |= CPU_FEATURE_FLOAT128;
}
#endif
@@ -848,15 +848,9 @@ static void sparc_cpu_initfn(Object *obj)
gen_intermediate_code_init(env);
}
- env->def = g_memdup(scc->cpu_def, sizeof(*scc->cpu_def));
-}
-
-static void sparc_cpu_uninitfn(Object *obj)
-{
- SPARCCPU *cpu = SPARC_CPU(obj);
- CPUSPARCState *env = &cpu->env;
-
- g_free(env->def);
+ if (scc->cpu_def) {
+ env->def = *scc->cpu_def;
+ }
}
static void sparc_cpu_class_init(ObjectClass *oc, void *data)
@@ -905,7 +899,6 @@ static const TypeInfo sparc_cpu_type_info = {
.parent = TYPE_CPU,
.instance_size = sizeof(SPARCCPU),
.instance_init = sparc_cpu_initfn,
- .instance_finalize = sparc_cpu_uninitfn,
.abstract = false,
.class_size = sizeof(SPARCCPUClass),
.class_init = sparc_cpu_class_init,
diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c
index eec9a4d..c772492 100644
--- a/target/sparc/int32_helper.c
+++ b/target/sparc/int32_helper.c
@@ -108,7 +108,7 @@ void sparc_cpu_do_interrupt(CPUState *cs)
#if !defined(CONFIG_USER_ONLY)
if (env->psret == 0) {
if (cs->exception_index == 0x80 &&
- env->def->features & CPU_FEATURE_TA0_SHUTDOWN) {
+ env->def.features & CPU_FEATURE_TA0_SHUTDOWN) {
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
} else {
cpu_abort(cs, "Trap 0x%02x while interrupts disabled, Error state",
diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c
index f942973..f3e7f32 100644
--- a/target/sparc/int64_helper.c
+++ b/target/sparc/int64_helper.c
@@ -147,7 +147,7 @@ void sparc_cpu_do_interrupt(CPUState *cs)
}
}
- if (env->def->features & CPU_FEATURE_GL) {
+ if (env->def.features & CPU_FEATURE_GL) {
tsptr->tstate |= (env->gl & 7ULL) << 40;
cpu_gl_switch_gregs(env, env->gl + 1);
env->gl++;
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 57968d9..fb489cb 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -513,7 +513,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
case 0x00: /* Leon3 Cache Control */
case 0x08: /* Leon3 Instruction Cache config */
case 0x0C: /* Leon3 Date Cache config */
- if (env->def->features & CPU_FEATURE_CACHE_CTRL) {
+ if (env->def.features & CPU_FEATURE_CACHE_CTRL) {
ret = leon3_cache_control_ld(env, addr, size);
}
break;
@@ -736,7 +736,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,
case 0x00: /* Leon3 Cache Control */
case 0x08: /* Leon3 Instruction Cache config */
case 0x0C: /* Leon3 Date Cache config */
- if (env->def->features & CPU_FEATURE_CACHE_CTRL) {
+ if (env->def.features & CPU_FEATURE_CACHE_CTRL) {
leon3_cache_control_st(env, addr, val, size);
}
break;
@@ -904,15 +904,15 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,
/* Mappings generated during no-fault mode
are invalid in normal mode. */
if ((oldreg ^ env->mmuregs[reg])
- & (MMU_NF | env->def->mmu_bm)) {
+ & (MMU_NF | env->def.mmu_bm)) {
tlb_flush(CPU(cpu));
}
break;
case 1: /* Context Table Pointer Register */
- env->mmuregs[reg] = val & env->def->mmu_ctpr_mask;
+ env->mmuregs[reg] = val & env->def.mmu_ctpr_mask;
break;
case 2: /* Context Register */
- env->mmuregs[reg] = val & env->def->mmu_cxr_mask;
+ env->mmuregs[reg] = val & env->def.mmu_cxr_mask;
if (oldreg != env->mmuregs[reg]) {
/* we flush when the MMU context changes because
QEMU has no MMU context support */
@@ -923,11 +923,11 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,
case 4: /* Synchronous Fault Address Register */
break;
case 0x10: /* TLB Replacement Control Register */
- env->mmuregs[reg] = val & env->def->mmu_trcr_mask;
+ env->mmuregs[reg] = val & env->def.mmu_trcr_mask;
break;
case 0x13: /* Synchronous Fault Status Register with Read
and Clear */
- env->mmuregs[3] = val & env->def->mmu_sfsr_mask;
+ env->mmuregs[3] = val & env->def.mmu_sfsr_mask;
break;
case 0x14: /* Synchronous Fault Address Register */
env->mmuregs[4] = val;
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 8b4664d..126ea5e 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -95,7 +95,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
if (mmu_idx == MMU_PHYS_IDX) {
*page_size = TARGET_PAGE_SIZE;
/* Boot mode: instruction fetches are taken from PROM */
- if (rw == 2 && (env->mmuregs[0] & env->def->mmu_bm)) {
+ if (rw == 2 && (env->mmuregs[0] & env->def.mmu_bm)) {
*physical = env->prom_addr | (address & 0x7ffffULL);
*prot = PAGE_READ | PAGE_EXEC;
return 0;
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index aa6734d..5641931 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -5765,7 +5765,7 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
dc->npc = (target_ulong) tb->cs_base;
dc->cc_op = CC_OP_DYNAMIC;
dc->mem_idx = tb->flags & TB_FLAG_MMU_MASK;
- dc->def = env->def;
+ dc->def = &env->def;
dc->fpu_enabled = tb_fpu_enabled(tb->flags);
dc->address_mask_32bit = tb_am_enabled(tb->flags);
dc->singlestep = (cs->singlestep_enabled || singlestep);
diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
index 154279e..8290a21 100644
--- a/target/sparc/win_helper.c
+++ b/target/sparc/win_helper.c
@@ -295,7 +295,7 @@ void helper_wrcwp(CPUSPARCState *env, target_ulong new_cwp)
static inline uint64_t *get_gregset(CPUSPARCState *env, uint32_t pstate)
{
- if (env->def->features & CPU_FEATURE_GL) {
+ if (env->def.features & CPU_FEATURE_GL) {
return env->glregs + (env->gl & 7) * 8;
}
@@ -343,7 +343,7 @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate)
uint32_t pstate_regs, new_pstate_regs;
uint64_t *src, *dst;
- if (env->def->features & CPU_FEATURE_GL) {
+ if (env->def.features & CPU_FEATURE_GL) {
/* PS_AG, IG and MG are not implemented in this case */
new_pstate &= ~(PS_AG | PS_IG | PS_MG);
env->pstate = new_pstate;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 06/28] sparc: convert cpu features to qdev properties
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (4 preceding siblings ...)
2017-07-14 13:51 ` [Qemu-devel] [PATCH 05/28] sparc: embed sparc_def_t into CPUSPARCState Igor Mammedov
@ 2017-07-14 13:51 ` Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 07/28] sparc: move adhoc CPUSPARCState initialization to realize time Igor Mammedov
` (21 subsequent siblings)
27 siblings, 0 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Mark Cave-Ayland, Artyom Tarasenko
SPARC is the last target that uses legacy way of parsing
and initializing cpu features, drop legacy approach and
convert features to properties so that SPARC could as minimum
benefit from generic cpu_generic_init(), common with
x86 +-feat parser
PS:
the main purpose is to remove legacy way of cpu creation as
a blocker for unifying cpu creation code across targets.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
CC: Artyom Tarasenko <atar4qemu@gmail.com>
---
target/sparc/cpu.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 110a5cd..cc89abc 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -22,6 +22,8 @@
#include "cpu.h"
#include "qemu/error-report.h"
#include "exec/exec-all.h"
+#include "hw/qdev-properties.h"
+#include "qapi/visitor.h"
//#define DEBUG_FEATURES
@@ -853,6 +855,69 @@ static void sparc_cpu_initfn(Object *obj)
}
}
+static void sparc_get_nwindows(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ SPARCCPU *cpu = SPARC_CPU(obj);
+ int64_t value = cpu->env.def.nwindows;
+
+ visit_type_int(v, name, &value, errp);
+}
+
+static void sparc_set_nwindows(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ const int64_t min = MIN_NWINDOWS;
+ const int64_t max = MAX_NWINDOWS;
+ SPARCCPU *cpu = SPARC_CPU(obj);
+ Error *err = NULL;
+ int64_t value;
+
+ visit_type_int(v, name, &value, &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
+ if (value < min || value > max) {
+ error_setg(errp, "Property %s.%s doesn't take value %" PRId64
+ " (minimum: %" PRId64 ", maximum: %" PRId64 ")",
+ object_get_typename(obj), name ? name : "null",
+ value, min, max);
+ return;
+ }
+ cpu->env.def.nwindows = value;
+}
+
+static PropertyInfo qdev_prop_nwindows = {
+ .name = "int",
+ .get = sparc_get_nwindows,
+ .set = sparc_set_nwindows,
+};
+
+static Property sparc_cpu_properties[] = {
+ DEFINE_PROP_BIT("float", SPARCCPU, env.def.features, 0, false),
+ DEFINE_PROP_BIT("float128", SPARCCPU, env.def.features, 1, false),
+ DEFINE_PROP_BIT("swap", SPARCCPU, env.def.features, 2, false),
+ DEFINE_PROP_BIT("mul", SPARCCPU, env.def.features, 3, false),
+ DEFINE_PROP_BIT("div", SPARCCPU, env.def.features, 4, false),
+ DEFINE_PROP_BIT("flush", SPARCCPU, env.def.features, 5, false),
+ DEFINE_PROP_BIT("fsqrt", SPARCCPU, env.def.features, 6, false),
+ DEFINE_PROP_BIT("fmul", SPARCCPU, env.def.features, 7, false),
+ DEFINE_PROP_BIT("vis1", SPARCCPU, env.def.features, 8, false),
+ DEFINE_PROP_BIT("vis2", SPARCCPU, env.def.features, 9, false),
+ DEFINE_PROP_BIT("fsmuld", SPARCCPU, env.def.features, 10, false),
+ DEFINE_PROP_BIT("hypv", SPARCCPU, env.def.features, 11, false),
+ DEFINE_PROP_BIT("cmt", SPARCCPU, env.def.features, 12, false),
+ DEFINE_PROP_BIT("gl", SPARCCPU, env.def.features, 13, false),
+ DEFINE_PROP_UNSIGNED("iu-version", SPARCCPU, env.def.iu_version, 0,
+ qdev_prop_uint64, target_ulong),
+ DEFINE_PROP_UINT32("fpu-version", SPARCCPU, env.def.fpu_version, 0),
+ DEFINE_PROP_UINT32("mmu-version", SPARCCPU, env.def.mmu_version, 0),
+ { .name = "nwindows", .info = &qdev_prop_nwindows },
+ DEFINE_PROP_END_OF_LIST()
+};
+
static void sparc_cpu_class_init(ObjectClass *oc, void *data)
{
SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
@@ -861,6 +926,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
scc->parent_realize = dc->realize;
dc->realize = sparc_cpu_realizefn;
+ dc->props = sparc_cpu_properties;
scc->parent_reset = cc->reset;
cc->reset = sparc_cpu_reset;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 07/28] sparc: move adhoc CPUSPARCState initialization to realize time
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (5 preceding siblings ...)
2017-07-14 13:51 ` [Qemu-devel] [PATCH 06/28] sparc: convert cpu features to qdev properties Igor Mammedov
@ 2017-07-14 13:51 ` Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 08/28] x86: extract legacy cpu features format parser Igor Mammedov
` (20 subsequent siblings)
27 siblings, 0 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Mark Cave-Ayland, Artyom Tarasenko
SPARCCPU::env was initialized from previosuly set properties
(with help of sparc_cpu_parse_features) in cpu_sparc_register().
However there is not reason to keep it there as this task is
typically done at realize time. So move post properties
initialization into sparc_cpu_realizefn, which brings
cpu_sparc_init() closer to cpu_generic_init().
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
CC: Artyom Tarasenko <atar4qemu@gmail.com>
---
target/sparc/cpu.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index cc89abc..cb13540 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -109,7 +109,6 @@ static void sparc_cpu_parse_features(CPUState *cs, char *features,
static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
{
- CPUSPARCState *env = &cpu->env;
char *s = g_strdup(cpu_model);
char *featurestr = strtok(s, ",");
Error *err = NULL;
@@ -122,19 +121,6 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
return -1;
}
- env->version = env->def.iu_version;
- env->fsr = env->def.fpu_version;
- env->nwindows = env->def.nwindows;
-#if !defined(TARGET_SPARC64)
- env->mmuregs[0] |= env->def.mmu_version;
- cpu_sparc_set_id(env, 0);
- env->mxccregs[7] |= env->def.mxcc_version;
-#else
- env->mmu_version = env->def.mmu_version;
- env->maxtl = env->def.maxtl;
- env->version |= env->def.maxtl << 8;
- env->version |= env->def.nwindows - 1;
-#endif
return 0;
}
@@ -817,15 +803,29 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
CPUState *cs = CPU(dev);
SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
Error *local_err = NULL;
-#if defined(CONFIG_USER_ONLY)
SPARCCPU *cpu = SPARC_CPU(dev);
CPUSPARCState *env = &cpu->env;
+#if defined(CONFIG_USER_ONLY)
if ((env->def.features & CPU_FEATURE_FLOAT)) {
env->def.features |= CPU_FEATURE_FLOAT128;
}
#endif
+ env->version = env->def.iu_version;
+ env->fsr = env->def.fpu_version;
+ env->nwindows = env->def.nwindows;
+#if !defined(TARGET_SPARC64)
+ env->mmuregs[0] |= env->def.mmu_version;
+ cpu_sparc_set_id(env, 0);
+ env->mxccregs[7] |= env->def.mxcc_version;
+#else
+ env->mmu_version = env->def.mmu_version;
+ env->maxtl = env->def.maxtl;
+ env->version |= env->def.maxtl << 8;
+ env->version |= env->def.nwindows - 1;
+#endif
+
cpu_exec_realizefn(cs, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 08/28] x86: extract legacy cpu features format parser
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (6 preceding siblings ...)
2017-07-14 13:51 ` [Qemu-devel] [PATCH 07/28] sparc: move adhoc CPUSPARCState initialization to realize time Igor Mammedov
@ 2017-07-14 13:51 ` Igor Mammedov
2017-08-16 19:32 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 09/28] sparc: replace custom cpu feature parsing with cpu_legacy_parse_featurestr() Igor Mammedov
` (19 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:51 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Riku Voipio,
Laurent Vivier, Paolo Bonzini, Richard Henderson
Move cpu_model +-feat parsing into a separate file so that it
could be reused later for parsing similar format of sparc target
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Riku Voipio <riku.voipio@iki.fi>
CC: Laurent Vivier <laurent@vivier.eu>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Richard Henderson <rth@twiddle.net>
CC: Eduardo Habkost <ehabkost@redhat.com>
---
include/qom/cpu.h | 6 ++
default-configs/i386-bsd-user.mak | 1 +
default-configs/i386-linux-user.mak | 1 +
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-bsd-user.mak | 1 +
default-configs/x86_64-linux-user.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
target/i386/cpu.c | 124 ++-------------------------
util/Makefile.objs | 1 +
util/legacy_cpu_features_parser.c | 153 ++++++++++++++++++++++++++++++++++
10 files changed, 172 insertions(+), 118 deletions(-)
create mode 100644 util/legacy_cpu_features_parser.c
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 7bfd50c..60aea03 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -1039,4 +1039,10 @@ extern const struct VMStateDescription vmstate_cpu_common;
#define UNASSIGNED_CPU_INDEX -1
+int cpu_legacy_apply_features(Object *obj, GList *features, bool enable,
+ Error **errp);
+
+void cpu_legacy_parse_featurestr(const char *typename, char *features,
+ GList **plus_features, GList **minus_features,
+ Error **errp);
#endif
diff --git a/default-configs/i386-bsd-user.mak b/default-configs/i386-bsd-user.mak
index af1b31a..b28a05f 100644
--- a/default-configs/i386-bsd-user.mak
+++ b/default-configs/i386-bsd-user.mak
@@ -1 +1,2 @@
# Default configuration for i386-bsd-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/i386-linux-user.mak b/default-configs/i386-linux-user.mak
index 8657e68..c136967 100644
--- a/default-configs/i386-linux-user.mak
+++ b/default-configs/i386-linux-user.mak
@@ -1 +1,2 @@
# Default configuration for i386-linux-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index d2ab2f6..e3e7c0e 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -59,3 +59,4 @@ CONFIG_SMBIOS=y
CONFIG_HYPERV_TESTDEV=$(CONFIG_KVM)
CONFIG_PXB=y
CONFIG_ACPI_VMGENID=y
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/x86_64-bsd-user.mak b/default-configs/x86_64-bsd-user.mak
index 73e5d34..952323c 100644
--- a/default-configs/x86_64-bsd-user.mak
+++ b/default-configs/x86_64-bsd-user.mak
@@ -1 +1,2 @@
# Default configuration for x86_64-bsd-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/x86_64-linux-user.mak b/default-configs/x86_64-linux-user.mak
index bec1d9e..b513ef2 100644
--- a/default-configs/x86_64-linux-user.mak
+++ b/default-configs/x86_64-linux-user.mak
@@ -1 +1,2 @@
# Default configuration for x86_64-linux-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 9bde2f1..6594ddf 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -59,3 +59,4 @@ CONFIG_SMBIOS=y
CONFIG_HYPERV_TESTDEV=$(CONFIG_KVM)
CONFIG_PXB=y
CONFIG_ACPI_VMGENID=y
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c571772..91d3684 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -17,7 +17,6 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
-#include "qemu/cutils.h"
#include "cpu.h"
#include "exec/exec-all.h"
@@ -1970,13 +1969,6 @@ static PropertyInfo qdev_prop_spinlocks = {
/* Convert all '_' in a feature string option name to '-', to make feature
* name conform to QOM property naming rule, which uses '-' instead of '_'.
*/
-static inline void feat2prop(char *s)
-{
- while ((s = strchr(s, '_'))) {
- *s = '-';
- }
-}
-
/* Return the feature property name for a feature flag bit */
static const char *x86_cpu_feature_name(FeatureWord w, int bitnr)
{
@@ -2005,100 +1997,11 @@ static const char *x86_cpu_feature_name(FeatureWord w, int bitnr)
*/
static GList *plus_features, *minus_features;
-static gint compare_string(gconstpointer a, gconstpointer b)
-{
- return g_strcmp0(a, b);
-}
-
-/* Parse "+feature,-feature,feature=foo" CPU feature string
- */
static void x86_cpu_parse_featurestr(const char *typename, char *features,
Error **errp)
{
- char *featurestr; /* Single 'key=value" string being parsed */
- static bool cpu_globals_initialized;
- bool ambiguous = false;
-
- if (cpu_globals_initialized) {
- return;
- }
- cpu_globals_initialized = true;
-
- if (!features) {
- return;
- }
-
- for (featurestr = strtok(features, ",");
- featurestr;
- featurestr = strtok(NULL, ",")) {
- const char *name;
- const char *val = NULL;
- char *eq = NULL;
- char num[32];
- GlobalProperty *prop;
-
- /* Compatibility syntax: */
- if (featurestr[0] == '+') {
- plus_features = g_list_append(plus_features,
- g_strdup(featurestr + 1));
- continue;
- } else if (featurestr[0] == '-') {
- minus_features = g_list_append(minus_features,
- g_strdup(featurestr + 1));
- continue;
- }
-
- eq = strchr(featurestr, '=');
- if (eq) {
- *eq++ = 0;
- val = eq;
- } else {
- val = "on";
- }
-
- feat2prop(featurestr);
- name = featurestr;
-
- if (g_list_find_custom(plus_features, name, compare_string)) {
- error_report("warning: Ambiguous CPU model string. "
- "Don't mix both \"+%s\" and \"%s=%s\"",
- name, name, val);
- ambiguous = true;
- }
- if (g_list_find_custom(minus_features, name, compare_string)) {
- error_report("warning: Ambiguous CPU model string. "
- "Don't mix both \"-%s\" and \"%s=%s\"",
- name, name, val);
- ambiguous = true;
- }
-
- /* Special case: */
- if (!strcmp(name, "tsc-freq")) {
- int ret;
- uint64_t tsc_freq;
-
- ret = qemu_strtosz_metric(val, NULL, &tsc_freq);
- if (ret < 0 || tsc_freq > INT64_MAX) {
- error_setg(errp, "bad numerical value %s", val);
- return;
- }
- snprintf(num, sizeof(num), "%" PRId64, tsc_freq);
- val = num;
- name = "tsc-frequency";
- }
-
- prop = g_new0(typeof(*prop), 1);
- prop->driver = typename;
- prop->property = g_strdup(name);
- prop->value = g_strdup(val);
- prop->errp = &error_fatal;
- qdev_prop_register_global(prop);
- }
-
- if (ambiguous) {
- error_report("warning: Compatibility of ambiguous CPU model "
- "strings won't be kept on future QEMU versions");
- }
+ cpu_legacy_parse_featurestr(typename, features,
+ &plus_features, &minus_features, errp);
}
static void x86_cpu_expand_features(X86CPU *cpu, Error **errp);
@@ -3370,8 +3273,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
{
CPUX86State *env = &cpu->env;
FeatureWord w;
- GList *l;
- Error *local_err = NULL;
/*TODO: Now cpu->max_features doesn't overwrite features
* set using QOM properties, and we can convert
@@ -3389,20 +3290,12 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
}
}
- for (l = plus_features; l; l = l->next) {
- const char *prop = l->data;
- object_property_set_bool(OBJECT(cpu), true, prop, &local_err);
- if (local_err) {
- goto out;
- }
+ if (cpu_legacy_apply_features(OBJECT(cpu), plus_features, true, errp)) {
+ return;
}
- for (l = minus_features; l; l = l->next) {
- const char *prop = l->data;
- object_property_set_bool(OBJECT(cpu), false, prop, &local_err);
- if (local_err) {
- goto out;
- }
+ if (cpu_legacy_apply_features(OBJECT(cpu), minus_features, false, errp)) {
+ return;
}
if (!kvm_enabled() || !cpu->expose_kvm) {
@@ -3440,11 +3333,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
if (env->cpuid_xlevel2 == UINT32_MAX) {
env->cpuid_xlevel2 = env->cpuid_min_xlevel2;
}
-
-out:
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- }
}
/*
diff --git a/util/Makefile.objs b/util/Makefile.objs
index 50a55ec..14e28f7 100644
--- a/util/Makefile.objs
+++ b/util/Makefile.objs
@@ -45,3 +45,4 @@ util-obj-y += qht.o
util-obj-y += range.o
util-obj-y += stats64.o
util-obj-y += systemd.o
+util-obj-$(CONFIG_LEGACY_CPU_FEATURES) += legacy_cpu_features_parser.o
diff --git a/util/legacy_cpu_features_parser.c b/util/legacy_cpu_features_parser.c
new file mode 100644
index 0000000..f2e3b81
--- /dev/null
+++ b/util/legacy_cpu_features_parser.c
@@ -0,0 +1,153 @@
+/* Support for legacy -cpu cpu,features CLI option with +-feat syntax,
+ * used by x86/sparc targets
+ *
+ * Author: Andreas Färber <afaerber@suse.de>
+ * Author: Andre Przywara <andre.przywara@amd.com>
+ * Author: Eduardo Habkost <ehabkost@redhat.com>
+ * Author: Igor Mammedov <imammedo@redhat.com>
+ * Author: Paolo Bonzini <pbonzini@redhat.com>
+ * Author: Markus Armbruster <armbru@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu/cutils.h"
+#include "qom/cpu.h"
+#include "qemu/error-report.h"
+#include "hw/qdev-properties.h"
+
+/* DO NOT USE WITH NEW CODE */
+int cpu_legacy_apply_features(Object *obj, GList *features, bool enable,
+ Error **errp)
+{
+ GList *l;
+ Error *local_err = NULL;
+
+ for (l = features; l; l = l->next) {
+ const char *prop = l->data;
+ object_property_set_bool(obj, enable, prop, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return 1;
+ }
+ }
+ return 0;
+}
+
+static inline void feat2prop(char *s)
+{
+ while ((s = strchr(s, '_'))) {
+ *s = '-';
+ }
+}
+
+static gint compare_string(gconstpointer a, gconstpointer b)
+{
+ return g_strcmp0(a, b);
+}
+
+/* DO NOT USE WITH NEW CODE
+ * Parse "+feature,-feature,feature=foo" CPU feature string
+ */
+void cpu_legacy_parse_featurestr(const char *typename, char *features,
+ GList **plus_features, GList **minus_features,
+ Error **errp)
+{
+ char *featurestr; /* Single 'key=value" string being parsed */
+ static bool cpu_globals_initialized;
+ bool ambiguous = false;
+
+ if (cpu_globals_initialized) {
+ return;
+ }
+ cpu_globals_initialized = true;
+
+ if (!features) {
+ return;
+ }
+
+ for (featurestr = strtok(features, ",");
+ featurestr;
+ featurestr = strtok(NULL, ",")) {
+ const char *name;
+ const char *val = NULL;
+ char *eq = NULL;
+ char num[32];
+ GlobalProperty *prop;
+
+ /* Compatibility syntax: */
+ if (featurestr[0] == '+') {
+ *plus_features = g_list_append(*plus_features,
+ g_strdup(featurestr + 1));
+ continue;
+ } else if (featurestr[0] == '-') {
+ *minus_features = g_list_append(*minus_features,
+ g_strdup(featurestr + 1));
+ continue;
+ }
+
+ eq = strchr(featurestr, '=');
+ if (eq) {
+ *eq++ = 0;
+ val = eq;
+ } else {
+ val = "on";
+ }
+
+ feat2prop(featurestr);
+ name = featurestr;
+
+ if (g_list_find_custom(*plus_features, name, compare_string)) {
+ error_report("warning: Ambiguous CPU model string. "
+ "Don't mix both \"+%s\" and \"%s=%s\"",
+ name, name, val);
+ ambiguous = true;
+ }
+ if (g_list_find_custom(*minus_features, name, compare_string)) {
+ error_report("warning: Ambiguous CPU model string. "
+ "Don't mix both \"-%s\" and \"%s=%s\"",
+ name, name, val);
+ ambiguous = true;
+ }
+
+ /* Special case: */
+ if (!strcmp(name, "tsc-freq")) {
+ int ret;
+ uint64_t tsc_freq;
+
+ ret = qemu_strtosz_metric(val, NULL, &tsc_freq);
+ if (ret < 0 || tsc_freq > INT64_MAX) {
+ error_setg(errp, "bad numerical value %s", val);
+ return;
+ }
+ snprintf(num, sizeof(num), "%" PRId64, tsc_freq);
+ val = num;
+ name = "tsc-frequency";
+ }
+
+ prop = g_new0(typeof(*prop), 1);
+ prop->driver = typename;
+ prop->property = g_strdup(name);
+ prop->value = g_strdup(val);
+ prop->errp = &error_fatal;
+ qdev_prop_register_global(prop);
+ }
+
+ if (ambiguous) {
+ error_report("warning: Compatibility of ambiguous CPU model "
+ "strings won't be kept on future QEMU versions");
+ }
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 09/28] sparc: replace custom cpu feature parsing with cpu_legacy_parse_featurestr()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (7 preceding siblings ...)
2017-07-14 13:51 ` [Qemu-devel] [PATCH 08/28] x86: extract legacy cpu features format parser Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-14 13:52 ` [Qemu-devel] [PATCH 10/28] sparc: replace cpu_sparc_init() with cpu_generic_init() Igor Mammedov
` (18 subsequent siblings)
27 siblings, 0 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Riku Voipio,
Laurent Vivier, Mark Cave-Ayland, Artyom Tarasenko
with features converted to properties we can reuse shared
with x86 cpu_legacy_parse_featurestr() for features parsing
and drop legacy parser that manipulated CPU directly.
With that in place and sparc_cpu_parse_features() providing
generic CPUClass::parse_features callback, the cpu_sparc_init()
will do the same job as cpu_generic_init() so replace content
of cpu_sparc_init() with it.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Riku Voipio <riku.voipio@iki.fi>
CC: Laurent Vivier <laurent@vivier.eu>
CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
CC: Artyom Tarasenko <atar4qemu@gmail.com>
---
default-configs/sparc-bsd-user.mak | 1 +
default-configs/sparc-linux-user.mak | 1 +
default-configs/sparc-softmmu.mak | 1 +
default-configs/sparc32plus-linux-user.mak | 1 +
default-configs/sparc64-bsd-user.mak | 1 +
default-configs/sparc64-linux-user.mak | 1 +
default-configs/sparc64-softmmu.mak | 1 +
target/sparc/cpu.c | 160 ++++-------------------------
8 files changed, 27 insertions(+), 140 deletions(-)
diff --git a/default-configs/sparc-bsd-user.mak b/default-configs/sparc-bsd-user.mak
index 21e0950..caea9ea 100644
--- a/default-configs/sparc-bsd-user.mak
+++ b/default-configs/sparc-bsd-user.mak
@@ -1 +1,2 @@
# Default configuration for sparc-bsd-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/sparc-linux-user.mak b/default-configs/sparc-linux-user.mak
index 9c716d1..0f23504 100644
--- a/default-configs/sparc-linux-user.mak
+++ b/default-configs/sparc-linux-user.mak
@@ -1 +1,2 @@
# Default configuration for sparc-linux-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/sparc-softmmu.mak b/default-configs/sparc-softmmu.mak
index 004b0f4..d8fa9fd 100644
--- a/default-configs/sparc-softmmu.mak
+++ b/default-configs/sparc-softmmu.mak
@@ -18,3 +18,4 @@ CONFIG_GRLIB=y
CONFIG_STP2000=y
CONFIG_ECCMEMCTL=y
CONFIG_SUN4M=y
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/sparc32plus-linux-user.mak b/default-configs/sparc32plus-linux-user.mak
index 432e880..e3cc16b 100644
--- a/default-configs/sparc32plus-linux-user.mak
+++ b/default-configs/sparc32plus-linux-user.mak
@@ -1 +1,2 @@
# Default configuration for sparc32plus-linux-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/sparc64-bsd-user.mak b/default-configs/sparc64-bsd-user.mak
index b8b9eea..25bfa1f 100644
--- a/default-configs/sparc64-bsd-user.mak
+++ b/default-configs/sparc64-bsd-user.mak
@@ -1 +1,2 @@
# Default configuration for sparc64-bsd-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/sparc64-linux-user.mak b/default-configs/sparc64-linux-user.mak
index bf1bdd6..7c8a9f0 100644
--- a/default-configs/sparc64-linux-user.mak
+++ b/default-configs/sparc64-linux-user.mak
@@ -1 +1,2 @@
# Default configuration for sparc64-linux-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/sparc64-softmmu.mak b/default-configs/sparc64-softmmu.mak
index d07876a..658546a 100644
--- a/default-configs/sparc64-softmmu.mak
+++ b/default-configs/sparc64-softmmu.mak
@@ -16,3 +16,4 @@ CONFIG_MC146818RTC=y
CONFIG_ISA_TESTDEV=y
CONFIG_EMPTY_SLOT=y
CONFIG_SUN4V_RTC=y
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index cb13540..1271b7f 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -104,51 +104,23 @@ static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info)
#endif
}
-static void sparc_cpu_parse_features(CPUState *cs, char *features,
- Error **errp);
+/* Compatibily hack to maintain legacy +-feat semantic,
+ * where +-feat overwrites any feature set by
+ * feat=on|feat even if the later is parsed after +-feat
+ * (i.e. "-float,float=on" will result in "float" disabled)
+ */
+static GList *plus_features, *minus_features;
-static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
+static void sparc_cpu_parse_features(const char *typename, char *features,
+ Error **errp)
{
- char *s = g_strdup(cpu_model);
- char *featurestr = strtok(s, ",");
- Error *err = NULL;
-
- featurestr = strtok(NULL, ",");
- sparc_cpu_parse_features(CPU(cpu), featurestr, &err);
- g_free(s);
- if (err) {
- error_report_err(err);
- return -1;
- }
-
- return 0;
+ cpu_legacy_parse_featurestr(typename, features,
+ &plus_features, &minus_features, errp);
}
SPARCCPU *cpu_sparc_init(const char *cpu_model)
{
- SPARCCPU *cpu;
- ObjectClass *oc;
- char *str, *name;
-
- str = g_strdup(cpu_model);
- name = strtok(str, ",");
- oc = cpu_class_by_name(TYPE_SPARC_CPU, name);
- if (oc == NULL) {
- g_free(str);
- return NULL;
- }
- g_free(str);
-
- cpu = SPARC_CPU(object_new(object_class_get_name(oc)));
-
- if (cpu_sparc_register(cpu, cpu_model) < 0) {
- object_unref(OBJECT(cpu));
- return NULL;
- }
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
+ return SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
}
void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu)
@@ -529,107 +501,6 @@ static void print_features(FILE *f, fprintf_function cpu_fprintf,
}
}
-static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features)
-{
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(feature_name); i++) {
- if (feature_name[i] && !strcmp(flagname, feature_name[i])) {
- *features |= 1 << i;
- return;
- }
- }
- error_report("CPU feature %s not found", flagname);
-}
-
-static void sparc_cpu_parse_features(CPUState *cs, char *features,
- Error **errp)
-{
- SPARCCPU *cpu = SPARC_CPU(cs);
- sparc_def_t *cpu_def = &cpu->env.def;
- char *featurestr;
- uint32_t plus_features = 0;
- uint32_t minus_features = 0;
- uint64_t iu_version;
- uint32_t fpu_version, mmu_version, nwindows;
-
- featurestr = features ? strtok(features, ",") : NULL;
- while (featurestr) {
- char *val;
-
- if (featurestr[0] == '+') {
- add_flagname_to_bitmaps(featurestr + 1, &plus_features);
- } else if (featurestr[0] == '-') {
- add_flagname_to_bitmaps(featurestr + 1, &minus_features);
- } else if ((val = strchr(featurestr, '='))) {
- *val = 0; val++;
- if (!strcmp(featurestr, "iu_version")) {
- char *err;
-
- iu_version = strtoll(val, &err, 0);
- if (!*val || *err) {
- error_setg(errp, "bad numerical value %s", val);
- return;
- }
- cpu_def->iu_version = iu_version;
-#ifdef DEBUG_FEATURES
- fprintf(stderr, "iu_version %" PRIx64 "\n", iu_version);
-#endif
- } else if (!strcmp(featurestr, "fpu_version")) {
- char *err;
-
- fpu_version = strtol(val, &err, 0);
- if (!*val || *err) {
- error_setg(errp, "bad numerical value %s", val);
- return;
- }
- cpu_def->fpu_version = fpu_version;
-#ifdef DEBUG_FEATURES
- fprintf(stderr, "fpu_version %x\n", fpu_version);
-#endif
- } else if (!strcmp(featurestr, "mmu_version")) {
- char *err;
-
- mmu_version = strtol(val, &err, 0);
- if (!*val || *err) {
- error_setg(errp, "bad numerical value %s", val);
- return;
- }
- cpu_def->mmu_version = mmu_version;
-#ifdef DEBUG_FEATURES
- fprintf(stderr, "mmu_version %x\n", mmu_version);
-#endif
- } else if (!strcmp(featurestr, "nwindows")) {
- char *err;
-
- nwindows = strtol(val, &err, 0);
- if (!*val || *err || nwindows > MAX_NWINDOWS ||
- nwindows < MIN_NWINDOWS) {
- error_setg(errp, "bad numerical value %s", val);
- return;
- }
- cpu_def->nwindows = nwindows;
-#ifdef DEBUG_FEATURES
- fprintf(stderr, "nwindows %d\n", nwindows);
-#endif
- } else {
- error_setg(errp, "unrecognized feature %s", featurestr);
- return;
- }
- } else {
- error_setg(errp, "feature string `%s' not in format "
- "(+feature|-feature|feature=xyz)", featurestr);
- return;
- }
- featurestr = strtok(NULL, ",");
- }
- cpu_def->features |= plus_features;
- cpu_def->features &= ~minus_features;
-#ifdef DEBUG_FEATURES
- print_features(stderr, fprintf, cpu_def->features, NULL);
-#endif
-}
-
void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
unsigned int i;
@@ -806,6 +677,14 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
SPARCCPU *cpu = SPARC_CPU(dev);
CPUSPARCState *env = &cpu->env;
+ if (cpu_legacy_apply_features(OBJECT(cpu), plus_features, true, errp)) {
+ return;
+ }
+
+ if (cpu_legacy_apply_features(OBJECT(cpu), minus_features, false, errp)) {
+ return;
+ }
+
#if defined(CONFIG_USER_ONLY)
if ((env->def.features & CPU_FEATURE_FLOAT)) {
env->def.features |= CPU_FEATURE_FLOAT128;
@@ -932,6 +811,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
cc->reset = sparc_cpu_reset;
cc->class_by_name = sparc_cpu_class_by_name;
+ cc->parse_features = sparc_cpu_parse_features;
cc->has_work = sparc_cpu_has_work;
cc->do_interrupt = sparc_cpu_do_interrupt;
cc->cpu_exec_interrupt = sparc_cpu_exec_interrupt;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 10/28] sparc: replace cpu_sparc_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (8 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 09/28] sparc: replace custom cpu feature parsing with cpu_legacy_parse_featurestr() Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-14 13:52 ` [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() " Igor Mammedov
` (17 subsequent siblings)
27 siblings, 0 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Fabien Chouteau, Mark Cave-Ayland, Artyom Tarasenko
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Fabien Chouteau <chouteau@adacore.com>
CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
CC: Artyom Tarasenko <atar4qemu@gmail.com>
---
target/sparc/cpu.h | 3 +--
hw/sparc/leon3.c | 2 +-
hw/sparc/sun4m.c | 2 +-
hw/sparc64/sparc64.c | 2 +-
target/sparc/cpu.c | 5 -----
5 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 0e41916..b45cfb4 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -579,7 +579,6 @@ void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t) QEMU_NORETURN;
#ifndef NO_CPU_IO_DEFS
/* cpu_init.c */
-SPARCCPU *cpu_sparc_init(const char *cpu_model);
void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu);
void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf);
/* mmu_helper.c */
@@ -656,7 +655,7 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
#ifndef NO_CPU_IO_DEFS
-#define cpu_init(cpu_model) CPU(cpu_sparc_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_SPARC_CPU, cpu_model)
#endif
#define cpu_signal_handler cpu_sparc_signal_handler
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index f415997..fb4faee 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -126,7 +126,7 @@ static void leon3_generic_hw_init(MachineState *machine)
cpu_model = "LEON3";
}
- cpu = cpu_sparc_init(cpu_model);
+ cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
exit(1);
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 0faff46..74b3534 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -797,7 +797,7 @@ static void cpu_devinit(const char *cpu_model, unsigned int id,
SPARCCPU *cpu;
CPUSPARCState *env;
- cpu = cpu_sparc_init(cpu_model);
+ cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
exit(1);
diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c
index 4e4fdab..ecf38a4 100644
--- a/hw/sparc64/sparc64.c
+++ b/hw/sparc64/sparc64.c
@@ -353,7 +353,7 @@ SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
if (cpu_model == NULL) {
cpu_model = default_cpu_model;
}
- cpu = cpu_sparc_init(cpu_model);
+ cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find Sparc CPU definition\n");
exit(1);
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 1271b7f..722bd48 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -118,11 +118,6 @@ static void sparc_cpu_parse_features(const char *typename, char *features,
&plus_features, &minus_features, errp);
}
-SPARCCPU *cpu_sparc_init(const char *cpu_model)
-{
- return SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
-}
-
void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu)
{
#if !defined(TARGET_SPARC64)
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (9 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 10/28] sparc: replace cpu_sparc_init() with cpu_generic_init() Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-18 12:30 ` Cornelia Huck
2017-07-14 13:52 ` [Qemu-devel] [PATCH 12/28] alpha: replace cpu_alpha_init() " Igor Mammedov
` (16 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Richard Henderson, Alexander Graf, Cornelia Huck, Thomas Huth
cpu_s390x_init() is used only *-user targets indirectly
via cpu_init() macro and has a hack to assign ids to created
cpus (I'm not sure if 'id' really matters to *-user emulation).
So to on safe side, instead of having custom wrapper to do numbering
replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id
which could serve the same purpose as static variable and move cpu->id
initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case.
PS:
ifdef is ugly but it allows us to hide s390x detail that isn't
set by *-user targets and reuse generic cpu creation utility
for btoh machine and user emulation.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
perhaps cpu->id isn't need by CONFIG_USER_ONLY but I'd leave to it
s390x maintainers to deal with it.
CC: Richard Henderson <rth@twiddle.net>
CC: Alexander Graf <agraf@suse.de>
CC: Cornelia Huck <cohuck@redhat.com>
CC: Thomas Huth <thuth@redhat.com>
---
target/s390x/cpu.h | 3 +--
target/s390x/cpu.c | 7 +++++++
target/s390x/helper.c | 14 --------------
3 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index bdb9bdb..b6d25c6 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -477,7 +477,6 @@ static inline bool get_per_in_range(CPUS390XState *env, uint64_t addr)
void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);
#endif
-S390CPU *cpu_s390x_init(const char *cpu_model);
S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp);
S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp);
void s390x_translate_init(void);
@@ -641,7 +640,7 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
extern void subsystem_reset(void);
-#define cpu_init(model) CPU(cpu_s390x_init(model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model)
#define cpu_signal_handler cpu_s390x_signal_handler
void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf);
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index accef03..e40a26f 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -303,6 +303,13 @@ static void s390_cpu_initfn(Object *obj)
inited = true;
s390x_translate_init();
}
+
+#if defined(CONFIG_USER_ONLY)
+ {
+ S390CPUClass *scc = S390_CPU_GET_CLASS(obj);
+ cpu->id = scc->next_cpu_id;
+ }
+#endif
}
static void s390_cpu_finalize(Object *obj)
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index aef09e1..632b030 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -129,20 +129,6 @@ out:
return cpu;
}
-S390CPU *cpu_s390x_init(const char *cpu_model)
-{
- Error *err = NULL;
- S390CPU *cpu;
- /* Use to track CPU ID for linux-user only */
- static int64_t next_cpu_id;
-
- cpu = s390x_new_cpu(cpu_model, next_cpu_id++, &err);
- if (err) {
- error_report_err(err);
- }
- return cpu;
-}
-
#if defined(CONFIG_USER_ONLY)
void s390_cpu_do_interrupt(CPUState *cs)
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 12/28] alpha: replace cpu_alpha_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (10 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-15 18:05 ` Richard Henderson
2017-07-14 13:52 ` [Qemu-devel] [PATCH 13/28] hppa: replace cpu_hppa_init() " Igor Mammedov
` (15 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Richard Henderson, Riku Voipio, Laurent Vivier
cpu_alpha_init() used to provide default fallback if invalid
(i.e. non existent) cpu_model were provided.
dp264 machine provides its own default so sole user of fallback
is [bsd|linux]-user targets which specifies 'any' cpu model that
fallbacks to "ev67" in cpu_alpha_init(). Push fallback handling
into alpha_cpu_class_by_name() and replace cpu_alpha_init() with
cpu_generic_init().
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
PS:
tested only linux-user as I don't have bsd box to test on
CC: Richard Henderson <rth@twiddle.net>
CC: Riku Voipio <riku.voipio@iki.fi>
CC: Laurent Vivier <laurent@vivier.eu>
---
target/alpha/cpu.h | 4 +---
hw/alpha/dp264.c | 8 ++++++--
target/alpha/cpu.c | 20 +++++---------------
3 files changed, 12 insertions(+), 20 deletions(-)
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 691ac00..a390b82 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -457,9 +457,7 @@ enum {
void alpha_translate_init(void);
-AlphaCPU *cpu_alpha_init(const char *cpu_model);
-
-#define cpu_init(cpu_model) CPU(cpu_alpha_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_ALPHA_CPU, cpu_model)
void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf);
/* you can call this signal handler from your SIGBUS and SIGSEGV
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 85405da..2a85593 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -51,7 +51,7 @@ static int clipper_pci_map_irq(PCIDevice *d, int irq_num)
static void clipper_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
+ const char *cpu_model = machine->cpu_model ? machine->cpu_model : "ev67";
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -67,7 +67,11 @@ static void clipper_init(MachineState *machine)
/* Create up to 4 cpus. */
memset(cpus, 0, sizeof(cpus));
for (i = 0; i < smp_cpus; ++i) {
- cpus[i] = cpu_alpha_init(cpu_model ? cpu_model : "ev67");
+ cpus[i] = ALPHA_CPU(cpu_generic_init(TYPE_ALPHA_CPU, cpu_model));
+ if (!cpus[i]) {
+ error_report("Unable to find CPU definition");
+ exit(1);
+ }
}
cpus[0]->env.trap_arg0 = ram_size;
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 8186c9d..ff18e1a 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -155,24 +155,14 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
if (oc != NULL && object_class_is_abstract(oc)) {
oc = NULL;
}
- return oc;
-}
-
-AlphaCPU *cpu_alpha_init(const char *cpu_model)
-{
- AlphaCPU *cpu;
- ObjectClass *cpu_class;
- cpu_class = alpha_cpu_class_by_name(cpu_model);
- if (cpu_class == NULL) {
- /* Default to ev67; no reason not to emulate insns by default. */
- cpu_class = object_class_by_name(TYPE("ev67"));
+ /* TODO: remove match everything nonsense */
+ /* Default to ev67; no reason not to emulate insns by default. */
+ if (!oc) {
+ oc = object_class_by_name(TYPE("ev67"));
}
- cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class)));
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
- return cpu;
+ return oc;
}
static void ev4_cpu_initfn(Object *obj)
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 13/28] hppa: replace cpu_hppa_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (11 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 12/28] alpha: replace cpu_alpha_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-15 18:06 ` Richard Henderson
2017-07-14 13:52 ` [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() " Igor Mammedov
` (14 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Richard Henderson
drop custom cpu_hppa_init() in favor of cpu_generic_init(),
to make cpu_generic_init() work all we need is to provide
cc->class_by_name callback that would resolve any cpu_model
to the sole TYPE_HPPA_CPU to match current behaviour.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Richard Henderson <rth@twiddle.net>
tested with linux-user
---
target/hppa/cpu.h | 4 +---
target/hppa/cpu.c | 11 +++--------
2 files changed, 4 insertions(+), 11 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 4cf4ac6..8d14077 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -112,9 +112,7 @@ static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch)
void hppa_translate_init(void);
-HPPACPU *cpu_hppa_init(const char *cpu_model);
-
-#define cpu_init(cpu_model) CPU(cpu_hppa_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_HPPA_CPU, cpu_model)
void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf);
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 30299e9..a477b45 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -112,15 +112,9 @@ static void hppa_cpu_initfn(Object *obj)
hppa_translate_init();
}
-HPPACPU *cpu_hppa_init(const char *cpu_model)
+static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
{
- HPPACPU *cpu;
-
- cpu = HPPA_CPU(object_new(TYPE_HPPA_CPU));
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
+ return object_class_by_name(TYPE_HPPA_CPU);
}
static void hppa_cpu_class_init(ObjectClass *oc, void *data)
@@ -132,6 +126,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
acc->parent_realize = dc->realize;
dc->realize = hppa_cpu_realizefn;
+ cc->class_by_name = hppa_cpu_class_by_name;
cc->do_interrupt = hppa_cpu_do_interrupt;
cc->cpu_exec_interrupt = hppa_cpu_exec_interrupt;
cc->dump_state = hppa_cpu_dump_state;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (12 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 13/28] hppa: replace cpu_hppa_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-15 8:05 ` Thomas Huth
2017-07-15 18:08 ` Richard Henderson
2017-07-14 13:52 ` [Qemu-devel] [PATCH 15/28] microblaze: replace cpu_mb_init() " Igor Mammedov
` (13 subsequent siblings)
27 siblings, 2 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Thomas Huth,
Laurent Vivier
call register_m68k_insns() at realize time which makes
cpu_m68k_init() typical object creation function.
As result we can replace it with cpu_generic_init()
which does the same job, reducing code duplication a bit.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Thomas Huth <huth@tuxfamily.org>
CC: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/cpu.h | 3 +--
hw/m68k/an5206.c | 2 +-
hw/m68k/mcf5208.c | 2 +-
target/m68k/cpu.c | 2 ++
target/m68k/helper.c | 20 --------------------
5 files changed, 5 insertions(+), 24 deletions(-)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 38a7e11..d936547 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -163,7 +163,6 @@ int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void m68k_tcg_init(void);
void m68k_cpu_init_gdb(M68kCPU *cpu);
-M68kCPU *cpu_m68k_init(const char *cpu_model);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
@@ -322,7 +321,7 @@ void register_m68k_insns (CPUM68KState *env);
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-#define cpu_init(cpu_model) CPU(cpu_m68k_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_M68K_CPU, cpu_model)
#define cpu_signal_handler cpu_m68k_signal_handler
#define cpu_list m68k_cpu_list
diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c
index 142bab9..23c23df 100644
--- a/hw/m68k/an5206.c
+++ b/hw/m68k/an5206.c
@@ -42,7 +42,7 @@ static void an5206_init(MachineState *machine)
if (!cpu_model) {
cpu_model = "m5206";
}
- cpu = cpu_m68k_init(cpu_model);
+ cpu = M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model));
if (!cpu) {
error_report("Unable to find m68k CPU definition");
exit(1);
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index 6563518..cca2e73 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -232,7 +232,7 @@ static void mcf5208evb_init(MachineState *machine)
if (!cpu_model) {
cpu_model = "m5208";
}
- cpu = cpu_m68k_init(cpu_model);
+ cpu = M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model));
if (!cpu) {
fprintf(stderr, "Unable to find m68k CPU definition\n");
exit(1);
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index a14b6dd..55bf24b 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
Error *local_err = NULL;
+ register_m68k_insns(&cpu->env);
+
cpu_exec_realizefn(cs, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index caae291..7e50ff5 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -156,26 +156,6 @@ static int m68k_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
return 0;
}
-M68kCPU *cpu_m68k_init(const char *cpu_model)
-{
- M68kCPU *cpu;
- CPUM68KState *env;
- ObjectClass *oc;
-
- oc = cpu_class_by_name(TYPE_M68K_CPU, cpu_model);
- if (oc == NULL) {
- return NULL;
- }
- cpu = M68K_CPU(object_new(object_class_get_name(oc)));
- env = &cpu->env;
-
- register_m68k_insns(env);
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
-}
-
void m68k_cpu_init_gdb(M68kCPU *cpu)
{
CPUState *cs = CPU(cpu);
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 15/28] microblaze: replace cpu_mb_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (13 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-15 21:51 ` Philippe Mathieu-Daudé
2017-07-14 13:52 ` [Qemu-devel] [PATCH 16/28] nios2: replace cpu_nios2_init() " Igor Mammedov
` (12 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Edgar E. Iglesias
cpu_mb_init() always falls back to TYPE_MICROBLAZE_CPU object
regardless of cpu_model. Put fallback logic into
mb_cpu_class_by_name() which would translate any cpu_model
into TYPE_MICROBLAZE_CPU class and replace cpu_mb_init()
with cpu_generic_init().
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
---
target/microblaze/cpu.h | 3 +--
target/microblaze/cpu.c | 6 ++++++
target/microblaze/translate.c | 11 -----------
3 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 5ce4c82..52b6b6a 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -331,7 +331,6 @@ int mb_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void mb_tcg_init(void);
-MicroBlazeCPU *cpu_mb_init(const char *cpu_model);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
@@ -344,7 +343,7 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo,
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-#define cpu_init(cpu_model) CPU(cpu_mb_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_MICROBLAZE_CPU, cpu_model)
#define cpu_signal_handler cpu_mb_signal_handler
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index f85ff01..ddffe86 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -253,6 +253,11 @@ static Property mb_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
+static ObjectClass *mb_cpu_class_by_name(const char *cpu_model)
+{
+ return object_class_by_name(TYPE_MICROBLAZE_CPU);
+}
+
static void mb_cpu_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -265,6 +270,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
mcc->parent_reset = cc->reset;
cc->reset = mb_cpu_reset;
+ cc->class_by_name = mb_cpu_class_by_name;
cc->has_work = mb_cpu_has_work;
cc->do_interrupt = mb_cpu_do_interrupt;
cc->cpu_exec_interrupt = mb_cpu_exec_interrupt;
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index cb65d1e..c97c9d8 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -1845,17 +1845,6 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
cpu_fprintf(f, "\n\n");
}
-MicroBlazeCPU *cpu_mb_init(const char *cpu_model)
-{
- MicroBlazeCPU *cpu;
-
- cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
-}
-
void mb_tcg_init(void)
{
int i;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 16/28] nios2: replace cpu_nios2_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (14 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 15/28] microblaze: replace cpu_mb_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-15 21:53 ` Philippe Mathieu-Daudé
2017-07-14 13:52 ` [Qemu-devel] [PATCH 17/28] tilegx: replace cpu_tilegx_init() " Igor Mammedov
` (11 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Chris Wulff,
Marek Vasut
cpu_nios2_init() always falls back to TYPE_NIOS2_CPU object
regardless of cpu_model. Put fallback logic into
nios2_cpu_class_by_name() which would translate any cpu_model
into TYPE_NIOS2_CPU class and replace cpu_nios2_init()
with cpu_generic_init()
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Chris Wulff <crwulff@gmail.com>
CC: Marek Vasut <marex@denx.de>
---
target/nios2/cpu.h | 3 +--
hw/nios2/10m50_devboard.c | 2 +-
target/nios2/cpu.c | 9 +++------
3 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 13931f3..50d803a 100644
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
@@ -212,7 +212,6 @@ static inline Nios2CPU *nios2_env_get_cpu(CPUNios2State *env)
#define ENV_OFFSET offsetof(Nios2CPU, env)
void nios2_tcg_init(void);
-Nios2CPU *cpu_nios2_init(const char *cpu_model);
void nios2_cpu_do_interrupt(CPUState *cs);
int cpu_nios2_signal_handler(int host_signum, void *pinfo, void *puc);
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUNios2State *env);
@@ -229,7 +228,7 @@ void nios2_check_interrupts(CPUNios2State *env);
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-#define cpu_init(cpu_model) CPU(cpu_nios2_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_NIOS2_CPU, cpu_model)
#define cpu_gen_code cpu_nios2_gen_code
#define cpu_signal_handler cpu_nios2_signal_handler
diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c
index 051be73..c8aa116 100644
--- a/hw/nios2/10m50_devboard.c
+++ b/hw/nios2/10m50_devboard.c
@@ -75,7 +75,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine)
phys_ram_alias);
/* Create CPU -- FIXME */
- cpu = cpu_nios2_init("nios2");
+ cpu = NIOS2_CPU(cpu_generic_init(TYPE_NIOS2_CPU, "nios2"));
/* Register: CPU interrupt controller (PIC) */
cpu_irq = nios2_cpu_pic_init(cpu);
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index d56bb72..5b02fb6 100644
--- a/target/nios2/cpu.c
+++ b/target/nios2/cpu.c
@@ -83,13 +83,9 @@ static void nios2_cpu_initfn(Object *obj)
}
}
-Nios2CPU *cpu_nios2_init(const char *cpu_model)
+static ObjectClass *nios2_cpu_class_by_name(const char *cpu_model)
{
- Nios2CPU *cpu = NIOS2_CPU(object_new(TYPE_NIOS2_CPU));
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
+ return object_class_by_name(TYPE_NIOS2_CPU);
}
static void nios2_cpu_realizefn(DeviceState *dev, Error **errp)
@@ -203,6 +199,7 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data)
ncc->parent_reset = cc->reset;
cc->reset = nios2_cpu_reset;
+ cc->class_by_name = nios2_cpu_class_by_name;
cc->has_work = nios2_cpu_has_work;
cc->do_interrupt = nios2_cpu_do_interrupt;
cc->cpu_exec_interrupt = nios2_cpu_exec_interrupt;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 17/28] tilegx: replace cpu_tilegx_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (15 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 16/28] nios2: replace cpu_nios2_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:53 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() " Igor Mammedov
` (10 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
David Gibson, Laurent Vivier, Richard Henderson
cpu_tilegx_init() always falls back to TYPE_TILEGX_CPU object
regardless of cpu_model. Put fallback logic into
tilegx_cpu_class_by_name() which would translate any cpu_model
into TYPE_TILEGX_CPU class and replace cpu_tilegx_init()
with cpu_generic_init().
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: David Gibson <david@gibson.dropbear.id.au>
CC: Eduardo Habkost <ehabkost@redhat.com>
CC: Laurent Vivier <laurent@vivier.eu>
CC: Richard Henderson <rth@twiddle.net>
---
target/tilegx/cpu.h | 4 +---
target/tilegx/cpu.c | 11 +++--------
2 files changed, 4 insertions(+), 11 deletions(-)
diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h
index f32be49..71cea04 100644
--- a/target/tilegx/cpu.h
+++ b/target/tilegx/cpu.h
@@ -164,9 +164,7 @@ static inline TileGXCPU *tilegx_env_get_cpu(CPUTLGState *env)
void tilegx_tcg_init(void);
int cpu_tilegx_signal_handler(int host_signum, void *pinfo, void *puc);
-TileGXCPU *cpu_tilegx_init(const char *cpu_model);
-
-#define cpu_init(cpu_model) CPU(cpu_tilegx_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_TILEGX_CPU, cpu_model)
#define cpu_signal_handler cpu_tilegx_signal_handler
diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c
index 4532639..7345f5a 100644
--- a/target/tilegx/cpu.c
+++ b/target/tilegx/cpu.c
@@ -52,15 +52,9 @@ static void tilegx_cpu_dump_state(CPUState *cs, FILE *f,
env->pc, env->spregs[TILEGX_SPR_CMPEXCH]);
}
-TileGXCPU *cpu_tilegx_init(const char *cpu_model)
+static ObjectClass *tilegx_cpu_class_by_name(const char *cpu_model)
{
- TileGXCPU *cpu;
-
- cpu = TILEGX_CPU(object_new(TYPE_TILEGX_CPU));
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
+ return object_class_by_name(TYPE_TILEGX_CPU);
}
static void tilegx_cpu_set_pc(CPUState *cs, vaddr value)
@@ -159,6 +153,7 @@ static void tilegx_cpu_class_init(ObjectClass *oc, void *data)
tcc->parent_reset = cc->reset;
cc->reset = tilegx_cpu_reset;
+ cc->class_by_name = tilegx_cpu_class_by_name;
cc->has_work = tilegx_cpu_has_work;
cc->do_interrupt = tilegx_cpu_do_interrupt;
cc->cpu_exec_interrupt = tilegx_cpu_exec_interrupt;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (16 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 17/28] tilegx: replace cpu_tilegx_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:56 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 19/28] tricore: replace cpu_tricore_init() " Igor Mammedov
` (9 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Max Filippov
call xtensa_irq_init() at realize time which makes
cpu_xtensa_init() like generic cpu creation function.
As result we can replace it with cpu_generic_init()
which does the same job, reducing code duplication a bit.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Max Filippov <jcmvbkbc@gmail.com>
---
target/xtensa/cpu.h | 4 +---
hw/xtensa/sim.c | 2 +-
hw/xtensa/xtfpga.c | 2 +-
target/xtensa/cpu.c | 3 +++
target/xtensa/helper.c | 22 ----------------------
5 files changed, 6 insertions(+), 27 deletions(-)
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index ee29fb1..4803331 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -475,9 +475,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
#define XTENSA_DEFAULT_CPU_MODEL "dc232b"
#endif
-XtensaCPU *cpu_xtensa_init(const char *cpu_model);
-
-#define cpu_init(cpu_model) CPU(cpu_xtensa_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_XTENSA_CPU, cpu_model)
void xtensa_translate_init(void);
void xtensa_breakpoint_handler(CPUState *cs);
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index 5521e91..bf1f729 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -86,7 +86,7 @@ static void xtensa_sim_init(MachineState *machine)
}
for (n = 0; n < smp_cpus; n++) {
- cpu = cpu_xtensa_init(cpu_model);
+ cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
if (cpu == NULL) {
error_report("unable to find CPU definition '%s'",
cpu_model);
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index d5ac080..b656660 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -232,7 +232,7 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
}
for (n = 0; n < smp_cpus; n++) {
- cpu = cpu_xtensa_init(cpu_model);
+ cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
if (cpu == NULL) {
error_report("unable to find CPU definition '%s'",
cpu_model);
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index cd7f958..85897df 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -100,9 +100,12 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
+ XtensaCPU *cpu = XTENSA_CPU(dev);
XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
Error *local_err = NULL;
+ xtensa_irq_init(&cpu->env);
+
cpu_exec_realizefn(cs, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index bcd0b77..e8fba20 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -113,28 +113,6 @@ void xtensa_breakpoint_handler(CPUState *cs)
}
}
-XtensaCPU *cpu_xtensa_init(const char *cpu_model)
-{
- ObjectClass *oc;
- XtensaCPU *cpu;
- CPUXtensaState *env;
-
- oc = cpu_class_by_name(TYPE_XTENSA_CPU, cpu_model);
- if (oc == NULL) {
- return NULL;
- }
-
- cpu = XTENSA_CPU(object_new(object_class_get_name(oc)));
- env = &cpu->env;
-
- xtensa_irq_init(env);
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
-}
-
-
void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
XtensaConfigList *core = xtensa_cores;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 19/28] tricore: replace cpu_tricore_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (17 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:56 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 20/28] sh4: replace cpu_sh4_init() " Igor Mammedov
` (8 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Bastian Koppelmann
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
target/tricore/cpu.h | 4 +---
hw/tricore/tricore_testboard.c | 2 +-
target/tricore/helper.c | 5 -----
3 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index a3493a1..bc53c40 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -411,9 +411,7 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, target_ulong *pc,
*flags = 0;
}
-TriCoreCPU *cpu_tricore_init(const char *cpu_model);
-
-#define cpu_init(cpu_model) CPU(cpu_tricore_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_TRICORE_CPU, cpu_model)
/* helpers.c */
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 8910bf0..599c508 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -74,7 +74,7 @@ static void tricore_testboard_init(MachineState *machine, int board_id)
if (!machine->cpu_model) {
machine->cpu_model = "tc1796";
}
- cpu = cpu_tricore_init(machine->cpu_model);
+ cpu = TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, machine->cpu_model));
if (!cpu) {
error_report("Unable to find CPU definition");
exit(1);
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index 3118905..378c2a4 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -78,11 +78,6 @@ int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address,
return ret;
}
-TriCoreCPU *cpu_tricore_init(const char *cpu_model)
-{
- return TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, cpu_model));
-}
-
static void tricore_cpu_list_entry(gpointer data, gpointer user_data)
{
ObjectClass *oc = data;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 20/28] sh4: replace cpu_sh4_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (18 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 19/28] tricore: replace cpu_tricore_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:57 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 21/28] arm: replace cpu_arm_init() " Igor Mammedov
` (7 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Magnus Damm,
Aurelien Jarno
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Magnus Damm <magnus.damm@gmail.com>
CC: Aurelien Jarno <aurelien@aurel32.net>
---
target/sh4/cpu.h | 3 +--
hw/sh4/r2d.c | 2 +-
hw/sh4/shix.c | 2 +-
target/sh4/cpu.c | 5 -----
4 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index ffb9168..9b66c63 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -223,7 +223,6 @@ void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
int mmu_idx, uintptr_t retaddr);
void sh4_translate_init(void);
-SuperHCPU *cpu_sh4_init(const char *cpu_model);
int cpu_sh4_signal_handler(int host_signum, void *pinfo,
void *puc);
int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
@@ -254,7 +253,7 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr);
void cpu_load_tlb(CPUSH4State * env);
-#define cpu_init(cpu_model) CPU(cpu_sh4_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)
#define cpu_signal_handler cpu_sh4_signal_handler
#define cpu_list sh4_cpu_list
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index e6fc74e..b3d6869 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -246,7 +246,7 @@ static void r2d_init(MachineState *machine)
cpu_model = "SH7751R";
}
- cpu = cpu_sh4_init(cpu_model);
+ cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c
index fd00cc5..3deba6c 100644
--- a/hw/sh4/shix.c
+++ b/hw/sh4/shix.c
@@ -56,7 +56,7 @@ static void shix_init(MachineState *machine)
if (!cpu_model)
cpu_model = "any";
- cpu = cpu_sh4_init(cpu_model);
+ cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 9da7e1e..88043ba 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -156,11 +156,6 @@ static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
return oc;
}
-SuperHCPU *cpu_sh4_init(const char *cpu_model)
-{
- return SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
-}
-
static void sh7750r_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 21/28] arm: replace cpu_arm_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (19 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 20/28] sh4: replace cpu_sh4_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-14 8:53 ` Andrew Jones
2017-07-14 13:52 ` [Qemu-devel] [PATCH 22/28] cris: replace cpu_cris_init() " Igor Mammedov
` (6 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Jan Kiszka,
Andrzej Zaborowski, qemu-arm
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Jan Kiszka <jan.kiszka@web.de>
CC: Peter Maydell <peter.maydell@linaro.org>
CC: Andrzej Zaborowski <balrogg@gmail.com>
CC: qemu-arm@nongnu.org
---
target/arm/cpu.h | 3 +--
hw/arm/musicpal.c | 2 +-
hw/arm/omap1.c | 2 +-
hw/arm/omap2.c | 2 +-
hw/arm/pxa2xx.c | 4 ++--
hw/arm/strongarm.c | 2 +-
target/arm/helper.c | 5 -----
7 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 16a1e59..c9be0ac 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -746,7 +746,6 @@ int aarch64_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
#endif
-ARMCPU *cpu_arm_init(const char *cpu_model);
target_ulong do_arm_semihosting(CPUARMState *env);
void aarch64_sync_32_to_64(CPUARMState *env);
void aarch64_sync_64_to_32(CPUARMState *env);
@@ -1999,7 +1998,7 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx,
return unmasked || pstate_unmasked;
}
-#define cpu_init(cpu_model) CPU(cpu_arm_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_ARM_CPU, cpu_model)
#define cpu_signal_handler cpu_arm_signal_handler
#define cpu_list arm_cpu_list
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 9c710f7..0d519f9 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1593,7 +1593,7 @@ static void musicpal_init(MachineState *machine)
if (!cpu_model) {
cpu_model = "arm926";
}
- cpu = cpu_arm_init(cpu_model);
+ cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, cpu_model));
if (!cpu) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index 54582bd..391eb28 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -3863,7 +3863,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
/* Core */
s->mpu_model = omap310;
- s->cpu = cpu_arm_init(core);
+ s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, core));
if (s->cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c
index 91f5733..a20bb1f 100644
--- a/hw/arm/omap2.c
+++ b/hw/arm/omap2.c
@@ -2261,7 +2261,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
/* Core */
s->mpu_model = omap2420;
- s->cpu = cpu_arm_init(core ?: "arm1136-r2");
+ s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, core ?: "arm1136-r2"));
if (s->cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 629e6c6..2f1c141 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -2065,7 +2065,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
if (!revision)
revision = "pxa270";
- s->cpu = cpu_arm_init(revision);
+ s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, revision));
if (s->cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
@@ -2197,7 +2197,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s = g_new0(PXA2xxState, 1);
- s->cpu = cpu_arm_init("pxa255");
+ s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, "pxa255"));
if (s->cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 7683edc..a27d7c8 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -1597,7 +1597,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
exit(1);
}
- s->cpu = cpu_arm_init(rev);
+ s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, rev));
if (!s->cpu) {
error_report("Unable to find CPU definition");
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 2594faa..86e69a6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5237,11 +5237,6 @@ void register_cp_regs_for_features(ARMCPU *cpu)
}
}
-ARMCPU *cpu_arm_init(const char *cpu_model)
-{
- return ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, cpu_model));
-}
-
void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
{
CPUState *cs = CPU(cpu);
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 22/28] cris: replace cpu_cris_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (20 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 21/28] arm: replace cpu_arm_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:57 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 23/28] x86: replace cpu_x86_init() " Igor Mammedov
` (5 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Edgar E. Iglesias
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
---
target/cris/cpu.h | 3 +--
hw/cris/axis_dev88.c | 2 +-
target/cris/cpu.c | 5 -----
3 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 920e1c3..5d822de 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -216,7 +216,6 @@ int crisv10_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-CRISCPU *cpu_cris_init(const char *cpu_model);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
@@ -268,7 +267,7 @@ enum {
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-#define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_CRIS_CPU, cpu_model)
#define cpu_signal_handler cpu_cris_signal_handler
diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
index 60df887..7030d18 100644
--- a/hw/cris/axis_dev88.c
+++ b/hw/cris/axis_dev88.c
@@ -271,7 +271,7 @@ void axisdev88_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "crisv32";
}
- cpu = cpu_cris_init(cpu_model);
+ cpu = CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model));
env = &cpu->env;
/* allocate RAM */
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 5f766f0..ceebfed 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -89,11 +89,6 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
return oc;
}
-CRISCPU *cpu_cris_init(const char *cpu_model)
-{
- return CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model));
-}
-
/* Sort alphabetically by VR. */
static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b)
{
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 23/28] x86: replace cpu_x86_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (21 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 22/28] cris: replace cpu_cris_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:57 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() " Igor Mammedov
` (4 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Paolo Bonzini, Richard Henderson
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Richard Henderson <rth@twiddle.net>
CC: Eduardo Habkost <ehabkost@redhat.com>
---
target/i386/cpu.h | 3 +--
target/i386/cpu.c | 5 -----
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 7a228af..6631e7b 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1326,7 +1326,6 @@ int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void x86_cpu_exec_enter(CPUState *cpu);
void x86_cpu_exec_exit(CPUState *cpu);
-X86CPU *cpu_x86_init(const char *cpu_model);
void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf);
int cpu_x86_support_mca_broadcast(CPUX86State *env);
@@ -1506,7 +1505,7 @@ uint64_t cpu_get_tsc(CPUX86State *env);
#define PHYS_ADDR_MASK MAKE_64BIT_MASK(0, TCG_PHYS_ADDR_BITS)
-#define cpu_init(cpu_model) CPU(cpu_x86_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_X86_CPU, cpu_model)
#define cpu_signal_handler cpu_x86_signal_handler
#define cpu_list x86_cpu_list
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 91d3684..1bcf208 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2485,11 +2485,6 @@ static gchar *x86_gdb_arch_name(CPUState *cs)
#endif
}
-X86CPU *cpu_x86_init(const char *cpu_model)
-{
- return X86_CPU(cpu_generic_init(TYPE_X86_CPU, cpu_model));
-}
-
static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data)
{
X86CPUDefinition *cpudef = data;
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (22 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 23/28] x86: replace cpu_x86_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-14 15:51 ` Michael Walle
2017-08-16 19:58 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 25/28] moxie: replace cpu_moxie_init() " Igor Mammedov
` (3 subsequent siblings)
27 siblings, 2 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Michael Walle
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Michael Walle <michael@walle.cc>
---
target/lm32/cpu.h | 3 +--
hw/lm32/lm32_boards.c | 4 ++--
hw/lm32/milkymist.c | 2 +-
target/lm32/helper.c | 5 -----
4 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h
index 1d972cb..de265b5 100644
--- a/target/lm32/cpu.h
+++ b/target/lm32/cpu.h
@@ -238,7 +238,6 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx)
return (dc >> (idx+1)*2) & 0x3;
}
-LM32CPU *cpu_lm32_init(const char *cpu_model);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
@@ -256,7 +255,7 @@ void lm32_watchpoint_insert(CPULM32State *env, int index, target_ulong address,
void lm32_watchpoint_remove(CPULM32State *env, int index);
bool lm32_cpu_do_semihosting(CPUState *cs);
-#define cpu_init(cpu_model) CPU(cpu_lm32_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model)
#define cpu_list lm32_cpu_list
#define cpu_signal_handler cpu_lm32_signal_handler
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index 8f0c307..eccf0ac 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -104,7 +104,7 @@ static void lm32_evr_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "lm32-full";
}
- cpu = cpu_lm32_init(cpu_model);
+ cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model);
exit(1);
@@ -205,7 +205,7 @@ static void lm32_uclinux_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "lm32-full";
}
- cpu = cpu_lm32_init(cpu_model);
+ cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model);
exit(1);
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index 5cae0f1..dffd879 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -111,7 +111,7 @@ milkymist_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "lm32-full";
}
- cpu = cpu_lm32_init(cpu_model);
+ cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model);
exit(1);
diff --git a/target/lm32/helper.c b/target/lm32/helper.c
index 891da18..929cc36 100644
--- a/target/lm32/helper.c
+++ b/target/lm32/helper.c
@@ -219,11 +219,6 @@ bool lm32_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return false;
}
-LM32CPU *cpu_lm32_init(const char *cpu_model)
-{
- return LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
-}
-
/* Some soc ignores the MSB on the address bus. Thus creating a shadow memory
* area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
* 0x80000000-0xffffffff is not cached and used to access IO devices. */
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 25/28] moxie: replace cpu_moxie_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (23 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:58 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() " Igor Mammedov
` (2 subsequent siblings)
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Anthony Green
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Anthony Green <green@moxielogic.com>
---
target/moxie/cpu.h | 3 +--
hw/moxie/moxiesim.c | 2 +-
target/moxie/cpu.c | 5 -----
3 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
index 8991aae..75decaa 100644
--- a/target/moxie/cpu.h
+++ b/target/moxie/cpu.h
@@ -112,7 +112,6 @@ static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)
#define ENV_OFFSET offsetof(MoxieCPU, env)
-MoxieCPU *cpu_moxie_init(const char *cpu_model);
void moxie_cpu_do_interrupt(CPUState *cs);
void moxie_cpu_dump_state(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf, int flags);
@@ -121,7 +120,7 @@ void moxie_translate_init(void);
int cpu_moxie_signal_handler(int host_signum, void *pinfo,
void *puc);
-#define cpu_init(cpu_model) CPU(cpu_moxie_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_MOXIE_CPU, cpu_model)
#define cpu_signal_handler cpu_moxie_signal_handler
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
index 3069834..719dc0a 100644
--- a/hw/moxie/moxiesim.c
+++ b/hw/moxie/moxiesim.c
@@ -118,7 +118,7 @@ static void moxiesim_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "MoxieLite-moxie-cpu";
}
- cpu = cpu_moxie_init(cpu_model);
+ cpu = MOXIE_CPU(cpu_generic_init(TYPE_MOXIE_CPU, cpu_model));
if (!cpu) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 927b1a1..748d02f 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -150,11 +150,6 @@ static const MoxieCPUInfo moxie_cpus[] = {
{ .name = "any", .initfn = moxie_any_initfn },
};
-MoxieCPU *cpu_moxie_init(const char *cpu_model)
-{
- return MOXIE_CPU(cpu_generic_init(TYPE_MOXIE_CPU, cpu_model));
-}
-
static void cpu_register(const MoxieCPUInfo *info)
{
TypeInfo type_info = {
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (24 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 25/28] moxie: replace cpu_moxie_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:58 ` Eduardo Habkost
2017-08-16 21:28 ` Stafford Horne
2017-07-14 13:52 ` [Qemu-devel] [PATCH 27/28] unicore32: replace uc32_cpu_init() " Igor Mammedov
2017-07-14 13:52 ` [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() " Igor Mammedov
27 siblings, 2 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Jia Liu,
Stafford Horne
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Jia Liu <proljc@gmail.com>
CC: Stafford Horne <shorne@gmail.com>
---
target/openrisc/cpu.h | 4 +---
hw/openrisc/openrisc_sim.c | 2 +-
target/openrisc/cpu.c | 5 -----
3 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 2721432..f51b89a 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -347,8 +347,6 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)
#define ENV_OFFSET offsetof(OpenRISCCPU, env)
-OpenRISCCPU *cpu_openrisc_init(const char *cpu_model);
-
void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf);
void openrisc_cpu_do_interrupt(CPUState *cpu);
bool openrisc_cpu_exec_interrupt(CPUState *cpu, int int_req);
@@ -390,7 +388,7 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
int *prot, target_ulong address, int rw);
#endif
-#define cpu_init(cpu_model) CPU(cpu_openrisc_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model)
#include "exec/cpu-all.h"
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index fc0d096..d6ed968 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -109,7 +109,7 @@ static void openrisc_sim_init(MachineState *machine)
}
for (n = 0; n < smp_cpus; n++) {
- cpu = cpu_openrisc_init(cpu_model);
+ cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition!\n");
exit(1);
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 1d6330c..a979f0b 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -210,11 +210,6 @@ static void openrisc_cpu_register_types(void)
}
}
-OpenRISCCPU *cpu_openrisc_init(const char *cpu_model)
-{
- return OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
-}
-
/* Sort alphabetically by type name, except for "any". */
static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b)
{
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 27/28] unicore32: replace uc32_cpu_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (25 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-08-16 19:59 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() " Igor Mammedov
27 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell, Guan Xuetao
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Guan Xuetao <gxt@mprc.pku.edu.cn>
---
target/unicore32/cpu.h | 4 +---
hw/unicore32/puv3.c | 2 +-
target/unicore32/helper.c | 5 -----
3 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h
index 7b5b405..7724108 100644
--- a/target/unicore32/cpu.h
+++ b/target/unicore32/cpu.h
@@ -165,9 +165,7 @@ static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch)
#include "exec/cpu-all.h"
-UniCore32CPU *uc32_cpu_init(const char *cpu_model);
-
-#define cpu_init(cpu_model) CPU(uc32_cpu_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model)
static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *flags)
diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c
index 032078f..89751b1 100644
--- a/hw/unicore32/puv3.c
+++ b/hw/unicore32/puv3.c
@@ -125,7 +125,7 @@ static void puv3_init(MachineState *machine)
cpu_model = "UniCore-II";
}
- cpu = uc32_cpu_init(cpu_model);
+ cpu = UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model));
if (!cpu) {
error_report("Unable to find CPU definition");
exit(1);
diff --git a/target/unicore32/helper.c b/target/unicore32/helper.c
index f9239dc..309dcd1 100644
--- a/target/unicore32/helper.c
+++ b/target/unicore32/helper.c
@@ -27,11 +27,6 @@
#define DPRINTF(fmt, ...) do {} while (0)
#endif
-UniCore32CPU *uc32_cpu_init(const char *cpu_model)
-{
- return UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model));
-}
-
#ifndef CONFIG_USER_ONLY
void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg,
uint32_t cop)
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() with cpu_generic_init()
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
` (26 preceding siblings ...)
2017-07-14 13:52 ` [Qemu-devel] [PATCH 27/28] unicore32: replace uc32_cpu_init() " Igor Mammedov
@ 2017-07-14 13:52 ` Igor Mammedov
2017-07-15 2:36 ` David Gibson
` (2 more replies)
27 siblings, 3 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-07-14 13:52 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, qemu-ppc
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Alexander Graf <agraf@suse.de>
CC: David Gibson <david@gibson.dropbear.id.au>
CC: "Hervé Poussineau" <hpoussin@reactos.org>
CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
CC: qemu-ppc@nongnu.org
---
target/ppc/cpu.h | 3 +--
hw/ppc/e500.c | 3 ++-
hw/ppc/mac_newworld.c | 3 ++-
hw/ppc/mac_oldworld.c | 3 ++-
hw/ppc/ppc440_bamboo.c | 2 +-
hw/ppc/ppc4xx_devs.c | 2 +-
hw/ppc/prep.c | 5 +++--
hw/ppc/virtex_ml507.c | 2 +-
target/ppc/translate_init.c | 5 -----
9 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 6ee2a26..696cbeb 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1276,7 +1276,6 @@ extern const struct VMStateDescription vmstate_ppc_cpu;
#endif
/*****************************************************************************/
-PowerPCCPU *cpu_ppc_init(const char *cpu_model);
void ppc_translate_init(void);
const char *ppc_cpu_lookup_alias(const char *alias);
/* you can call this signal handler from your SIGBUS and SIGSEGV
@@ -1353,7 +1352,7 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn)
int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp);
int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val);
-#define cpu_init(cpu_model) CPU(cpu_ppc_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)
#define cpu_signal_handler cpu_ppc_signal_handler
#define cpu_list ppc_cpu_list
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 62f1857..f0596f3 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -819,7 +819,8 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
CPUState *cs;
qemu_irq *input;
- cpu = cpu_ppc_init(machine->cpu_model);
+ cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
+ machine->cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to initialize CPU!\n");
exit(1);
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index bae1c0a..72c98e9 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -187,7 +187,8 @@ static void ppc_core99_init(MachineState *machine)
#endif
}
for (i = 0; i < smp_cpus; i++) {
- cpu = cpu_ppc_init(machine->cpu_model);
+ cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
+ machine->cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 97bb854..6fc2a19 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -116,7 +116,8 @@ static void ppc_heathrow_init(MachineState *machine)
if (machine->cpu_model == NULL)
machine->cpu_model = "G3";
for (i = 0; i < smp_cpus; i++) {
- cpu = cpu_ppc_init(machine->cpu_model);
+ cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
+ machine->cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index 9d997bf..ca26398 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -186,7 +186,7 @@ static void bamboo_init(MachineState *machine)
if (machine->cpu_model == NULL) {
machine->cpu_model = "440EP";
}
- cpu = cpu_ppc_init(machine->cpu_model);
+ cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to initialize CPU!\n");
exit(1);
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index e7f413e..6b38ed7 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -56,7 +56,7 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model,
CPUPPCState *env;
/* init CPUs */
- cpu = cpu_ppc_init(cpu_model);
+ cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find PowerPC %s CPU definition\n",
cpu_model);
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 36d3dcd..00f3321 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -520,7 +520,8 @@ static void ppc_prep_init(MachineState *machine)
if (machine->cpu_model == NULL)
machine->cpu_model = "602";
for (i = 0; i < smp_cpus; i++) {
- cpu = cpu_ppc_init(machine->cpu_model);
+ cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
+ machine->cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
@@ -724,7 +725,7 @@ static void ibm_40p_init(MachineState *machine)
if (!machine->cpu_model) {
machine->cpu_model = "604";
}
- cpu = cpu_ppc_init(machine->cpu_model);
+ cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
if (!cpu) {
error_report("could not initialize CPU '%s'",
machine->cpu_model);
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index fdbcf22..d5fdc16 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -96,7 +96,7 @@ static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
CPUPPCState *env;
qemu_irq *irqs;
- cpu = cpu_ppc_init(cpu_model);
+ cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "Unable to initialize CPU!\n");
exit(1);
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index 783bf98..b4eaabb 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -10250,11 +10250,6 @@ const char *ppc_cpu_lookup_alias(const char *alias)
return NULL;
}
-PowerPCCPU *cpu_ppc_init(const char *cpu_model)
-{
- return POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
-}
-
PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc)
{
ObjectClass *oc = OBJECT_CLASS(pcc);
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() " Igor Mammedov
@ 2017-07-14 15:51 ` Michael Walle
2017-08-16 19:58 ` Eduardo Habkost
1 sibling, 0 replies; 86+ messages in thread
From: Michael Walle @ 2017-07-14 15:51 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Andreas Färber, Eduardo Habkost, Peter Maydell
Am 2017-07-14 15:52, schrieb Igor Mammedov:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Michael Walle <michael@walle.cc>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() " Igor Mammedov
@ 2017-07-15 2:36 ` David Gibson
2017-07-15 6:09 ` Hervé Poussineau
2017-08-16 19:59 ` Eduardo Habkost
2 siblings, 0 replies; 86+ messages in thread
From: David Gibson @ 2017-07-15 2:36 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Andreas Färber, Eduardo Habkost, Peter Maydell,
Alexander Graf, Hervé Poussineau, Edgar E. Iglesias,
qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 7154 bytes --]
On Fri, Jul 14, 2017 at 03:52:19PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> CC: Alexander Graf <agraf@suse.de>
> CC: David Gibson <david@gibson.dropbear.id.au>
> CC: "Hervé Poussineau" <hpoussin@reactos.org>
> CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
> CC: qemu-ppc@nongnu.org
> ---
> target/ppc/cpu.h | 3 +--
> hw/ppc/e500.c | 3 ++-
> hw/ppc/mac_newworld.c | 3 ++-
> hw/ppc/mac_oldworld.c | 3 ++-
> hw/ppc/ppc440_bamboo.c | 2 +-
> hw/ppc/ppc4xx_devs.c | 2 +-
> hw/ppc/prep.c | 5 +++--
> hw/ppc/virtex_ml507.c | 2 +-
> target/ppc/translate_init.c | 5 -----
> 9 files changed, 13 insertions(+), 15 deletions(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 6ee2a26..696cbeb 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1276,7 +1276,6 @@ extern const struct VMStateDescription vmstate_ppc_cpu;
> #endif
>
> /*****************************************************************************/
> -PowerPCCPU *cpu_ppc_init(const char *cpu_model);
> void ppc_translate_init(void);
> const char *ppc_cpu_lookup_alias(const char *alias);
> /* you can call this signal handler from your SIGBUS and SIGSEGV
> @@ -1353,7 +1352,7 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn)
> int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp);
> int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val);
>
> -#define cpu_init(cpu_model) CPU(cpu_ppc_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)
>
> #define cpu_signal_handler cpu_ppc_signal_handler
> #define cpu_list ppc_cpu_list
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 62f1857..f0596f3 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -819,7 +819,8 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
> CPUState *cs;
> qemu_irq *input;
>
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
> + machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to initialize CPU!\n");
> exit(1);
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index bae1c0a..72c98e9 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -187,7 +187,8 @@ static void ppc_core99_init(MachineState *machine)
> #endif
> }
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
> + machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find PowerPC CPU definition\n");
> exit(1);
> diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> index 97bb854..6fc2a19 100644
> --- a/hw/ppc/mac_oldworld.c
> +++ b/hw/ppc/mac_oldworld.c
> @@ -116,7 +116,8 @@ static void ppc_heathrow_init(MachineState *machine)
> if (machine->cpu_model == NULL)
> machine->cpu_model = "G3";
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
> + machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find PowerPC CPU definition\n");
> exit(1);
> diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
> index 9d997bf..ca26398 100644
> --- a/hw/ppc/ppc440_bamboo.c
> +++ b/hw/ppc/ppc440_bamboo.c
> @@ -186,7 +186,7 @@ static void bamboo_init(MachineState *machine)
> if (machine->cpu_model == NULL) {
> machine->cpu_model = "440EP";
> }
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to initialize CPU!\n");
> exit(1);
> diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
> index e7f413e..6b38ed7 100644
> --- a/hw/ppc/ppc4xx_devs.c
> +++ b/hw/ppc/ppc4xx_devs.c
> @@ -56,7 +56,7 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model,
> CPUPPCState *env;
>
> /* init CPUs */
> - cpu = cpu_ppc_init(cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find PowerPC %s CPU definition\n",
> cpu_model);
> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> index 36d3dcd..00f3321 100644
> --- a/hw/ppc/prep.c
> +++ b/hw/ppc/prep.c
> @@ -520,7 +520,8 @@ static void ppc_prep_init(MachineState *machine)
> if (machine->cpu_model == NULL)
> machine->cpu_model = "602";
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
> + machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find PowerPC CPU definition\n");
> exit(1);
> @@ -724,7 +725,7 @@ static void ibm_40p_init(MachineState *machine)
> if (!machine->cpu_model) {
> machine->cpu_model = "604";
> }
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
> if (!cpu) {
> error_report("could not initialize CPU '%s'",
> machine->cpu_model);
> diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
> index fdbcf22..d5fdc16 100644
> --- a/hw/ppc/virtex_ml507.c
> +++ b/hw/ppc/virtex_ml507.c
> @@ -96,7 +96,7 @@ static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
> CPUPPCState *env;
> qemu_irq *irqs;
>
> - cpu = cpu_ppc_init(cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to initialize CPU!\n");
> exit(1);
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 783bf98..b4eaabb 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -10250,11 +10250,6 @@ const char *ppc_cpu_lookup_alias(const char *alias)
> return NULL;
> }
>
> -PowerPCCPU *cpu_ppc_init(const char *cpu_model)
> -{
> - return POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
> -}
> -
> PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc)
> {
> ObjectClass *oc = OBJECT_CLASS(pcc);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init()
2017-07-14 13:51 ` [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init() Igor Mammedov
@ 2017-07-15 6:09 ` Hervé Poussineau
2017-07-15 21:48 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 86+ messages in thread
From: Hervé Poussineau @ 2017-07-15 6:09 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Aurelien Jarno, Yongbok Kim
Le 14/07/2017 à 15:51, Igor Mammedov a écrit :
> now cpu_mips_init() reimplements subset of cpu_generic_init()
> tasks, so just drop it and use cpu_generic_init() directly.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
> ---
> CC: Aurelien Jarno <aurelien@aurel32.net>
> CC: Yongbok Kim <yongbok.kim@imgtec.com>
> CC: "Hervé Poussineau" <hpoussin@reactos.org>
> ---
> target/mips/cpu.h | 3 +--
> hw/mips/cps.c | 2 +-
> hw/mips/mips_fulong2e.c | 2 +-
> hw/mips/mips_jazz.c | 2 +-
> hw/mips/mips_malta.c | 2 +-
> hw/mips/mips_mipssim.c | 2 +-
> hw/mips/mips_r4k.c | 2 +-
> target/mips/translate.c | 17 -----------------
> 8 files changed, 7 insertions(+), 25 deletions(-)
>
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 7c2e0bf..efc8025 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -865,10 +865,9 @@ enum {
> #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
>
> void mips_tcg_init(void);
> -MIPSCPU *cpu_mips_init(const char *cpu_model);
> int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
>
> -#define cpu_init(cpu_model) CPU(cpu_mips_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model)
> bool cpu_supports_cps_smp(const char *cpu_model);
> bool cpu_supports_isa(const char *cpu_model, unsigned int isa);
> void cpu_set_exception_base(int vp_index, target_ulong address);
> diff --git a/hw/mips/cps.c b/hw/mips/cps.c
> index 4ef337d..708899c 100644
> --- a/hw/mips/cps.c
> +++ b/hw/mips/cps.c
> @@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
> bool itu_present = false;
>
> for (i = 0; i < s->num_vp; i++) {
> - cpu = cpu_mips_init(s->cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model));
> if (cpu == NULL) {
> error_setg(errp, "%s: CPU initialization failed", __func__);
> return;
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index dbe2805..02a1712 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -277,7 +277,7 @@ static void mips_fulong2e_init(MachineState *machine)
> if (cpu_model == NULL) {
> cpu_model = "Loongson-2E";
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
> index 1cef581..ee58c44 100644
> --- a/hw/mips/mips_jazz.c
> +++ b/hw/mips/mips_jazz.c
> @@ -151,7 +151,7 @@ static void mips_jazz_init(MachineState *machine,
> if (cpu_model == NULL) {
> cpu_model = "R4000";
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 95cdabb..21dd2c3 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -928,7 +928,7 @@ static void create_cpu_without_cps(const char *cpu_model,
> int i;
>
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
> index 1b91195..80e2bab 100644
> --- a/hw/mips/mips_mipssim.c
> +++ b/hw/mips/mips_mipssim.c
> @@ -162,7 +162,7 @@ mips_mipssim_init(MachineState *machine)
> cpu_model = "24Kf";
> #endif
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
> index f4de9fc..81dba5e 100644
> --- a/hw/mips/mips_r4k.c
> +++ b/hw/mips/mips_r4k.c
> @@ -191,7 +191,7 @@ void mips_r4k_init(MachineState *machine)
> cpu_model = "24Kf";
> #endif
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index ae7ca80..ad4242f 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -20191,23 +20191,6 @@ void mips_tcg_init(void)
>
> #include "translate_init.c"
>
> -MIPSCPU *cpu_mips_init(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - MIPSCPU *cpu;
> -
> - oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
> - if (oc == NULL) {
> - return NULL;
> - }
> -
> - cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
> -
> - object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> -
> - return cpu;
> -}
> -
> bool cpu_supports_cps_smp(const char *cpu_model)
> {
> const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() " Igor Mammedov
2017-07-15 2:36 ` David Gibson
@ 2017-07-15 6:09 ` Hervé Poussineau
2017-08-16 19:59 ` Eduardo Habkost
2 siblings, 0 replies; 86+ messages in thread
From: Hervé Poussineau @ 2017-07-15 6:09 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Andreas Färber, Eduardo Habkost, Peter Maydell,
Alexander Graf, David Gibson, Edgar E. Iglesias, qemu-ppc
Le 14/07/2017 à 15:52, Igor Mammedov a écrit :
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
> ---
> CC: Alexander Graf <agraf@suse.de>
> CC: David Gibson <david@gibson.dropbear.id.au>
> CC: "Hervé Poussineau" <hpoussin@reactos.org>
> CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
> CC: qemu-ppc@nongnu.org
> ---
> target/ppc/cpu.h | 3 +--
> hw/ppc/e500.c | 3 ++-
> hw/ppc/mac_newworld.c | 3 ++-
> hw/ppc/mac_oldworld.c | 3 ++-
> hw/ppc/ppc440_bamboo.c | 2 +-
> hw/ppc/ppc4xx_devs.c | 2 +-
> hw/ppc/prep.c | 5 +++--
> hw/ppc/virtex_ml507.c | 2 +-
> target/ppc/translate_init.c | 5 -----
> 9 files changed, 13 insertions(+), 15 deletions(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 6ee2a26..696cbeb 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1276,7 +1276,6 @@ extern const struct VMStateDescription vmstate_ppc_cpu;
> #endif
>
> /*****************************************************************************/
> -PowerPCCPU *cpu_ppc_init(const char *cpu_model);
> void ppc_translate_init(void);
> const char *ppc_cpu_lookup_alias(const char *alias);
> /* you can call this signal handler from your SIGBUS and SIGSEGV
> @@ -1353,7 +1352,7 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn)
> int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp);
> int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val);
>
> -#define cpu_init(cpu_model) CPU(cpu_ppc_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)
>
> #define cpu_signal_handler cpu_ppc_signal_handler
> #define cpu_list ppc_cpu_list
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 62f1857..f0596f3 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -819,7 +819,8 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
> CPUState *cs;
> qemu_irq *input;
>
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
> + machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to initialize CPU!\n");
> exit(1);
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index bae1c0a..72c98e9 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -187,7 +187,8 @@ static void ppc_core99_init(MachineState *machine)
> #endif
> }
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
> + machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find PowerPC CPU definition\n");
> exit(1);
> diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> index 97bb854..6fc2a19 100644
> --- a/hw/ppc/mac_oldworld.c
> +++ b/hw/ppc/mac_oldworld.c
> @@ -116,7 +116,8 @@ static void ppc_heathrow_init(MachineState *machine)
> if (machine->cpu_model == NULL)
> machine->cpu_model = "G3";
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
> + machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find PowerPC CPU definition\n");
> exit(1);
> diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
> index 9d997bf..ca26398 100644
> --- a/hw/ppc/ppc440_bamboo.c
> +++ b/hw/ppc/ppc440_bamboo.c
> @@ -186,7 +186,7 @@ static void bamboo_init(MachineState *machine)
> if (machine->cpu_model == NULL) {
> machine->cpu_model = "440EP";
> }
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to initialize CPU!\n");
> exit(1);
> diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
> index e7f413e..6b38ed7 100644
> --- a/hw/ppc/ppc4xx_devs.c
> +++ b/hw/ppc/ppc4xx_devs.c
> @@ -56,7 +56,7 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model,
> CPUPPCState *env;
>
> /* init CPUs */
> - cpu = cpu_ppc_init(cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find PowerPC %s CPU definition\n",
> cpu_model);
> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> index 36d3dcd..00f3321 100644
> --- a/hw/ppc/prep.c
> +++ b/hw/ppc/prep.c
> @@ -520,7 +520,8 @@ static void ppc_prep_init(MachineState *machine)
> if (machine->cpu_model == NULL)
> machine->cpu_model = "602";
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
> + machine->cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find PowerPC CPU definition\n");
> exit(1);
> @@ -724,7 +725,7 @@ static void ibm_40p_init(MachineState *machine)
> if (!machine->cpu_model) {
> machine->cpu_model = "604";
> }
> - cpu = cpu_ppc_init(machine->cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
> if (!cpu) {
> error_report("could not initialize CPU '%s'",
> machine->cpu_model);
> diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
> index fdbcf22..d5fdc16 100644
> --- a/hw/ppc/virtex_ml507.c
> +++ b/hw/ppc/virtex_ml507.c
> @@ -96,7 +96,7 @@ static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
> CPUPPCState *env;
> qemu_irq *irqs;
>
> - cpu = cpu_ppc_init(cpu_model);
> + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to initialize CPU!\n");
> exit(1);
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 783bf98..b4eaabb 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -10250,11 +10250,6 @@ const char *ppc_cpu_lookup_alias(const char *alias)
> return NULL;
> }
>
> -PowerPCCPU *cpu_ppc_init(const char *cpu_model)
> -{
> - return POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
> -}
> -
> PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc)
> {
> ObjectClass *oc = OBJECT_CLASS(pcc);
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() " Igor Mammedov
@ 2017-07-15 8:05 ` Thomas Huth
2017-07-15 18:08 ` Richard Henderson
1 sibling, 0 replies; 86+ messages in thread
From: Thomas Huth @ 2017-07-15 8:05 UTC (permalink / raw)
To: Igor Mammedov; +Cc: qemu-devel, Eduardo Habkost, Peter Maydell, Laurent Vivier
Am Fri, 14 Jul 2017 15:52:05 +0200
schrieb Igor Mammedov <imammedo@redhat.com>:
> call register_m68k_insns() at realize time which makes
> cpu_m68k_init() typical object creation function.
> As result we can replace it with cpu_generic_init()
> which does the same job, reducing code duplication a bit.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> CC: Thomas Huth <huth@tuxfamily.org>
> CC: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/cpu.h | 3 +--
> hw/m68k/an5206.c | 2 +-
> hw/m68k/mcf5208.c | 2 +-
> target/m68k/cpu.c | 2 ++
> target/m68k/helper.c | 20 --------------------
> 5 files changed, 5 insertions(+), 24 deletions(-)
Patch looks good, and the Coldfire images that I have still boot fine:
Tested-by: Thomas Huth <huth@tuxfamily.org>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 12/28] alpha: replace cpu_alpha_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 12/28] alpha: replace cpu_alpha_init() " Igor Mammedov
@ 2017-07-15 18:05 ` Richard Henderson
0 siblings, 0 replies; 86+ messages in thread
From: Richard Henderson @ 2017-07-15 18:05 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Peter Maydell, Eduardo Habkost, Riku Voipio, Laurent Vivier,
Andreas Färber
On 07/14/2017 03:52 AM, Igor Mammedov wrote:
> cpu_alpha_init() used to provide default fallback if invalid
> (i.e. non existent) cpu_model were provided.
>
> dp264 machine provides its own default so sole user of fallback
> is [bsd|linux]-user targets which specifies 'any' cpu model that
> fallbacks to "ev67" in cpu_alpha_init(). Push fallback handling
> into alpha_cpu_class_by_name() and replace cpu_alpha_init() with
> cpu_generic_init().
>
> Signed-off-by: Igor Mammedov<imammedo@redhat.com>
> ---
> PS:
> tested only linux-user as I don't have bsd box to test on
>
> CC: Richard Henderson<rth@twiddle.net>
> CC: Riku Voipio<riku.voipio@iki.fi>
> CC: Laurent Vivier<laurent@vivier.eu>
> ---
> target/alpha/cpu.h | 4 +---
> hw/alpha/dp264.c | 8 ++++++--
> target/alpha/cpu.c | 20 +++++---------------
> 3 files changed, 12 insertions(+), 20 deletions(-)
Acked-by: Richard Henderson <rth@twiddle.net>
r
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 13/28] hppa: replace cpu_hppa_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 13/28] hppa: replace cpu_hppa_init() " Igor Mammedov
@ 2017-07-15 18:06 ` Richard Henderson
0 siblings, 0 replies; 86+ messages in thread
From: Richard Henderson @ 2017-07-15 18:06 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Peter Maydell, Andreas Färber, Eduardo Habkost
On 07/14/2017 03:52 AM, Igor Mammedov wrote:
> drop custom cpu_hppa_init() in favor of cpu_generic_init(),
> to make cpu_generic_init() work all we need is to provide
> cc->class_by_name callback that would resolve any cpu_model
> to the sole TYPE_HPPA_CPU to match current behaviour.
>
> Signed-off-by: Igor Mammedov<imammedo@redhat.com>
> ---
> CC: Richard Henderson<rth@twiddle.net>
>
> tested with linux-user
> ---
> target/hppa/cpu.h | 4 +---
> target/hppa/cpu.c | 11 +++--------
> 2 files changed, 4 insertions(+), 11 deletions(-)
Acked-by: Richard Henderson <rth@twiddle.net>
r~
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() " Igor Mammedov
2017-07-15 8:05 ` Thomas Huth
@ 2017-07-15 18:08 ` Richard Henderson
2017-07-15 20:57 ` Laurent Vivier
2017-07-17 10:41 ` Igor Mammedov
1 sibling, 2 replies; 86+ messages in thread
From: Richard Henderson @ 2017-07-15 18:08 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Thomas Huth, Peter Maydell, Laurent Vivier, Andreas Färber,
Eduardo Habkost
On 07/14/2017 03:52 AM, Igor Mammedov wrote:
> @@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
> M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
> Error *local_err = NULL;
>
> + register_m68k_insns(&cpu->env);
> +
I think it would make more sense to do this during m68k_tcg_init.
r~
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-07-15 18:08 ` Richard Henderson
@ 2017-07-15 20:57 ` Laurent Vivier
2017-07-17 10:41 ` Igor Mammedov
1 sibling, 0 replies; 86+ messages in thread
From: Laurent Vivier @ 2017-07-15 20:57 UTC (permalink / raw)
To: Richard Henderson, Igor Mammedov, qemu-devel
Cc: Thomas Huth, Peter Maydell, Andreas Färber, Eduardo Habkost
Le 15/07/2017 à 20:08, Richard Henderson a écrit :
> On 07/14/2017 03:52 AM, Igor Mammedov wrote:
>> @@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev,
>> Error **errp)
>> M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
>> Error *local_err = NULL;
>> + register_m68k_insns(&cpu->env);
>> +
>
> I think it would make more sense to do this during m68k_tcg_init.
I agree.
Laurent
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 01/28] mips: cpu: move mmu/fpu/mvp_init to realize time
2017-07-14 13:51 ` [Qemu-devel] [PATCH 01/28] mips: cpu: move mmu/fpu/mvp_init to realize time Igor Mammedov
@ 2017-07-15 21:48 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 86+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-07-15 21:48 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Yongbok Kim, Peter Maydell, Andreas Färber, Aurelien Jarno,
Eduardo Habkost
On 07/14/2017 10:51 AM, Igor Mammedov wrote:
> it will help to replace custom cpu_mips_init() with cpu_generic_init().
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> CC: Aurelien Jarno <aurelien@aurel32.net>
> CC: Yongbok Kim <yongbok.kim@imgtec.com>
> ---
> target/mips/cpu.h | 3 +++
> target/mips/cpu.c | 9 +++++++++
> target/mips/translate.c | 7 -------
> target/mips/translate_init.c | 6 +++---
> 4 files changed, 15 insertions(+), 10 deletions(-)
>
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 4a4747a..9c32228 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -1070,4 +1070,7 @@ static inline void QEMU_NORETURN do_raise_exception(CPUMIPSState *env,
> do_raise_exception_err(env, exception, 0, pc);
> }
>
> +void mips_cpu_mmu_init(CPUMIPSState *env, const mips_def_t *def);
> +void mips_cpu_fpu_init(CPUMIPSState *env, const mips_def_t *def);
> +void mips_cpu_mvp_init(CPUMIPSState *env, const mips_def_t *def);
> #endif /* MIPS_CPU_H */
> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
> index 1bb66b7..82afdaa 100644
> --- a/target/mips/cpu.c
> +++ b/target/mips/cpu.c
> @@ -122,9 +122,18 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) {
> static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
> {
> CPUState *cs = CPU(dev);
> + MIPSCPU *cpu = MIPS_CPU(dev);
> + CPUMIPSState *env = &cpu->env;
> MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
> Error *local_err = NULL;
>
> + env->exception_base = (int32_t)0xBFC00000;
> +#ifndef CONFIG_USER_ONLY
> + mips_cpu_mmu_init(env, env->cpu_model);
> +#endif
> + mips_cpu_fpu_init(env, env->cpu_model);
> + mips_cpu_mvp_init(env, env->cpu_model);
> +
> cpu_exec_realizefn(cs, &local_err);
> if (local_err != NULL) {
> error_propagate(errp, local_err);
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 559f8fe..7b3ae81 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -20203,13 +20203,6 @@ MIPSCPU *cpu_mips_init(const char *cpu_model)
> cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU));
> env = &cpu->env;
> env->cpu_model = def;
> - env->exception_base = (int32_t)0xBFC00000;
> -
> -#ifndef CONFIG_USER_ONLY
> - mmu_init(env, def);
> -#endif
> - fpu_init(env, def);
> - mvp_init(env, def);
>
> object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
>
> diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
> index 6ae23e4..c771ff1 100644
> --- a/target/mips/translate_init.c
> +++ b/target/mips/translate_init.c
> @@ -851,7 +851,7 @@ static void r4k_mmu_init (CPUMIPSState *env, const mips_def_t *def)
> env->tlb->helper_tlbinvf = r4k_helper_tlbinvf;
> }
>
> -static void mmu_init (CPUMIPSState *env, const mips_def_t *def)
> +void mips_cpu_mmu_init(CPUMIPSState *env, const mips_def_t *def)
> {
> MIPSCPU *cpu = mips_env_get_cpu(env);
>
> @@ -876,7 +876,7 @@ static void mmu_init (CPUMIPSState *env, const mips_def_t *def)
> }
> #endif /* CONFIG_USER_ONLY */
>
> -static void fpu_init (CPUMIPSState *env, const mips_def_t *def)
> +void mips_cpu_fpu_init(CPUMIPSState *env, const mips_def_t *def)
> {
> int i;
>
> @@ -886,7 +886,7 @@ static void fpu_init (CPUMIPSState *env, const mips_def_t *def)
> memcpy(&env->active_fpu, &env->fpus[0], sizeof(env->active_fpu));
> }
>
> -static void mvp_init (CPUMIPSState *env, const mips_def_t *def)
> +void mips_cpu_mvp_init(CPUMIPSState *env, const mips_def_t *def)
> {
> env->mvp = g_malloc0(sizeof(CPUMIPSMVPContext));
>
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses
2017-07-14 13:51 ` [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses Igor Mammedov
@ 2017-07-15 21:48 ` Philippe Mathieu-Daudé
2017-08-17 3:38 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 86+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-07-15 21:48 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Yongbok Kim, Peter Maydell, Andreas Färber, Aurelien Jarno,
Eduardo Habkost
On 07/14/2017 10:51 AM, Igor Mammedov wrote:
> Register separate QOM types for each mips cpu model,
> so it would be possible to reuse generic CPU creation
> routines.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> CC: Aurelien Jarno <aurelien@aurel32.net>
> CC: Yongbok Kim <yongbok.kim@imgtec.com>
> ---
> target/mips/cpu-qom.h | 2 ++
> target/mips/cpu.h | 57 +++++++++++++++++++++++++++++++++++++++++++-
> target/mips/cpu.c | 51 +++++++++++++++++++++++++++++++++++++++
> target/mips/translate.c | 13 +++++-----
> target/mips/translate_init.c | 57 ++------------------------------------------
> 5 files changed, 117 insertions(+), 63 deletions(-)
>
> diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
> index 3f5bf23..4b32401 100644
> --- a/target/mips/cpu-qom.h
> +++ b/target/mips/cpu-qom.h
> @@ -35,6 +35,7 @@
> #define MIPS_CPU_GET_CLASS(obj) \
> OBJECT_GET_CLASS(MIPSCPUClass, (obj), TYPE_MIPS_CPU)
>
> +typedef struct mips_def_t mips_def_t;
> /**
> * MIPSCPUClass:
> * @parent_realize: The parent class' realize handler.
> @@ -49,6 +50,7 @@ typedef struct MIPSCPUClass {
>
> DeviceRealize parent_realize;
> void (*parent_reset)(CPUState *cpu);
> + const mips_def_t *cpu_def;
> } MIPSCPUClass;
>
> typedef struct MIPSCPU MIPSCPU;
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 9c32228..7c2e0bf 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -161,7 +161,62 @@ struct CPUMIPSMVPContext {
> #define CP0MVPC1_PCP1 0
> };
>
> -typedef struct mips_def_t mips_def_t;
> +/* MMU types, the first four entries have the same layout as the
> + CP0C0_MT field. */
> +enum mips_mmu_types {
> + MMU_TYPE_NONE,
> + MMU_TYPE_R4000,
> + MMU_TYPE_RESERVED,
> + MMU_TYPE_FMT,
> + MMU_TYPE_R3000,
> + MMU_TYPE_R6000,
> + MMU_TYPE_R8000
> +};
> +
> +struct mips_def_t {
> + const char *name;
> + int32_t CP0_PRid;
> + int32_t CP0_Config0;
> + int32_t CP0_Config1;
> + int32_t CP0_Config2;
> + int32_t CP0_Config3;
> + int32_t CP0_Config4;
> + int32_t CP0_Config4_rw_bitmask;
> + int32_t CP0_Config5;
> + int32_t CP0_Config5_rw_bitmask;
> + int32_t CP0_Config6;
> + int32_t CP0_Config7;
> + target_ulong CP0_LLAddr_rw_bitmask;
> + int CP0_LLAddr_shift;
> + int32_t SYNCI_Step;
> + int32_t CCRes;
> + int32_t CP0_Status_rw_bitmask;
> + int32_t CP0_TCStatus_rw_bitmask;
> + int32_t CP0_SRSCtl;
> + int32_t CP1_fcr0;
> + int32_t CP1_fcr31_rw_bitmask;
> + int32_t CP1_fcr31;
> + int32_t MSAIR;
> + int32_t SEGBITS;
> + int32_t PABITS;
> + int32_t CP0_SRSConf0_rw_bitmask;
> + int32_t CP0_SRSConf0;
> + int32_t CP0_SRSConf1_rw_bitmask;
> + int32_t CP0_SRSConf1;
> + int32_t CP0_SRSConf2_rw_bitmask;
> + int32_t CP0_SRSConf2;
> + int32_t CP0_SRSConf3_rw_bitmask;
> + int32_t CP0_SRSConf3;
> + int32_t CP0_SRSConf4_rw_bitmask;
> + int32_t CP0_SRSConf4;
> + int32_t CP0_PageGrain_rw_bitmask;
> + int32_t CP0_PageGrain;
> + int insn_flags;
> + enum mips_mmu_types mmu_type;
> +};
> +
> +extern const struct mips_def_t mips_defs[];
> +extern const int mips_defs_number;
>
> #define MIPS_SHADOW_SET_MAX 16
> #define MIPS_TC_MAX 5
> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
> index 82afdaa..111b5ae 100644
> --- a/target/mips/cpu.c
> +++ b/target/mips/cpu.c
> @@ -151,12 +151,37 @@ static void mips_cpu_initfn(Object *obj)
> CPUState *cs = CPU(obj);
> MIPSCPU *cpu = MIPS_CPU(obj);
> CPUMIPSState *env = &cpu->env;
> + MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(obj);
>
> cs->env_ptr = env;
>
> if (tcg_enabled()) {
> mips_tcg_init();
> }
> +
> + if (mcc->cpu_def) {
> + env->cpu_model = mcc->cpu_def;
> + }
> +}
> +
> +static char *mips_cpu_type_name(const char *cpu_model)
> +{
> + return g_strdup_printf("%s-" TYPE_MIPS_CPU, cpu_model);
> +}
> +
> +static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
> +{
> + ObjectClass *oc;
> + char *typename;
> +
> + if (cpu_model == NULL) {
> + return NULL;
> + }
> +
> + typename = mips_cpu_type_name(cpu_model);
> + oc = object_class_by_name(typename);
> + g_free(typename);
> + return oc;
> }
>
> static void mips_cpu_class_init(ObjectClass *c, void *data)
> @@ -171,6 +196,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = mips_cpu_reset;
>
> + cc->class_by_name = mips_cpu_class_by_name;
> cc->has_work = mips_cpu_has_work;
> cc->do_interrupt = mips_cpu_do_interrupt;
> cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
> @@ -203,9 +229,34 @@ static const TypeInfo mips_cpu_type_info = {
> .class_init = mips_cpu_class_init,
> };
>
> +static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data)
> +{
> + MIPSCPUClass *mcc = MIPS_CPU_CLASS(oc);
> + mcc->cpu_def = data;
> +}
> +
> +static void mips_register_cpudef_type(const struct mips_def_t *def)
> +{
> + char *typename = mips_cpu_type_name(def->name);
> + TypeInfo ti = {
> + .name = typename,
> + .parent = TYPE_MIPS_CPU,
> + .class_init = mips_cpu_cpudef_class_init,
> + .class_data = (void *)def,
> + };
> +
> + type_register(&ti);
> + g_free(typename);
> +}
> +
> static void mips_cpu_register_types(void)
> {
> + int i;
> +
> type_register_static(&mips_cpu_type_info);
> + for (i = 0; i < mips_defs_number; i++) {
> + mips_register_cpudef_type(&mips_defs[i]);
> + }
> }
>
> type_init(mips_cpu_register_types)
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 7b3ae81..ae7ca80 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -20193,16 +20193,15 @@ void mips_tcg_init(void)
>
> MIPSCPU *cpu_mips_init(const char *cpu_model)
> {
> + ObjectClass *oc;
> MIPSCPU *cpu;
> - CPUMIPSState *env;
> - const mips_def_t *def;
>
> - def = cpu_mips_find_by_name(cpu_model);
> - if (!def)
> + oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
> + if (oc == NULL) {
> return NULL;
> - cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU));
> - env = &cpu->env;
> - env->cpu_model = def;
> + }
> +
> + cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
>
> object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
>
> diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
> index c771ff1..16c214b 100644
> --- a/target/mips/translate_init.c
> +++ b/target/mips/translate_init.c
> @@ -51,63 +51,9 @@
> #define MIPS_CONFIG5 \
> ((0 << CP0C5_M))
>
> -/* MMU types, the first four entries have the same layout as the
> - CP0C0_MT field. */
> -enum mips_mmu_types {
> - MMU_TYPE_NONE,
> - MMU_TYPE_R4000,
> - MMU_TYPE_RESERVED,
> - MMU_TYPE_FMT,
> - MMU_TYPE_R3000,
> - MMU_TYPE_R6000,
> - MMU_TYPE_R8000
> -};
> -
> -struct mips_def_t {
> - const char *name;
> - int32_t CP0_PRid;
> - int32_t CP0_Config0;
> - int32_t CP0_Config1;
> - int32_t CP0_Config2;
> - int32_t CP0_Config3;
> - int32_t CP0_Config4;
> - int32_t CP0_Config4_rw_bitmask;
> - int32_t CP0_Config5;
> - int32_t CP0_Config5_rw_bitmask;
> - int32_t CP0_Config6;
> - int32_t CP0_Config7;
> - target_ulong CP0_LLAddr_rw_bitmask;
> - int CP0_LLAddr_shift;
> - int32_t SYNCI_Step;
> - int32_t CCRes;
> - int32_t CP0_Status_rw_bitmask;
> - int32_t CP0_TCStatus_rw_bitmask;
> - int32_t CP0_SRSCtl;
> - int32_t CP1_fcr0;
> - int32_t CP1_fcr31_rw_bitmask;
> - int32_t CP1_fcr31;
> - int32_t MSAIR;
> - int32_t SEGBITS;
> - int32_t PABITS;
> - int32_t CP0_SRSConf0_rw_bitmask;
> - int32_t CP0_SRSConf0;
> - int32_t CP0_SRSConf1_rw_bitmask;
> - int32_t CP0_SRSConf1;
> - int32_t CP0_SRSConf2_rw_bitmask;
> - int32_t CP0_SRSConf2;
> - int32_t CP0_SRSConf3_rw_bitmask;
> - int32_t CP0_SRSConf3;
> - int32_t CP0_SRSConf4_rw_bitmask;
> - int32_t CP0_SRSConf4;
> - int32_t CP0_PageGrain_rw_bitmask;
> - int32_t CP0_PageGrain;
> - int insn_flags;
> - enum mips_mmu_types mmu_type;
> -};
> -
> /*****************************************************************************/
> /* MIPS CPU definitions */
> -static const mips_def_t mips_defs[] =
> +const mips_def_t mips_defs[] =
> {
> {
> .name = "4Kc",
> @@ -803,6 +749,7 @@ static const mips_def_t mips_defs[] =
>
> #endif
> };
> +const int mips_defs_number = ARRAY_SIZE(mips_defs);
>
> static const mips_def_t *cpu_mips_find_by_name (const char *name)
> {
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init()
2017-07-14 13:51 ` [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init() Igor Mammedov
2017-07-15 6:09 ` Hervé Poussineau
@ 2017-07-15 21:48 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 86+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-07-15 21:48 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Peter Maydell, Eduardo Habkost, Hervé Poussineau,
Yongbok Kim, Andreas Färber, Aurelien Jarno
On 07/14/2017 10:51 AM, Igor Mammedov wrote:
> now cpu_mips_init() reimplements subset of cpu_generic_init()
> tasks, so just drop it and use cpu_generic_init() directly.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> CC: Aurelien Jarno <aurelien@aurel32.net>
> CC: Yongbok Kim <yongbok.kim@imgtec.com>
> CC: "Hervé Poussineau" <hpoussin@reactos.org>
> ---
> target/mips/cpu.h | 3 +--
> hw/mips/cps.c | 2 +-
> hw/mips/mips_fulong2e.c | 2 +-
> hw/mips/mips_jazz.c | 2 +-
> hw/mips/mips_malta.c | 2 +-
> hw/mips/mips_mipssim.c | 2 +-
> hw/mips/mips_r4k.c | 2 +-
> target/mips/translate.c | 17 -----------------
> 8 files changed, 7 insertions(+), 25 deletions(-)
>
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 7c2e0bf..efc8025 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -865,10 +865,9 @@ enum {
> #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
>
> void mips_tcg_init(void);
> -MIPSCPU *cpu_mips_init(const char *cpu_model);
> int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
>
> -#define cpu_init(cpu_model) CPU(cpu_mips_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model)
> bool cpu_supports_cps_smp(const char *cpu_model);
> bool cpu_supports_isa(const char *cpu_model, unsigned int isa);
> void cpu_set_exception_base(int vp_index, target_ulong address);
> diff --git a/hw/mips/cps.c b/hw/mips/cps.c
> index 4ef337d..708899c 100644
> --- a/hw/mips/cps.c
> +++ b/hw/mips/cps.c
> @@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
> bool itu_present = false;
>
> for (i = 0; i < s->num_vp; i++) {
> - cpu = cpu_mips_init(s->cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model));
> if (cpu == NULL) {
> error_setg(errp, "%s: CPU initialization failed", __func__);
> return;
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index dbe2805..02a1712 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -277,7 +277,7 @@ static void mips_fulong2e_init(MachineState *machine)
> if (cpu_model == NULL) {
> cpu_model = "Loongson-2E";
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
> index 1cef581..ee58c44 100644
> --- a/hw/mips/mips_jazz.c
> +++ b/hw/mips/mips_jazz.c
> @@ -151,7 +151,7 @@ static void mips_jazz_init(MachineState *machine,
> if (cpu_model == NULL) {
> cpu_model = "R4000";
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 95cdabb..21dd2c3 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -928,7 +928,7 @@ static void create_cpu_without_cps(const char *cpu_model,
> int i;
>
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
> index 1b91195..80e2bab 100644
> --- a/hw/mips/mips_mipssim.c
> +++ b/hw/mips/mips_mipssim.c
> @@ -162,7 +162,7 @@ mips_mipssim_init(MachineState *machine)
> cpu_model = "24Kf";
> #endif
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
> index f4de9fc..81dba5e 100644
> --- a/hw/mips/mips_r4k.c
> +++ b/hw/mips/mips_r4k.c
> @@ -191,7 +191,7 @@ void mips_r4k_init(MachineState *machine)
> cpu_model = "24Kf";
> #endif
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index ae7ca80..ad4242f 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -20191,23 +20191,6 @@ void mips_tcg_init(void)
>
> #include "translate_init.c"
>
> -MIPSCPU *cpu_mips_init(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - MIPSCPU *cpu;
> -
> - oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
> - if (oc == NULL) {
> - return NULL;
> - }
> -
> - cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
> -
> - object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> -
> - return cpu;
> -}
> -
> bool cpu_supports_cps_smp(const char *cpu_model)
> {
> const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 15/28] microblaze: replace cpu_mb_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 15/28] microblaze: replace cpu_mb_init() " Igor Mammedov
@ 2017-07-15 21:51 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 86+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-07-15 21:51 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Peter Maydell, Edgar E. Iglesias, Andreas Färber, Eduardo Habkost
On 07/14/2017 10:52 AM, Igor Mammedov wrote:
> cpu_mb_init() always falls back to TYPE_MICROBLAZE_CPU object
> regardless of cpu_model. Put fallback logic into
> mb_cpu_class_by_name() which would translate any cpu_model
> into TYPE_MICROBLAZE_CPU class and replace cpu_mb_init()
> with cpu_generic_init().
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
> ---
> target/microblaze/cpu.h | 3 +--
> target/microblaze/cpu.c | 6 ++++++
> target/microblaze/translate.c | 11 -----------
> 3 files changed, 7 insertions(+), 13 deletions(-)
>
> diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
> index 5ce4c82..52b6b6a 100644
> --- a/target/microblaze/cpu.h
> +++ b/target/microblaze/cpu.h
> @@ -331,7 +331,6 @@ int mb_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
>
> void mb_tcg_init(void);
> -MicroBlazeCPU *cpu_mb_init(const char *cpu_model);
> /* you can call this signal handler from your SIGBUS and SIGSEGV
> signal handlers to inform the virtual CPU of exceptions. non zero
> is returned if the signal was handled by the virtual CPU. */
> @@ -344,7 +343,7 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo,
> #define TARGET_PHYS_ADDR_SPACE_BITS 32
> #define TARGET_VIRT_ADDR_SPACE_BITS 32
>
> -#define cpu_init(cpu_model) CPU(cpu_mb_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_MICROBLAZE_CPU, cpu_model)
>
> #define cpu_signal_handler cpu_mb_signal_handler
>
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index f85ff01..ddffe86 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -253,6 +253,11 @@ static Property mb_properties[] = {
> DEFINE_PROP_END_OF_LIST(),
> };
>
> +static ObjectClass *mb_cpu_class_by_name(const char *cpu_model)
> +{
> + return object_class_by_name(TYPE_MICROBLAZE_CPU);
> +}
> +
> static void mb_cpu_class_init(ObjectClass *oc, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -265,6 +270,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = mb_cpu_reset;
>
> + cc->class_by_name = mb_cpu_class_by_name;
> cc->has_work = mb_cpu_has_work;
> cc->do_interrupt = mb_cpu_do_interrupt;
> cc->cpu_exec_interrupt = mb_cpu_exec_interrupt;
> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
> index cb65d1e..c97c9d8 100644
> --- a/target/microblaze/translate.c
> +++ b/target/microblaze/translate.c
> @@ -1845,17 +1845,6 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
> cpu_fprintf(f, "\n\n");
> }
>
> -MicroBlazeCPU *cpu_mb_init(const char *cpu_model)
> -{
> - MicroBlazeCPU *cpu;
> -
> - cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
> -
> - object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> -
> - return cpu;
> -}
> -
> void mb_tcg_init(void)
> {
> int i;
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 16/28] nios2: replace cpu_nios2_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 16/28] nios2: replace cpu_nios2_init() " Igor Mammedov
@ 2017-07-15 21:53 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 86+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-07-15 21:53 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Marek Vasut, Peter Maydell, Chris Wulff, Andreas Färber,
Eduardo Habkost
On 07/14/2017 10:52 AM, Igor Mammedov wrote:
> cpu_nios2_init() always falls back to TYPE_NIOS2_CPU object
> regardless of cpu_model. Put fallback logic into
> nios2_cpu_class_by_name() which would translate any cpu_model
> into TYPE_NIOS2_CPU class and replace cpu_nios2_init()
> with cpu_generic_init()
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> CC: Chris Wulff <crwulff@gmail.com>
> CC: Marek Vasut <marex@denx.de>
> ---
> target/nios2/cpu.h | 3 +--
> hw/nios2/10m50_devboard.c | 2 +-
> target/nios2/cpu.c | 9 +++------
> 3 files changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
> index 13931f3..50d803a 100644
> --- a/target/nios2/cpu.h
> +++ b/target/nios2/cpu.h
> @@ -212,7 +212,6 @@ static inline Nios2CPU *nios2_env_get_cpu(CPUNios2State *env)
> #define ENV_OFFSET offsetof(Nios2CPU, env)
>
> void nios2_tcg_init(void);
> -Nios2CPU *cpu_nios2_init(const char *cpu_model);
> void nios2_cpu_do_interrupt(CPUState *cs);
> int cpu_nios2_signal_handler(int host_signum, void *pinfo, void *puc);
> void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUNios2State *env);
> @@ -229,7 +228,7 @@ void nios2_check_interrupts(CPUNios2State *env);
> #define TARGET_PHYS_ADDR_SPACE_BITS 32
> #define TARGET_VIRT_ADDR_SPACE_BITS 32
>
> -#define cpu_init(cpu_model) CPU(cpu_nios2_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_NIOS2_CPU, cpu_model)
>
> #define cpu_gen_code cpu_nios2_gen_code
> #define cpu_signal_handler cpu_nios2_signal_handler
> diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c
> index 051be73..c8aa116 100644
> --- a/hw/nios2/10m50_devboard.c
> +++ b/hw/nios2/10m50_devboard.c
> @@ -75,7 +75,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine)
> phys_ram_alias);
>
> /* Create CPU -- FIXME */
> - cpu = cpu_nios2_init("nios2");
> + cpu = NIOS2_CPU(cpu_generic_init(TYPE_NIOS2_CPU, "nios2"));
>
> /* Register: CPU interrupt controller (PIC) */
> cpu_irq = nios2_cpu_pic_init(cpu);
> diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
> index d56bb72..5b02fb6 100644
> --- a/target/nios2/cpu.c
> +++ b/target/nios2/cpu.c
> @@ -83,13 +83,9 @@ static void nios2_cpu_initfn(Object *obj)
> }
> }
>
> -Nios2CPU *cpu_nios2_init(const char *cpu_model)
> +static ObjectClass *nios2_cpu_class_by_name(const char *cpu_model)
> {
> - Nios2CPU *cpu = NIOS2_CPU(object_new(TYPE_NIOS2_CPU));
> -
> - object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> -
> - return cpu;
> + return object_class_by_name(TYPE_NIOS2_CPU);
> }
>
> static void nios2_cpu_realizefn(DeviceState *dev, Error **errp)
> @@ -203,6 +199,7 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data)
> ncc->parent_reset = cc->reset;
> cc->reset = nios2_cpu_reset;
>
> + cc->class_by_name = nios2_cpu_class_by_name;
> cc->has_work = nios2_cpu_has_work;
> cc->do_interrupt = nios2_cpu_do_interrupt;
> cc->cpu_exec_interrupt = nios2_cpu_exec_interrupt;
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-07-15 18:08 ` Richard Henderson
2017-07-15 20:57 ` Laurent Vivier
@ 2017-07-17 10:41 ` Igor Mammedov
2017-07-17 15:05 ` Andreas Färber
1 sibling, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-17 10:41 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, Thomas Huth, Peter Maydell, Laurent Vivier,
Andreas Färber, Eduardo Habkost
On Sat, 15 Jul 2017 08:08:58 -1000
Richard Henderson <rth@twiddle.net> wrote:
> On 07/14/2017 03:52 AM, Igor Mammedov wrote:
> > @@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
> > M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
> > Error *local_err = NULL;
> >
> > + register_m68k_insns(&cpu->env);
> > +
>
> I think it would make more sense to do this during m68k_tcg_init.
>
it seems that m68k_cpu_initfn accesses 'env' via some global,
while cpu_mk68k_init() used to access concrete pointer of just created cpu,
how about moving register_m68k_insns() to m68k_cpu_initfn(), instead?
it should be equivalent to what cpu_mk68k_init() used to do.
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-07-17 10:41 ` Igor Mammedov
@ 2017-07-17 15:05 ` Andreas Färber
2017-07-17 15:23 ` Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Andreas Färber @ 2017-07-17 15:05 UTC (permalink / raw)
To: Igor Mammedov
Cc: Richard Henderson, qemu-devel, Thomas Huth, Peter Maydell,
Laurent Vivier, Eduardo Habkost
Am 17.07.2017 um 12:41 schrieb Igor Mammedov:
> On Sat, 15 Jul 2017 08:08:58 -1000
> Richard Henderson <rth@twiddle.net> wrote:
>
>> On 07/14/2017 03:52 AM, Igor Mammedov wrote:
>>> @@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
>>> M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
>>> Error *local_err = NULL;
>>>
>>> + register_m68k_insns(&cpu->env);
>>> +
>>
>> I think it would make more sense to do this during m68k_tcg_init.
>>
> it seems that m68k_cpu_initfn accesses 'env' via some global,
> while cpu_mk68k_init() used to access concrete pointer of just created cpu,
>
> how about moving register_m68k_insns() to m68k_cpu_initfn(), instead?
> it should be equivalent to what cpu_mk68k_init() used to do.
As a general note, realize should be re-entrant. Can't tell from the
above diff whether that is the case here.
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-07-17 15:05 ` Andreas Färber
@ 2017-07-17 15:23 ` Igor Mammedov
2017-08-14 8:00 ` Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-17 15:23 UTC (permalink / raw)
To: Andreas Färber
Cc: Richard Henderson, qemu-devel, Thomas Huth, Peter Maydell,
Laurent Vivier, Eduardo Habkost
On Mon, 17 Jul 2017 17:05:15 +0200
Andreas Färber <afaerber@suse.de> wrote:
> Am 17.07.2017 um 12:41 schrieb Igor Mammedov:
> > On Sat, 15 Jul 2017 08:08:58 -1000
> > Richard Henderson <rth@twiddle.net> wrote:
> >
> >> On 07/14/2017 03:52 AM, Igor Mammedov wrote:
> >>> @@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
> >>> M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
> >>> Error *local_err = NULL;
> >>>
> >>> + register_m68k_insns(&cpu->env);
> >>> +
> >>
> >> I think it would make more sense to do this during m68k_tcg_init.
> >>
> > it seems that m68k_cpu_initfn accesses 'env' via some global,
> > while cpu_mk68k_init() used to access concrete pointer of just created cpu,
> >
> > how about moving register_m68k_insns() to m68k_cpu_initfn(), instead?
> > it should be equivalent to what cpu_mk68k_init() used to do.
>
> As a general note, realize should be re-entrant. Can't tell from the
> above diff whether that is the case here.
Looking at
void register_m68k_insns (CPUM68KState *env)
{
/* Build the opcode table only once to avoid
multithreading issues. */
if (opcode_table[0] != NULL) {
return;
}
it is save to use multiple times,
also looking further in it:
#define BASE(name, opcode, mask) \
register_opcode(disas_##name, 0x##opcode, 0x##mask)
#define INSN(name, opcode, mask, feature) do { \
if (m68k_feature(env, M68K_FEATURE_##feature)) \
BASE(name, opcode, mask); \
} while(0)
BASE(undef, 0000, 0000);
INSN(arith_im, 0080, fff8, CF_ISA_A);
INSN macro depends on enabled features, it might work with current code that
has no user settable features but it will break once that is available.
So I retract my suggestion to move register_m68k_insns() into m68k_cpu_initfn()
and keep it as it's in this patch (in m68k_cpu_realizefn()),
that way features theoretically set between initfn(and m68k_tcg_init) and realize() will
have effect on created cpu and we won't have to fix it in future.
> Regards,
> Andreas
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() " Igor Mammedov
@ 2017-07-18 12:30 ` Cornelia Huck
2017-07-18 13:17 ` Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Cornelia Huck @ 2017-07-18 12:30 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Andreas Färber, Eduardo Habkost, Peter Maydell,
Richard Henderson, Alexander Graf, Thomas Huth
On Fri, 14 Jul 2017 15:52:02 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> cpu_s390x_init() is used only *-user targets indirectly
> via cpu_init() macro and has a hack to assign ids to created
> cpus (I'm not sure if 'id' really matters to *-user emulation).
>
> So to on safe side, instead of having custom wrapper to do numbering
> replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id
> which could serve the same purpose as static variable and move cpu->id
> initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case.
>
> PS:
> ifdef is ugly but it allows us to hide s390x detail that isn't
> set by *-user targets and reuse generic cpu creation utility
> for btoh machine and user emulation.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> perhaps cpu->id isn't need by CONFIG_USER_ONLY but I'd leave to it
> s390x maintainers to deal with it.
>
> CC: Richard Henderson <rth@twiddle.net>
> CC: Alexander Graf <agraf@suse.de>
> CC: Cornelia Huck <cohuck@redhat.com>
> CC: Thomas Huth <thuth@redhat.com>
> ---
> target/s390x/cpu.h | 3 +--
> target/s390x/cpu.c | 7 +++++++
> target/s390x/helper.c | 14 --------------
> 3 files changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
> index bdb9bdb..b6d25c6 100644
> --- a/target/s390x/cpu.h
> +++ b/target/s390x/cpu.h
> @@ -477,7 +477,6 @@ static inline bool get_per_in_range(CPUS390XState *env, uint64_t addr)
> void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);
> #endif
>
> -S390CPU *cpu_s390x_init(const char *cpu_model);
> S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp);
> S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp);
> void s390x_translate_init(void);
> @@ -641,7 +640,7 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
>
> extern void subsystem_reset(void);
>
> -#define cpu_init(model) CPU(cpu_s390x_init(model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model)
> #define cpu_signal_handler cpu_s390x_signal_handler
>
> void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf);
> diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> index accef03..e40a26f 100644
> --- a/target/s390x/cpu.c
> +++ b/target/s390x/cpu.c
> @@ -303,6 +303,13 @@ static void s390_cpu_initfn(Object *obj)
> inited = true;
> s390x_translate_init();
> }
> +
> +#if defined(CONFIG_USER_ONLY)
> + {
> + S390CPUClass *scc = S390_CPU_GET_CLASS(obj);
> + cpu->id = scc->next_cpu_id;
> + }
> +#endif
What about the null machine, which calls cpu_init() as well? Am I
missing something?
> }
>
> static void s390_cpu_finalize(Object *obj)
> diff --git a/target/s390x/helper.c b/target/s390x/helper.c
> index aef09e1..632b030 100644
> --- a/target/s390x/helper.c
> +++ b/target/s390x/helper.c
> @@ -129,20 +129,6 @@ out:
> return cpu;
> }
>
> -S390CPU *cpu_s390x_init(const char *cpu_model)
> -{
> - Error *err = NULL;
> - S390CPU *cpu;
> - /* Use to track CPU ID for linux-user only */
> - static int64_t next_cpu_id;
> -
> - cpu = s390x_new_cpu(cpu_model, next_cpu_id++, &err);
> - if (err) {
> - error_report_err(err);
> - }
> - return cpu;
> -}
> -
> #if defined(CONFIG_USER_ONLY)
>
> void s390_cpu_do_interrupt(CPUState *cs)
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() with cpu_generic_init()
2017-07-18 12:30 ` Cornelia Huck
@ 2017-07-18 13:17 ` Igor Mammedov
2017-08-14 8:03 ` Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-07-18 13:17 UTC (permalink / raw)
To: Cornelia Huck
Cc: qemu-devel, Andreas Färber, Eduardo Habkost, Peter Maydell,
Richard Henderson, Alexander Graf, Thomas Huth
On Tue, 18 Jul 2017 14:30:09 +0200
Cornelia Huck <cohuck@redhat.com> wrote:
> On Fri, 14 Jul 2017 15:52:02 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
> > cpu_s390x_init() is used only *-user targets indirectly
> > via cpu_init() macro and has a hack to assign ids to created
> > cpus (I'm not sure if 'id' really matters to *-user emulation).
> >
> > So to on safe side, instead of having custom wrapper to do numbering
> > replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id
> > which could serve the same purpose as static variable and move cpu->id
> > initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case.
> >
> > PS:
> > ifdef is ugly but it allows us to hide s390x detail that isn't
> > set by *-user targets and reuse generic cpu creation utility
> > for btoh machine and user emulation.
> >
> > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > ---
> > perhaps cpu->id isn't need by CONFIG_USER_ONLY but I'd leave to it
> > s390x maintainers to deal with it.
> >
> > CC: Richard Henderson <rth@twiddle.net>
> > CC: Alexander Graf <agraf@suse.de>
> > CC: Cornelia Huck <cohuck@redhat.com>
> > CC: Thomas Huth <thuth@redhat.com>
> > ---
> > target/s390x/cpu.h | 3 +--
> > target/s390x/cpu.c | 7 +++++++
> > target/s390x/helper.c | 14 --------------
> > 3 files changed, 8 insertions(+), 16 deletions(-)
> >
> > diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
> > index bdb9bdb..b6d25c6 100644
> > --- a/target/s390x/cpu.h
> > +++ b/target/s390x/cpu.h
> > @@ -477,7 +477,6 @@ static inline bool get_per_in_range(CPUS390XState *env, uint64_t addr)
> > void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);
> > #endif
> >
> > -S390CPU *cpu_s390x_init(const char *cpu_model);
> > S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp);
> > S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp);
> > void s390x_translate_init(void);
> > @@ -641,7 +640,7 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
> >
> > extern void subsystem_reset(void);
> >
> > -#define cpu_init(model) CPU(cpu_s390x_init(model))
> > +#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model)
> > #define cpu_signal_handler cpu_s390x_signal_handler
> >
> > void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf);
> > diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> > index accef03..e40a26f 100644
> > --- a/target/s390x/cpu.c
> > +++ b/target/s390x/cpu.c
> > @@ -303,6 +303,13 @@ static void s390_cpu_initfn(Object *obj)
> > inited = true;
> > s390x_translate_init();
> > }
> > +
> > +#if defined(CONFIG_USER_ONLY)
> > + {
> > + S390CPUClass *scc = S390_CPU_GET_CLASS(obj);
> > + cpu->id = scc->next_cpu_id;
> > + }
> > +#endif
>
> What about the null machine, which calls cpu_init() as well? Am I
> missing something?
it creates only 1 cpu so for it following will be true:
cpu->id == 0 and also scc->next_cpu_id == 0 at s390_cpu_initfn() time
then at realize() time scc->next_cpu_id++ happens and no more cpus could
be created in case of null machine.
Considering no -smp support for null-machine, we shouldn't care about
multiple instantiations with cpu_init() there.
If we would ever start caring about -smp there, then we should
explicitly create cpus with properly set properties like other boards
do.
>
> > }
> >
> > static void s390_cpu_finalize(Object *obj)
> > diff --git a/target/s390x/helper.c b/target/s390x/helper.c
> > index aef09e1..632b030 100644
> > --- a/target/s390x/helper.c
> > +++ b/target/s390x/helper.c
> > @@ -129,20 +129,6 @@ out:
> > return cpu;
> > }
> >
> > -S390CPU *cpu_s390x_init(const char *cpu_model)
> > -{
> > - Error *err = NULL;
> > - S390CPU *cpu;
> > - /* Use to track CPU ID for linux-user only */
> > - static int64_t next_cpu_id;
> > -
> > - cpu = s390x_new_cpu(cpu_model, next_cpu_id++, &err);
> > - if (err) {
> > - error_report_err(err);
> > - }
> > - return cpu;
> > -}
> > -
> > #if defined(CONFIG_USER_ONLY)
> >
> > void s390_cpu_do_interrupt(CPUState *cs)
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses
2017-07-14 13:51 ` [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses Igor Mammedov
@ 2017-08-14 7:56 ` Igor Mammedov
2017-08-14 16:24 ` Artyom Tarasenko
2017-08-15 11:27 ` Mark Cave-Ayland
2017-08-17 3:50 ` Philippe Mathieu-Daudé
1 sibling, 2 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-08-14 7:56 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Mark Cave-Ayland, Andreas Färber,
Artyom Tarasenko, Eduardo Habkost
On Fri, 14 Jul 2017 15:51:55 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> QOMfy cpu models handling introducing propper cpu types
> for each cpu model.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> with this and conversion of features to properties,
> it would be possible to replace cpu_sparc_init() with
> cpu_generic_init() and reuse common -cpu handling
> infrastructure.
>
> CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> CC: Artyom Tarasenko <atar4qemu@gmail.com>
ping,
Mark, Artoym,
As SPARC maintainers, cloud you please review/test patches 4-10/28.
[...]
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-07-17 15:23 ` Igor Mammedov
@ 2017-08-14 8:00 ` Igor Mammedov
2017-08-14 18:23 ` Laurent Vivier
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-08-14 8:00 UTC (permalink / raw)
To: Andreas Färber
Cc: Peter Maydell, Eduardo Habkost, Thomas Huth, Laurent Vivier,
qemu-devel, Richard Henderson
On Mon, 17 Jul 2017 17:23:22 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Mon, 17 Jul 2017 17:05:15 +0200
> Andreas Färber <afaerber@suse.de> wrote:
>
> > Am 17.07.2017 um 12:41 schrieb Igor Mammedov:
> > > On Sat, 15 Jul 2017 08:08:58 -1000
> > > Richard Henderson <rth@twiddle.net> wrote:
> > >
> > >> On 07/14/2017 03:52 AM, Igor Mammedov wrote:
> > >>> @@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
> > >>> M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
> > >>> Error *local_err = NULL;
> > >>>
> > >>> + register_m68k_insns(&cpu->env);
> > >>> +
> > >>
> > >> I think it would make more sense to do this during m68k_tcg_init.
> > >>
> > > it seems that m68k_cpu_initfn accesses 'env' via some global,
> > > while cpu_mk68k_init() used to access concrete pointer of just created cpu,
> > >
> > > how about moving register_m68k_insns() to m68k_cpu_initfn(), instead?
> > > it should be equivalent to what cpu_mk68k_init() used to do.
> >
> > As a general note, realize should be re-entrant. Can't tell from the
> > above diff whether that is the case here.
> Looking at
>
> void register_m68k_insns (CPUM68KState *env)
> {
> /* Build the opcode table only once to avoid
> multithreading issues. */
> if (opcode_table[0] != NULL) {
> return;
> }
>
> it is save to use multiple times,
>
> also looking further in it:
>
> #define BASE(name, opcode, mask) \
> register_opcode(disas_##name, 0x##opcode, 0x##mask)
> #define INSN(name, opcode, mask, feature) do { \
> if (m68k_feature(env, M68K_FEATURE_##feature)) \
> BASE(name, opcode, mask); \
> } while(0)
> BASE(undef, 0000, 0000);
> INSN(arith_im, 0080, fff8, CF_ISA_A);
>
> INSN macro depends on enabled features, it might work with current code that
> has no user settable features but it will break once that is available.
>
> So I retract my suggestion to move register_m68k_insns() into m68k_cpu_initfn()
> and keep it as it's in this patch (in m68k_cpu_realizefn()),
> that way features theoretically set between initfn(and m68k_tcg_init) and realize() will
> have effect on created cpu and we won't have to fix it in future.
Richard, Laurent,
Do you agree with keeping register_m68k_insns() in realize()?
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() with cpu_generic_init()
2017-07-18 13:17 ` Igor Mammedov
@ 2017-08-14 8:03 ` Igor Mammedov
2017-08-14 8:53 ` Cornelia Huck
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-08-14 8:03 UTC (permalink / raw)
To: Cornelia Huck
Cc: Peter Maydell, Thomas Huth, Eduardo Habkost, Alexander Graf,
qemu-devel, Andreas Färber, Richard Henderson
On Tue, 18 Jul 2017 15:17:21 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Tue, 18 Jul 2017 14:30:09 +0200
> Cornelia Huck <cohuck@redhat.com> wrote:
>
> > On Fri, 14 Jul 2017 15:52:02 +0200
> > Igor Mammedov <imammedo@redhat.com> wrote:
> >
> > > cpu_s390x_init() is used only *-user targets indirectly
> > > via cpu_init() macro and has a hack to assign ids to created
> > > cpus (I'm not sure if 'id' really matters to *-user emulation).
> > >
> > > So to on safe side, instead of having custom wrapper to do numbering
> > > replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id
> > > which could serve the same purpose as static variable and move cpu->id
> > > initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case.
> > >
> > > PS:
> > > ifdef is ugly but it allows us to hide s390x detail that isn't
> > > set by *-user targets and reuse generic cpu creation utility
> > > for btoh machine and user emulation.
> > >
> > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > > ---
> > > perhaps cpu->id isn't need by CONFIG_USER_ONLY but I'd leave to it
> > > s390x maintainers to deal with it.
> > >
> > > CC: Richard Henderson <rth@twiddle.net>
> > > CC: Alexander Graf <agraf@suse.de>
> > > CC: Cornelia Huck <cohuck@redhat.com>
> > > CC: Thomas Huth <thuth@redhat.com>
> > > ---
> > > target/s390x/cpu.h | 3 +--
> > > target/s390x/cpu.c | 7 +++++++
> > > target/s390x/helper.c | 14 --------------
> > > 3 files changed, 8 insertions(+), 16 deletions(-)
> > >
> > > diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
> > > index bdb9bdb..b6d25c6 100644
> > > --- a/target/s390x/cpu.h
> > > +++ b/target/s390x/cpu.h
> > > @@ -477,7 +477,6 @@ static inline bool get_per_in_range(CPUS390XState *env, uint64_t addr)
> > > void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);
> > > #endif
> > >
> > > -S390CPU *cpu_s390x_init(const char *cpu_model);
> > > S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp);
> > > S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp);
> > > void s390x_translate_init(void);
> > > @@ -641,7 +640,7 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
> > >
> > > extern void subsystem_reset(void);
> > >
> > > -#define cpu_init(model) CPU(cpu_s390x_init(model))
> > > +#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model)
> > > #define cpu_signal_handler cpu_s390x_signal_handler
> > >
> > > void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf);
> > > diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> > > index accef03..e40a26f 100644
> > > --- a/target/s390x/cpu.c
> > > +++ b/target/s390x/cpu.c
> > > @@ -303,6 +303,13 @@ static void s390_cpu_initfn(Object *obj)
> > > inited = true;
> > > s390x_translate_init();
> > > }
> > > +
> > > +#if defined(CONFIG_USER_ONLY)
> > > + {
> > > + S390CPUClass *scc = S390_CPU_GET_CLASS(obj);
> > > + cpu->id = scc->next_cpu_id;
> > > + }
> > > +#endif
> >
> > What about the null machine, which calls cpu_init() as well? Am I
> > missing something?
> it creates only 1 cpu so for it following will be true:
> cpu->id == 0 and also scc->next_cpu_id == 0 at s390_cpu_initfn() time
> then at realize() time scc->next_cpu_id++ happens and no more cpus could
> be created in case of null machine.
>
> Considering no -smp support for null-machine, we shouldn't care about
> multiple instantiations with cpu_init() there.
> If we would ever start caring about -smp there, then we should
> explicitly create cpus with properly set properties like other boards
> do.
ping,
Cornelia,
considering my previous reply does this patch look fine to you?
>
> >
> > > }
> > >
> > > static void s390_cpu_finalize(Object *obj)
> > > diff --git a/target/s390x/helper.c b/target/s390x/helper.c
> > > index aef09e1..632b030 100644
> > > --- a/target/s390x/helper.c
> > > +++ b/target/s390x/helper.c
> > > @@ -129,20 +129,6 @@ out:
> > > return cpu;
> > > }
> > >
> > > -S390CPU *cpu_s390x_init(const char *cpu_model)
> > > -{
> > > - Error *err = NULL;
> > > - S390CPU *cpu;
> > > - /* Use to track CPU ID for linux-user only */
> > > - static int64_t next_cpu_id;
> > > -
> > > - cpu = s390x_new_cpu(cpu_model, next_cpu_id++, &err);
> > > - if (err) {
> > > - error_report_err(err);
> > > - }
> > > - return cpu;
> > > -}
> > > -
> > > #if defined(CONFIG_USER_ONLY)
> > >
> > > void s390_cpu_do_interrupt(CPUState *cs)
> >
>
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 21/28] arm: replace cpu_arm_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 21/28] arm: replace cpu_arm_init() " Igor Mammedov
@ 2017-08-14 8:53 ` Andrew Jones
0 siblings, 0 replies; 86+ messages in thread
From: Andrew Jones @ 2017-08-14 8:53 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Eduardo Habkost, qemu-arm, Jan Kiszka,
Andreas Färber
On Fri, Jul 14, 2017 at 03:52:12PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> CC: Jan Kiszka <jan.kiszka@web.de>
> CC: Peter Maydell <peter.maydell@linaro.org>
> CC: Andrzej Zaborowski <balrogg@gmail.com>
> CC: qemu-arm@nongnu.org
> ---
> target/arm/cpu.h | 3 +--
> hw/arm/musicpal.c | 2 +-
> hw/arm/omap1.c | 2 +-
> hw/arm/omap2.c | 2 +-
> hw/arm/pxa2xx.c | 4 ++--
> hw/arm/strongarm.c | 2 +-
> target/arm/helper.c | 5 -----
> 7 files changed, 7 insertions(+), 13 deletions(-)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 16a1e59..c9be0ac 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -746,7 +746,6 @@ int aarch64_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> #endif
>
> -ARMCPU *cpu_arm_init(const char *cpu_model);
> target_ulong do_arm_semihosting(CPUARMState *env);
> void aarch64_sync_32_to_64(CPUARMState *env);
> void aarch64_sync_64_to_32(CPUARMState *env);
> @@ -1999,7 +1998,7 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx,
> return unmasked || pstate_unmasked;
> }
>
> -#define cpu_init(cpu_model) CPU(cpu_arm_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_ARM_CPU, cpu_model)
>
> #define cpu_signal_handler cpu_arm_signal_handler
> #define cpu_list arm_cpu_list
> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
> index 9c710f7..0d519f9 100644
> --- a/hw/arm/musicpal.c
> +++ b/hw/arm/musicpal.c
> @@ -1593,7 +1593,7 @@ static void musicpal_init(MachineState *machine)
> if (!cpu_model) {
> cpu_model = "arm926";
> }
> - cpu = cpu_arm_init(cpu_model);
> + cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, cpu_model));
> if (!cpu) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
> index 54582bd..391eb28 100644
> --- a/hw/arm/omap1.c
> +++ b/hw/arm/omap1.c
> @@ -3863,7 +3863,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
>
> /* Core */
> s->mpu_model = omap310;
> - s->cpu = cpu_arm_init(core);
> + s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, core));
> if (s->cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c
> index 91f5733..a20bb1f 100644
> --- a/hw/arm/omap2.c
> +++ b/hw/arm/omap2.c
> @@ -2261,7 +2261,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
>
> /* Core */
> s->mpu_model = omap2420;
> - s->cpu = cpu_arm_init(core ?: "arm1136-r2");
> + s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, core ?: "arm1136-r2"));
> if (s->cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
> index 629e6c6..2f1c141 100644
> --- a/hw/arm/pxa2xx.c
> +++ b/hw/arm/pxa2xx.c
> @@ -2065,7 +2065,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
> if (!revision)
> revision = "pxa270";
>
> - s->cpu = cpu_arm_init(revision);
> + s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, revision));
> if (s->cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> @@ -2197,7 +2197,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
>
> s = g_new0(PXA2xxState, 1);
>
> - s->cpu = cpu_arm_init("pxa255");
> + s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, "pxa255"));
> if (s->cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
> index 7683edc..a27d7c8 100644
> --- a/hw/arm/strongarm.c
> +++ b/hw/arm/strongarm.c
> @@ -1597,7 +1597,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
> exit(1);
> }
>
> - s->cpu = cpu_arm_init(rev);
> + s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, rev));
>
> if (!s->cpu) {
> error_report("Unable to find CPU definition");
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 2594faa..86e69a6 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -5237,11 +5237,6 @@ void register_cp_regs_for_features(ARMCPU *cpu)
> }
> }
>
> -ARMCPU *cpu_arm_init(const char *cpu_model)
> -{
> - return ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, cpu_model));
> -}
> -
> void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
> {
> CPUState *cs = CPU(cpu);
> --
> 2.7.4
>
>
I agree with the motivation described in the cover letter and the changes
(which are even mostly verified by the compiler) look good to me.
Reviewed-by: Andrew Jones <drjones@redhat.com>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() with cpu_generic_init()
2017-08-14 8:03 ` Igor Mammedov
@ 2017-08-14 8:53 ` Cornelia Huck
2017-08-14 9:24 ` Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Cornelia Huck @ 2017-08-14 8:53 UTC (permalink / raw)
To: Igor Mammedov
Cc: Peter Maydell, Thomas Huth, Eduardo Habkost, Alexander Graf,
qemu-devel, Andreas Färber, Richard Henderson
On Mon, 14 Aug 2017 10:03:48 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Tue, 18 Jul 2017 15:17:21 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
> > On Tue, 18 Jul 2017 14:30:09 +0200
> > Cornelia Huck <cohuck@redhat.com> wrote:
> >
> > > On Fri, 14 Jul 2017 15:52:02 +0200
> > > Igor Mammedov <imammedo@redhat.com> wrote:
> > >
> > > > cpu_s390x_init() is used only *-user targets indirectly
> > > > via cpu_init() macro and has a hack to assign ids to created
> > > > cpus (I'm not sure if 'id' really matters to *-user emulation).
> > > >
> > > > So to on safe side, instead of having custom wrapper to do numbering
> > > > replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id
> > > > which could serve the same purpose as static variable and move cpu->id
> > > > initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case.
> > > >
> > > > PS:
> > > > ifdef is ugly but it allows us to hide s390x detail that isn't
> > > > set by *-user targets and reuse generic cpu creation utility
> > > > for btoh machine and user emulation.
> > > >
> > > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > > > ---
> > > > perhaps cpu->id isn't need by CONFIG_USER_ONLY but I'd leave to it
> > > > s390x maintainers to deal with it.
> > > >
> > > > CC: Richard Henderson <rth@twiddle.net>
> > > > CC: Alexander Graf <agraf@suse.de>
> > > > CC: Cornelia Huck <cohuck@redhat.com>
> > > > CC: Thomas Huth <thuth@redhat.com>
> > > > ---
> > > > target/s390x/cpu.h | 3 +--
> > > > target/s390x/cpu.c | 7 +++++++
> > > > target/s390x/helper.c | 14 --------------
> > > > 3 files changed, 8 insertions(+), 16 deletions(-)
> > > >
> > > > diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
> > > > index bdb9bdb..b6d25c6 100644
> > > > --- a/target/s390x/cpu.h
> > > > +++ b/target/s390x/cpu.h
> > > > @@ -477,7 +477,6 @@ static inline bool get_per_in_range(CPUS390XState *env, uint64_t addr)
> > > > void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);
> > > > #endif
> > > >
> > > > -S390CPU *cpu_s390x_init(const char *cpu_model);
> > > > S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp);
> > > > S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp);
> > > > void s390x_translate_init(void);
> > > > @@ -641,7 +640,7 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
> > > >
> > > > extern void subsystem_reset(void);
> > > >
> > > > -#define cpu_init(model) CPU(cpu_s390x_init(model))
> > > > +#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model)
> > > > #define cpu_signal_handler cpu_s390x_signal_handler
> > > >
> > > > void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf);
> > > > diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> > > > index accef03..e40a26f 100644
> > > > --- a/target/s390x/cpu.c
> > > > +++ b/target/s390x/cpu.c
> > > > @@ -303,6 +303,13 @@ static void s390_cpu_initfn(Object *obj)
> > > > inited = true;
> > > > s390x_translate_init();
> > > > }
> > > > +
> > > > +#if defined(CONFIG_USER_ONLY)
> > > > + {
> > > > + S390CPUClass *scc = S390_CPU_GET_CLASS(obj);
> > > > + cpu->id = scc->next_cpu_id;
> > > > + }
> > > > +#endif
> > >
> > > What about the null machine, which calls cpu_init() as well? Am I
> > > missing something?
> > it creates only 1 cpu so for it following will be true:
> > cpu->id == 0 and also scc->next_cpu_id == 0 at s390_cpu_initfn() time
> > then at realize() time scc->next_cpu_id++ happens and no more cpus could
> > be created in case of null machine.
> >
> > Considering no -smp support for null-machine, we shouldn't care about
> > multiple instantiations with cpu_init() there.
> > If we would ever start caring about -smp there, then we should
> > explicitly create cpus with properly set properties like other boards
> > do.
> ping,
>
> Cornelia,
> considering my previous reply does this patch look fine to you?
Sorry, that one fell through the cracks.
We may want to revisit this later; but for now, it should be fine.
I assume you want to merge this as a series? In that case,
Acked-by: Cornelia Huck <cohuck@redhat.com>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() with cpu_generic_init()
2017-08-14 8:53 ` Cornelia Huck
@ 2017-08-14 9:24 ` Igor Mammedov
2017-08-14 9:27 ` Cornelia Huck
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-08-14 9:24 UTC (permalink / raw)
To: Cornelia Huck
Cc: Peter Maydell, Thomas Huth, Eduardo Habkost, Alexander Graf,
qemu-devel, Andreas Färber, Richard Henderson
On Mon, 14 Aug 2017 10:53:37 +0200
Cornelia Huck <cohuck@redhat.com> wrote:
> On Mon, 14 Aug 2017 10:03:48 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
> > On Tue, 18 Jul 2017 15:17:21 +0200
> > Igor Mammedov <imammedo@redhat.com> wrote:
> >
> > > On Tue, 18 Jul 2017 14:30:09 +0200
> > > Cornelia Huck <cohuck@redhat.com> wrote:
> > >
> > > > On Fri, 14 Jul 2017 15:52:02 +0200
> > > > Igor Mammedov <imammedo@redhat.com> wrote:
> > > >
> > > > > cpu_s390x_init() is used only *-user targets indirectly
> > > > > via cpu_init() macro and has a hack to assign ids to created
> > > > > cpus (I'm not sure if 'id' really matters to *-user emulation).
> > > > >
> > > > > So to on safe side, instead of having custom wrapper to do numbering
> > > > > replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id
> > > > > which could serve the same purpose as static variable and move cpu->id
> > > > > initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case.
> > > > >
> > > > > PS:
> > > > > ifdef is ugly but it allows us to hide s390x detail that isn't
> > > > > set by *-user targets and reuse generic cpu creation utility
> > > > > for btoh machine and user emulation.
> > > > >
> > > > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > > > > ---
> > > > > perhaps cpu->id isn't need by CONFIG_USER_ONLY but I'd leave to it
> > > > > s390x maintainers to deal with it.
> > > > >
> > > > > CC: Richard Henderson <rth@twiddle.net>
> > > > > CC: Alexander Graf <agraf@suse.de>
> > > > > CC: Cornelia Huck <cohuck@redhat.com>
> > > > > CC: Thomas Huth <thuth@redhat.com>
> > > > > ---
> > > > > target/s390x/cpu.h | 3 +--
> > > > > target/s390x/cpu.c | 7 +++++++
> > > > > target/s390x/helper.c | 14 --------------
> > > > > 3 files changed, 8 insertions(+), 16 deletions(-)
> > > > >
> > > > > diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
> > > > > index bdb9bdb..b6d25c6 100644
> > > > > --- a/target/s390x/cpu.h
> > > > > +++ b/target/s390x/cpu.h
> > > > > @@ -477,7 +477,6 @@ static inline bool get_per_in_range(CPUS390XState *env, uint64_t addr)
> > > > > void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);
> > > > > #endif
> > > > >
> > > > > -S390CPU *cpu_s390x_init(const char *cpu_model);
> > > > > S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp);
> > > > > S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp);
> > > > > void s390x_translate_init(void);
> > > > > @@ -641,7 +640,7 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
> > > > >
> > > > > extern void subsystem_reset(void);
> > > > >
> > > > > -#define cpu_init(model) CPU(cpu_s390x_init(model))
> > > > > +#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model)
> > > > > #define cpu_signal_handler cpu_s390x_signal_handler
> > > > >
> > > > > void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf);
> > > > > diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> > > > > index accef03..e40a26f 100644
> > > > > --- a/target/s390x/cpu.c
> > > > > +++ b/target/s390x/cpu.c
> > > > > @@ -303,6 +303,13 @@ static void s390_cpu_initfn(Object *obj)
> > > > > inited = true;
> > > > > s390x_translate_init();
> > > > > }
> > > > > +
> > > > > +#if defined(CONFIG_USER_ONLY)
> > > > > + {
> > > > > + S390CPUClass *scc = S390_CPU_GET_CLASS(obj);
> > > > > + cpu->id = scc->next_cpu_id;
> > > > > + }
> > > > > +#endif
> > > >
> > > > What about the null machine, which calls cpu_init() as well? Am I
> > > > missing something?
> > > it creates only 1 cpu so for it following will be true:
> > > cpu->id == 0 and also scc->next_cpu_id == 0 at s390_cpu_initfn() time
> > > then at realize() time scc->next_cpu_id++ happens and no more cpus could
> > > be created in case of null machine.
> > >
> > > Considering no -smp support for null-machine, we shouldn't care about
> > > multiple instantiations with cpu_init() there.
> > > If we would ever start caring about -smp there, then we should
> > > explicitly create cpus with properly set properties like other boards
> > > do.
> > ping,
> >
> > Cornelia,
> > considering my previous reply does this patch look fine to you?
>
> Sorry, that one fell through the cracks.
>
> We may want to revisit this later; but for now, it should be fine.
I didn't look at possibility of refactoring next_cpu_id usage as
it's out of scope of this series. But from my understanding, it's been
introduced to support legacy cpu_add interface and enforce sequential
hotplug of CPUs when device_add CPU infrastructure hasn't been ready
yet. Perhaps S390 gurus could now refactor CPU hotplug to device_add
interface and get rid of next_cpu_id in process.
>
> I assume you want to merge this as a series? In that case,
>
> Acked-by: Cornelia Huck <cohuck@redhat.com>
Thanks!
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() with cpu_generic_init()
2017-08-14 9:24 ` Igor Mammedov
@ 2017-08-14 9:27 ` Cornelia Huck
0 siblings, 0 replies; 86+ messages in thread
From: Cornelia Huck @ 2017-08-14 9:27 UTC (permalink / raw)
To: Igor Mammedov
Cc: Peter Maydell, Thomas Huth, Eduardo Habkost, Alexander Graf,
qemu-devel, Andreas Färber, Richard Henderson
On Mon, 14 Aug 2017 11:24:07 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> I didn't look at possibility of refactoring next_cpu_id usage as
> it's out of scope of this series. But from my understanding, it's been
> introduced to support legacy cpu_add interface and enforce sequential
> hotplug of CPUs when device_add CPU infrastructure hasn't been ready
> yet. Perhaps S390 gurus could now refactor CPU hotplug to device_add
> interface and get rid of next_cpu_id in process.
Yup, much potential there. I won't mind if someone wants to look at
this.
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses
2017-08-14 7:56 ` Igor Mammedov
@ 2017-08-14 16:24 ` Artyom Tarasenko
2017-08-15 7:38 ` Igor Mammedov
2017-08-15 11:27 ` Mark Cave-Ayland
1 sibling, 1 reply; 86+ messages in thread
From: Artyom Tarasenko @ 2017-08-14 16:24 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Mark Cave-Ayland, Andreas Färber,
Eduardo Habkost
Hi Igor,
On Mon, Aug 14, 2017 at 9:56 AM, Igor Mammedov <imammedo@redhat.com> wrote:
> On Fri, 14 Jul 2017 15:51:55 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
>> QOMfy cpu models handling introducing propper cpu types
>> for each cpu model.
>>
>> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
>> ---
>> with this and conversion of features to properties,
>> it would be possible to replace cpu_sparc_init() with
>> cpu_generic_init() and reuse common -cpu handling
>> infrastructure.
>>
>> CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>> CC: Artyom Tarasenko <atar4qemu@gmail.com>
>
> ping,
>
> Mark, Artoym,
>
> As SPARC maintainers, cloud you please review/test patches 4-10/28.
Will look on it on the upcoming weekend.
> + /* SPARC cpu model names happen to have whitespaces,
> + * as type names shouldn't have spaces replace them with '-'
> + */
Does it also happen for non-SPARC cpu model names?
Artyom
--
Regards,
Artyom Tarasenko
SPARC and PPC PReP under qemu blog: http://tyom.blogspot.com/search/label/qemu
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init()
2017-08-14 8:00 ` Igor Mammedov
@ 2017-08-14 18:23 ` Laurent Vivier
0 siblings, 0 replies; 86+ messages in thread
From: Laurent Vivier @ 2017-08-14 18:23 UTC (permalink / raw)
To: Igor Mammedov, Andreas Färber
Cc: Peter Maydell, Eduardo Habkost, Thomas Huth, qemu-devel,
Richard Henderson
Le 14/08/2017 à 10:00, Igor Mammedov a écrit :
> On Mon, 17 Jul 2017 17:23:22 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
>> On Mon, 17 Jul 2017 17:05:15 +0200
>> Andreas Färber <afaerber@suse.de> wrote:
>>
>>> Am 17.07.2017 um 12:41 schrieb Igor Mammedov:
>>>> On Sat, 15 Jul 2017 08:08:58 -1000
>>>> Richard Henderson <rth@twiddle.net> wrote:
>>>>
>>>>> On 07/14/2017 03:52 AM, Igor Mammedov wrote:
>>>>>> @@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
>>>>>> M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
>>>>>> Error *local_err = NULL;
>>>>>>
>>>>>> + register_m68k_insns(&cpu->env);
>>>>>> +
>>>>>
>>>>> I think it would make more sense to do this during m68k_tcg_init.
>>>>>
>>>> it seems that m68k_cpu_initfn accesses 'env' via some global,
>>>> while cpu_mk68k_init() used to access concrete pointer of just created cpu,
>>>>
>>>> how about moving register_m68k_insns() to m68k_cpu_initfn(), instead?
>>>> it should be equivalent to what cpu_mk68k_init() used to do.
>>>
>>> As a general note, realize should be re-entrant. Can't tell from the
>>> above diff whether that is the case here.
>> Looking at
>>
>> void register_m68k_insns (CPUM68KState *env)
>> {
>> /* Build the opcode table only once to avoid
>> multithreading issues. */
>> if (opcode_table[0] != NULL) {
>> return;
>> }
>>
>> it is save to use multiple times,
>>
>> also looking further in it:
>>
>> #define BASE(name, opcode, mask) \
>> register_opcode(disas_##name, 0x##opcode, 0x##mask)
>> #define INSN(name, opcode, mask, feature) do { \
>> if (m68k_feature(env, M68K_FEATURE_##feature)) \
>> BASE(name, opcode, mask); \
>> } while(0)
>> BASE(undef, 0000, 0000);
>> INSN(arith_im, 0080, fff8, CF_ISA_A);
>>
>> INSN macro depends on enabled features, it might work with current code that
>> has no user settable features but it will break once that is available.
>>
>> So I retract my suggestion to move register_m68k_insns() into m68k_cpu_initfn()
>> and keep it as it's in this patch (in m68k_cpu_realizefn()),
>> that way features theoretically set between initfn(and m68k_tcg_init) and realize() will
>> have effect on created cpu and we won't have to fix it in future.
>
> Richard, Laurent,
>
> Do you agree with keeping register_m68k_insns() in realize()?
>
I agree.
Acked-by: Laurent Vivier <laurent@vivier.eu>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses
2017-08-14 16:24 ` Artyom Tarasenko
@ 2017-08-15 7:38 ` Igor Mammedov
0 siblings, 0 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-08-15 7:38 UTC (permalink / raw)
To: Artyom Tarasenko
Cc: qemu-devel, Peter Maydell, Mark Cave-Ayland, Andreas Färber,
Eduardo Habkost
On Mon, 14 Aug 2017 18:24:31 +0200
Artyom Tarasenko <atar4qemu@gmail.com> wrote:
> Hi Igor,
>
> On Mon, Aug 14, 2017 at 9:56 AM, Igor Mammedov <imammedo@redhat.com> wrote:
> > On Fri, 14 Jul 2017 15:51:55 +0200
> > Igor Mammedov <imammedo@redhat.com> wrote:
> >
> >> QOMfy cpu models handling introducing propper cpu types
> >> for each cpu model.
> >>
> >> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> >> ---
> >> with this and conversion of features to properties,
> >> it would be possible to replace cpu_sparc_init() with
> >> cpu_generic_init() and reuse common -cpu handling
> >> infrastructure.
> >>
> >> CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> >> CC: Artyom Tarasenko <atar4qemu@gmail.com>
> >
> > ping,
> >
> > Mark, Artoym,
> >
> > As SPARC maintainers, cloud you please review/test patches 4-10/28.
>
> Will look on it on the upcoming weekend.
>
> > + /* SPARC cpu model names happen to have whitespaces,
> > + * as type names shouldn't have spaces replace them with '-'
> > + */
>
> Does it also happen for non-SPARC cpu model names?
not that I know of, there is nothing we can do about cpu model names
as it's user facing value and fixing them would break user's scripts,
hence target specific quirk in sparc_cpu_class_by_name().
Other targets have their own quirks, like cpu aliases which also
handled on per target basis in foo_cpu_class_by_name() callbacks.
>
> Artyom
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses
2017-08-14 7:56 ` Igor Mammedov
2017-08-14 16:24 ` Artyom Tarasenko
@ 2017-08-15 11:27 ` Mark Cave-Ayland
1 sibling, 0 replies; 86+ messages in thread
From: Mark Cave-Ayland @ 2017-08-15 11:27 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Peter Maydell, Andreas Färber, Artyom Tarasenko, Eduardo Habkost
On 14/08/17 08:56, Igor Mammedov wrote:
> On Fri, 14 Jul 2017 15:51:55 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
>> QOMfy cpu models handling introducing propper cpu types
>> for each cpu model.
>>
>> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
>> ---
>> with this and conversion of features to properties,
>> it would be possible to replace cpu_sparc_init() with
>> cpu_generic_init() and reuse common -cpu handling
>> infrastructure.
>>
>> CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>> CC: Artyom Tarasenko <atar4qemu@gmail.com>
>
> ping,
>
> Mark, Artoym,
>
> As SPARC maintainers, cloud you please review/test patches 4-10/28.
Yes, sorry - it has been a fairly busy few weeks. I should have some
time to look at these towards the end of the week.
ATB,
Mark.
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 08/28] x86: extract legacy cpu features format parser
2017-07-14 13:51 ` [Qemu-devel] [PATCH 08/28] x86: extract legacy cpu features format parser Igor Mammedov
@ 2017-08-16 19:32 ` Eduardo Habkost
2017-08-17 14:07 ` [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:32 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Riku Voipio, Laurent Vivier,
Paolo Bonzini, Andreas Färber, Richard Henderson
On Fri, Jul 14, 2017 at 03:51:59PM +0200, Igor Mammedov wrote:
> Move cpu_model +-feat parsing into a separate file so that it
> could be reused later for parsing similar format of sparc target
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> CC: Riku Voipio <riku.voipio@iki.fi>
> CC: Laurent Vivier <laurent@vivier.eu>
> CC: Paolo Bonzini <pbonzini@redhat.com>
> CC: Richard Henderson <rth@twiddle.net>
> CC: Eduardo Habkost <ehabkost@redhat.com>
> ---
> include/qom/cpu.h | 6 ++
> default-configs/i386-bsd-user.mak | 1 +
> default-configs/i386-linux-user.mak | 1 +
> default-configs/i386-softmmu.mak | 1 +
> default-configs/x86_64-bsd-user.mak | 1 +
> default-configs/x86_64-linux-user.mak | 1 +
> default-configs/x86_64-softmmu.mak | 1 +
> target/i386/cpu.c | 124 ++-------------------------
> util/Makefile.objs | 1 +
> util/legacy_cpu_features_parser.c | 153 ++++++++++++++++++++++++++++++++++
> 10 files changed, 172 insertions(+), 118 deletions(-)
> create mode 100644 util/legacy_cpu_features_parser.c
>
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index 7bfd50c..60aea03 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -1039,4 +1039,10 @@ extern const struct VMStateDescription vmstate_cpu_common;
>
> #define UNASSIGNED_CPU_INDEX -1
>
> +int cpu_legacy_apply_features(Object *obj, GList *features, bool enable,
> + Error **errp);
> +
> +void cpu_legacy_parse_featurestr(const char *typename, char *features,
> + GList **plus_features, GList **minus_features,
> + Error **errp);
plus_features and minus_features only exist because of a (now
fixed) bug in the handling of cpu->max_features, and we don't
need them anymore, see the comment at x86_cpu_expand_features():
/*TODO: Now cpu->max_features doesn't overwrite features
* set using QOM properties, and we can convert
* plus_features & minus_features to global properties
* inside x86_cpu_parse_featurestr() too.
*/
Let's remove them instead of exposing this unnecessary misfeature
on the generic API.
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 17/28] tilegx: replace cpu_tilegx_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 17/28] tilegx: replace cpu_tilegx_init() " Igor Mammedov
@ 2017-08-16 19:53 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:53 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Laurent Vivier, David Gibson,
Andreas Färber, Richard Henderson
On Fri, Jul 14, 2017 at 03:52:08PM +0200, Igor Mammedov wrote:
> cpu_tilegx_init() always falls back to TYPE_TILEGX_CPU object
> regardless of cpu_model. Put fallback logic into
> tilegx_cpu_class_by_name() which would translate any cpu_model
> into TYPE_TILEGX_CPU class and replace cpu_tilegx_init()
> with cpu_generic_init().
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() " Igor Mammedov
@ 2017-08-16 19:56 ` Eduardo Habkost
2017-08-17 14:32 ` Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:56 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Max Filippov, Peter Maydell, Andreas Färber
On Fri, Jul 14, 2017 at 03:52:09PM +0200, Igor Mammedov wrote:
> call xtensa_irq_init() at realize time which makes
> cpu_xtensa_init() like generic cpu creation function.
> As result we can replace it with cpu_generic_init()
> which does the same job, reducing code duplication a bit.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Looks good to me. Were you able to test it?
> ---
> CC: Max Filippov <jcmvbkbc@gmail.com>
> ---
> target/xtensa/cpu.h | 4 +---
> hw/xtensa/sim.c | 2 +-
> hw/xtensa/xtfpga.c | 2 +-
> target/xtensa/cpu.c | 3 +++
> target/xtensa/helper.c | 22 ----------------------
> 5 files changed, 6 insertions(+), 27 deletions(-)
>
> diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
> index ee29fb1..4803331 100644
> --- a/target/xtensa/cpu.h
> +++ b/target/xtensa/cpu.h
> @@ -475,9 +475,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
> #define XTENSA_DEFAULT_CPU_MODEL "dc232b"
> #endif
>
> -XtensaCPU *cpu_xtensa_init(const char *cpu_model);
> -
> -#define cpu_init(cpu_model) CPU(cpu_xtensa_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_XTENSA_CPU, cpu_model)
>
> void xtensa_translate_init(void);
> void xtensa_breakpoint_handler(CPUState *cs);
> diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
> index 5521e91..bf1f729 100644
> --- a/hw/xtensa/sim.c
> +++ b/hw/xtensa/sim.c
> @@ -86,7 +86,7 @@ static void xtensa_sim_init(MachineState *machine)
> }
>
> for (n = 0; n < smp_cpus; n++) {
> - cpu = cpu_xtensa_init(cpu_model);
> + cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
> if (cpu == NULL) {
> error_report("unable to find CPU definition '%s'",
> cpu_model);
> diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
> index d5ac080..b656660 100644
> --- a/hw/xtensa/xtfpga.c
> +++ b/hw/xtensa/xtfpga.c
> @@ -232,7 +232,7 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
> }
>
> for (n = 0; n < smp_cpus; n++) {
> - cpu = cpu_xtensa_init(cpu_model);
> + cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
> if (cpu == NULL) {
> error_report("unable to find CPU definition '%s'",
> cpu_model);
> diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
> index cd7f958..85897df 100644
> --- a/target/xtensa/cpu.c
> +++ b/target/xtensa/cpu.c
> @@ -100,9 +100,12 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
> static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
> {
> CPUState *cs = CPU(dev);
> + XtensaCPU *cpu = XTENSA_CPU(dev);
> XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
> Error *local_err = NULL;
>
> + xtensa_irq_init(&cpu->env);
> +
> cpu_exec_realizefn(cs, &local_err);
> if (local_err != NULL) {
> error_propagate(errp, local_err);
> diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
> index bcd0b77..e8fba20 100644
> --- a/target/xtensa/helper.c
> +++ b/target/xtensa/helper.c
> @@ -113,28 +113,6 @@ void xtensa_breakpoint_handler(CPUState *cs)
> }
> }
>
> -XtensaCPU *cpu_xtensa_init(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - XtensaCPU *cpu;
> - CPUXtensaState *env;
> -
> - oc = cpu_class_by_name(TYPE_XTENSA_CPU, cpu_model);
> - if (oc == NULL) {
> - return NULL;
> - }
> -
> - cpu = XTENSA_CPU(object_new(object_class_get_name(oc)));
> - env = &cpu->env;
> -
> - xtensa_irq_init(env);
> -
> - object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> -
> - return cpu;
> -}
> -
> -
> void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf)
> {
> XtensaConfigList *core = xtensa_cores;
> --
> 2.7.4
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 19/28] tricore: replace cpu_tricore_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 19/28] tricore: replace cpu_tricore_init() " Igor Mammedov
@ 2017-08-16 19:56 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:56 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Bastian Koppelmann, Andreas Färber
On Fri, Jul 14, 2017 at 03:52:10PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 20/28] sh4: replace cpu_sh4_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 20/28] sh4: replace cpu_sh4_init() " Igor Mammedov
@ 2017-08-16 19:57 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:57 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Magnus Damm, Andreas Färber,
Aurelien Jarno
On Fri, Jul 14, 2017 at 03:52:11PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 22/28] cris: replace cpu_cris_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 22/28] cris: replace cpu_cris_init() " Igor Mammedov
@ 2017-08-16 19:57 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:57 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Edgar E. Iglesias, Andreas Färber
On Fri, Jul 14, 2017 at 03:52:13PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 23/28] x86: replace cpu_x86_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 23/28] x86: replace cpu_x86_init() " Igor Mammedov
@ 2017-08-16 19:57 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:57 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Richard Henderson, Paolo Bonzini,
Andreas Färber
On Fri, Jul 14, 2017 at 03:52:14PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 25/28] moxie: replace cpu_moxie_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 25/28] moxie: replace cpu_moxie_init() " Igor Mammedov
@ 2017-08-16 19:58 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:58 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Anthony Green, Andreas Färber
On Fri, Jul 14, 2017 at 03:52:16PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() " Igor Mammedov
@ 2017-08-16 19:58 ` Eduardo Habkost
2017-08-16 21:28 ` Stafford Horne
1 sibling, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:58 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Stafford Horne, Andreas Färber, Jia Liu
On Fri, Jul 14, 2017 at 03:52:17PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() " Igor Mammedov
2017-07-14 15:51 ` Michael Walle
@ 2017-08-16 19:58 ` Eduardo Habkost
1 sibling, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:58 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, Michael Walle, Andreas Färber
On Fri, Jul 14, 2017 at 03:52:15PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 27/28] unicore32: replace uc32_cpu_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 27/28] unicore32: replace uc32_cpu_init() " Igor Mammedov
@ 2017-08-16 19:59 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:59 UTC (permalink / raw)
To: Igor Mammedov; +Cc: qemu-devel, Peter Maydell, Guan Xuetao, Andreas Färber
On Fri, Jul 14, 2017 at 03:52:18PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() " Igor Mammedov
2017-07-15 2:36 ` David Gibson
2017-07-15 6:09 ` Hervé Poussineau
@ 2017-08-16 19:59 ` Eduardo Habkost
2 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-16 19:59 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Peter Maydell, qemu-ppc, Alexander Graf,
Hervé Poussineau, Edgar E. Iglesias, Andreas Färber,
David Gibson
On Fri, Jul 14, 2017 at 03:52:19PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() with cpu_generic_init()
2017-07-14 13:52 ` [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() " Igor Mammedov
2017-08-16 19:58 ` Eduardo Habkost
@ 2017-08-16 21:28 ` Stafford Horne
1 sibling, 0 replies; 86+ messages in thread
From: Stafford Horne @ 2017-08-16 21:28 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Andreas Färber, Eduardo Habkost, Peter Maydell, Jia Liu
On Fri, Jul 14, 2017 at 03:52:17PM +0200, Igor Mammedov wrote:
> it's just a wrapper, drop it and use cpu_generic_init() directly
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> CC: Jia Liu <proljc@gmail.com>
> CC: Stafford Horne <shorne@gmail.com>
> ---
> target/openrisc/cpu.h | 4 +---
> hw/openrisc/openrisc_sim.c | 2 +-
> target/openrisc/cpu.c | 5 -----
> 3 files changed, 2 insertions(+), 9 deletions(-)
Sorry, I thought I had acked this earlier.
Acked-by: Stafford Horne <shorne@gmail.com>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses
2017-07-15 21:48 ` Philippe Mathieu-Daudé
@ 2017-08-17 3:38 ` Philippe Mathieu-Daudé
2017-08-17 10:53 ` Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-08-17 3:38 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Yongbok Kim, Peter Maydell, Andreas Färber, Aurelien Jarno,
Eduardo Habkost
Hi Igor,
On 07/15/2017 06:48 PM, Philippe Mathieu-Daudé wrote:
> On 07/14/2017 10:51 AM, Igor Mammedov wrote:
>> Register separate QOM types for each mips cpu model,
>> so it would be possible to reuse generic CPU creation
>> routines.
>>
>> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
>> ---
>> CC: Aurelien Jarno <aurelien@aurel32.net>
>> CC: Yongbok Kim <yongbok.kim@imgtec.com>
>> ---
>> target/mips/cpu-qom.h | 2 ++
>> target/mips/cpu.h | 57
>> +++++++++++++++++++++++++++++++++++++++++++-
>> target/mips/cpu.c | 51
>> +++++++++++++++++++++++++++++++++++++++
>> target/mips/translate.c | 13 +++++-----
>> target/mips/translate_init.c | 57
>> ++------------------------------------------
>> 5 files changed, 117 insertions(+), 63 deletions(-)
>>
>> diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
>> index 3f5bf23..4b32401 100644
>> --- a/target/mips/cpu-qom.h
>> +++ b/target/mips/cpu-qom.h
>> @@ -35,6 +35,7 @@
>> #define MIPS_CPU_GET_CLASS(obj) \
>> OBJECT_GET_CLASS(MIPSCPUClass, (obj), TYPE_MIPS_CPU)
>> +typedef struct mips_def_t mips_def_t;
>> /**
>> * MIPSCPUClass:
>> * @parent_realize: The parent class' realize handler.
>> @@ -49,6 +50,7 @@ typedef struct MIPSCPUClass {
>> DeviceRealize parent_realize;
>> void (*parent_reset)(CPUState *cpu);
>> + const mips_def_t *cpu_def;
>> } MIPSCPUClass;
>> typedef struct MIPSCPU MIPSCPU;
>> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
>> index 9c32228..7c2e0bf 100644
>> --- a/target/mips/cpu.h
>> +++ b/target/mips/cpu.h
>> @@ -161,7 +161,62 @@ struct CPUMIPSMVPContext {
>> #define CP0MVPC1_PCP1 0
>> };
>> -typedef struct mips_def_t mips_def_t;
>> +/* MMU types, the first four entries have the same layout as the
>> + CP0C0_MT field. */
>> +enum mips_mmu_types {
>> + MMU_TYPE_NONE,
>> + MMU_TYPE_R4000,
>> + MMU_TYPE_RESERVED,
>> + MMU_TYPE_FMT,
>> + MMU_TYPE_R3000,
>> + MMU_TYPE_R6000,
>> + MMU_TYPE_R8000
>> +};
>> +
>> +struct mips_def_t {
>> + const char *name;
>> + int32_t CP0_PRid;
>> + int32_t CP0_Config0;
>> + int32_t CP0_Config1;
>> + int32_t CP0_Config2;
>> + int32_t CP0_Config3;
>> + int32_t CP0_Config4;
>> + int32_t CP0_Config4_rw_bitmask;
>> + int32_t CP0_Config5;
>> + int32_t CP0_Config5_rw_bitmask;
>> + int32_t CP0_Config6;
>> + int32_t CP0_Config7;
>> + target_ulong CP0_LLAddr_rw_bitmask;
>> + int CP0_LLAddr_shift;
>> + int32_t SYNCI_Step;
>> + int32_t CCRes;
>> + int32_t CP0_Status_rw_bitmask;
>> + int32_t CP0_TCStatus_rw_bitmask;
>> + int32_t CP0_SRSCtl;
>> + int32_t CP1_fcr0;
>> + int32_t CP1_fcr31_rw_bitmask;
>> + int32_t CP1_fcr31;
>> + int32_t MSAIR;
>> + int32_t SEGBITS;
>> + int32_t PABITS;
>> + int32_t CP0_SRSConf0_rw_bitmask;
>> + int32_t CP0_SRSConf0;
>> + int32_t CP0_SRSConf1_rw_bitmask;
>> + int32_t CP0_SRSConf1;
>> + int32_t CP0_SRSConf2_rw_bitmask;
>> + int32_t CP0_SRSConf2;
>> + int32_t CP0_SRSConf3_rw_bitmask;
>> + int32_t CP0_SRSConf3;
>> + int32_t CP0_SRSConf4_rw_bitmask;
>> + int32_t CP0_SRSConf4;
>> + int32_t CP0_PageGrain_rw_bitmask;
>> + int32_t CP0_PageGrain;
>> + int insn_flags;
>> + enum mips_mmu_types mmu_type;
>> +};
>> +
>> +extern const struct mips_def_t mips_defs[];
>> +extern const int mips_defs_number;
>> #define MIPS_SHADOW_SET_MAX 16
>> #define MIPS_TC_MAX 5
>> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
>> index 82afdaa..111b5ae 100644
>> --- a/target/mips/cpu.c
>> +++ b/target/mips/cpu.c
>> @@ -151,12 +151,37 @@ static void mips_cpu_initfn(Object *obj)
>> CPUState *cs = CPU(obj);
>> MIPSCPU *cpu = MIPS_CPU(obj);
>> CPUMIPSState *env = &cpu->env;
>> + MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(obj);
>> cs->env_ptr = env;
>> if (tcg_enabled()) {
>> mips_tcg_init();
>> }
>> +
>> + if (mcc->cpu_def) {
>> + env->cpu_model = mcc->cpu_def;
>> + }
>> +}
>> +
>> +static char *mips_cpu_type_name(const char *cpu_model)
>> +{
>> + return g_strdup_printf("%s-" TYPE_MIPS_CPU, cpu_model);
>> +}
>> +
>> +static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
>> +{
>> + ObjectClass *oc;
>> + char *typename;
>> +
>> + if (cpu_model == NULL) {
>> + return NULL;
>> + }
>> +
>> + typename = mips_cpu_type_name(cpu_model);
>> + oc = object_class_by_name(typename);
>> + g_free(typename);
>> + return oc;
>> }
>> static void mips_cpu_class_init(ObjectClass *c, void *data)
>> @@ -171,6 +196,7 @@ static void mips_cpu_class_init(ObjectClass *c,
>> void *data)
>> mcc->parent_reset = cc->reset;
>> cc->reset = mips_cpu_reset;
>> + cc->class_by_name = mips_cpu_class_by_name;
Now than I'm reading again...
>> cc->has_work = mips_cpu_has_work;
>> cc->do_interrupt = mips_cpu_do_interrupt;
>> cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
>> @@ -203,9 +229,34 @@ static const TypeInfo mips_cpu_type_info = {
Shouldn't this class now be abstract?
>> .class_init = mips_cpu_class_init,
>> };
>> +static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data)
>> +{
>> + MIPSCPUClass *mcc = MIPS_CPU_CLASS(oc);
>> + mcc->cpu_def = data;
>> +}
>> +
>> +static void mips_register_cpudef_type(const struct mips_def_t *def)
>> +{
>> + char *typename = mips_cpu_type_name(def->name);
>> + TypeInfo ti = {
>> + .name = typename,
>> + .parent = TYPE_MIPS_CPU,
>> + .class_init = mips_cpu_cpudef_class_init,
>> + .class_data = (void *)def,
>> + };
>> +
>> + type_register(&ti);
>> + g_free(typename);
>> +}
>> +
>> static void mips_cpu_register_types(void)
>> {
>> + int i;
>> +
>> type_register_static(&mips_cpu_type_info);
>> + for (i = 0; i < mips_defs_number; i++) {
>> + mips_register_cpudef_type(&mips_defs[i]);
>> + }
>> }
>> type_init(mips_cpu_register_types)
>> diff --git a/target/mips/translate.c b/target/mips/translate.c
>> index 7b3ae81..ae7ca80 100644
>> --- a/target/mips/translate.c
>> +++ b/target/mips/translate.c
>> @@ -20193,16 +20193,15 @@ void mips_tcg_init(void)
>> MIPSCPU *cpu_mips_init(const char *cpu_model)
>> {
>> + ObjectClass *oc;
>> MIPSCPU *cpu;
>> - CPUMIPSState *env;
>> - const mips_def_t *def;
>> - def = cpu_mips_find_by_name(cpu_model);
>> - if (!def)
>> + oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
>> + if (oc == NULL) {
>> return NULL;
>> - cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU));
>> - env = &cpu->env;
>> - env->cpu_model = def;
>> + }
>> +
>> + cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
>> object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
>> diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
>> index c771ff1..16c214b 100644
>> --- a/target/mips/translate_init.c
>> +++ b/target/mips/translate_init.c
>> @@ -51,63 +51,9 @@
>> #define MIPS_CONFIG5 \
>> ((0 << CP0C5_M))
>> -/* MMU types, the first four entries have the same layout as the
>> - CP0C0_MT field. */
>> -enum mips_mmu_types {
>> - MMU_TYPE_NONE,
>> - MMU_TYPE_R4000,
>> - MMU_TYPE_RESERVED,
>> - MMU_TYPE_FMT,
>> - MMU_TYPE_R3000,
>> - MMU_TYPE_R6000,
>> - MMU_TYPE_R8000
>> -};
>> -
>> -struct mips_def_t {
>> - const char *name;
>> - int32_t CP0_PRid;
>> - int32_t CP0_Config0;
>> - int32_t CP0_Config1;
>> - int32_t CP0_Config2;
>> - int32_t CP0_Config3;
>> - int32_t CP0_Config4;
>> - int32_t CP0_Config4_rw_bitmask;
>> - int32_t CP0_Config5;
>> - int32_t CP0_Config5_rw_bitmask;
>> - int32_t CP0_Config6;
>> - int32_t CP0_Config7;
>> - target_ulong CP0_LLAddr_rw_bitmask;
>> - int CP0_LLAddr_shift;
>> - int32_t SYNCI_Step;
>> - int32_t CCRes;
>> - int32_t CP0_Status_rw_bitmask;
>> - int32_t CP0_TCStatus_rw_bitmask;
>> - int32_t CP0_SRSCtl;
>> - int32_t CP1_fcr0;
>> - int32_t CP1_fcr31_rw_bitmask;
>> - int32_t CP1_fcr31;
>> - int32_t MSAIR;
>> - int32_t SEGBITS;
>> - int32_t PABITS;
>> - int32_t CP0_SRSConf0_rw_bitmask;
>> - int32_t CP0_SRSConf0;
>> - int32_t CP0_SRSConf1_rw_bitmask;
>> - int32_t CP0_SRSConf1;
>> - int32_t CP0_SRSConf2_rw_bitmask;
>> - int32_t CP0_SRSConf2;
>> - int32_t CP0_SRSConf3_rw_bitmask;
>> - int32_t CP0_SRSConf3;
>> - int32_t CP0_SRSConf4_rw_bitmask;
>> - int32_t CP0_SRSConf4;
>> - int32_t CP0_PageGrain_rw_bitmask;
>> - int32_t CP0_PageGrain;
>> - int insn_flags;
>> - enum mips_mmu_types mmu_type;
>> -};
>> -
>>
>> /*****************************************************************************/
>>
>> /* MIPS CPU definitions */
>> -static const mips_def_t mips_defs[] =
>> +const mips_def_t mips_defs[] =
>> {
>> {
>> .name = "4Kc",
>> @@ -803,6 +749,7 @@ static const mips_def_t mips_defs[] =
>> #endif
>> };
>> +const int mips_defs_number = ARRAY_SIZE(mips_defs);
>> static const mips_def_t *cpu_mips_find_by_name (const char *name)
>> {
>>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses
2017-07-14 13:51 ` [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses Igor Mammedov
2017-08-14 7:56 ` Igor Mammedov
@ 2017-08-17 3:50 ` Philippe Mathieu-Daudé
2017-08-17 14:11 ` Igor Mammedov
1 sibling, 1 reply; 86+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-08-17 3:50 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: Peter Maydell, Mark Cave-Ayland, Andreas Färber,
Artyom Tarasenko, Eduardo Habkost
On 07/14/2017 10:51 AM, Igor Mammedov wrote:
> QOMfy cpu models handling introducing propper cpu types
> for each cpu model.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> with this and conversion of features to properties,
> it would be possible to replace cpu_sparc_init() with
> cpu_generic_init() and reuse common -cpu handling
> infrastructure.
>
> CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> CC: Artyom Tarasenko <atar4qemu@gmail.com>
> ---
> target/sparc/cpu-qom.h | 2 +
> target/sparc/cpu.c | 119 +++++++++++++++++++++++++++++++++----------------
> 2 files changed, 83 insertions(+), 38 deletions(-)
>
> diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h
> index f63af72..af6d57a 100644
> --- a/target/sparc/cpu-qom.h
> +++ b/target/sparc/cpu-qom.h
> @@ -35,6 +35,7 @@
> #define SPARC_CPU_GET_CLASS(obj) \
> OBJECT_GET_CLASS(SPARCCPUClass, (obj), TYPE_SPARC_CPU)
>
> +typedef struct sparc_def_t sparc_def_t;
> /**
> * SPARCCPUClass:
> * @parent_realize: The parent class' realize handler.
> @@ -49,6 +50,7 @@ typedef struct SPARCCPUClass {
>
> DeviceRealize parent_realize;
> void (*parent_reset)(CPUState *cpu);
> + sparc_def_t *cpu_def;
> } SPARCCPUClass;
>
> typedef struct SPARCCPU SPARCCPU;
> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
> index d606eb5..f8cf751 100644
> --- a/target/sparc/cpu.c
> +++ b/target/sparc/cpu.c
> @@ -25,8 +25,6 @@
>
> //#define DEBUG_FEATURES
>
> -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
> -
> /* CPUClass::reset() */
> static void sparc_cpu_reset(CPUState *s)
> {
> @@ -111,17 +109,9 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
> {
> CPUSPARCState *env = &cpu->env;
> char *s = g_strdup(cpu_model);
> - char *featurestr, *name = strtok(s, ",");
> - sparc_def_t def1, *def = &def1;
> + char *featurestr = strtok(s, ",");
> Error *err = NULL;
>
> - if (cpu_sparc_find_by_name(def, name) < 0) {
> - g_free(s);
> - return -1;
> - }
> -
> - env->def = g_memdup(def, sizeof(*def));
> -
> featurestr = strtok(NULL, ",");
> sparc_cpu_parse_features(CPU(cpu), featurestr, &err);
> g_free(s);
> @@ -130,18 +120,18 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
> return -1;
> }
>
> - env->version = def->iu_version;
> - env->fsr = def->fpu_version;
> - env->nwindows = def->nwindows;
> + env->version = env->def->iu_version;
> + env->fsr = env->def->fpu_version;
> + env->nwindows = env->def->nwindows;
> #if !defined(TARGET_SPARC64)
> - env->mmuregs[0] |= def->mmu_version;
> + env->mmuregs[0] |= env->def->mmu_version;
> cpu_sparc_set_id(env, 0);
> - env->mxccregs[7] |= def->mxcc_version;
> + env->mxccregs[7] |= env->def->mxcc_version;
> #else
> - env->mmu_version = def->mmu_version;
> - env->maxtl = def->maxtl;
> - env->version |= def->maxtl << 8;
> - env->version |= def->nwindows - 1;
> + env->mmu_version = env->def->mmu_version;
> + env->maxtl = env->def->maxtl;
> + env->version |= env->def->maxtl << 8;
> + env->version |= env->def->nwindows - 1;
> #endif
> return 0;
> }
> @@ -149,8 +139,19 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
> SPARCCPU *cpu_sparc_init(const char *cpu_model)
> {
> SPARCCPU *cpu;
> + ObjectClass *oc;
> + char *str, *name;
> +
> + str = g_strdup(cpu_model);
> + name = strtok(str, ",");
> + oc = cpu_class_by_name(TYPE_SPARC_CPU, name);
> + if (oc == NULL) {
> + g_free(str);
> + return NULL;
> + }
> + g_free(str);
>
> - cpu = SPARC_CPU(object_new(TYPE_SPARC_CPU));
> + cpu = SPARC_CPU(object_new(object_class_get_name(oc)));
>
> if (cpu_sparc_register(cpu, cpu_model) < 0) {
> object_unref(OBJECT(cpu));
> @@ -553,23 +554,6 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features)
> error_report("CPU feature %s not found", flagname);
> }
>
> -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *name)
> -{
> - unsigned int i;
> - const sparc_def_t *def = NULL;
> -
> - for (i = 0; i < ARRAY_SIZE(sparc_defs); i++) {
> - if (strcasecmp(name, sparc_defs[i].name) == 0) {
> - def = &sparc_defs[i];
> - }
> - }
> - if (!def) {
> - return -1;
> - }
> - memcpy(cpu_def, def, sizeof(*def));
> - return 0;
> -}
> -
> static void sparc_cpu_parse_features(CPUState *cs, char *features,
> Error **errp)
> {
> @@ -796,6 +780,36 @@ static bool sparc_cpu_has_work(CPUState *cs)
> cpu_interrupts_enabled(env);
> }
>
> +static char *sparc_cpu_type_name(const char *cpu_model)
> +{
> + char *name = g_strdup_printf("%s-" TYPE_SPARC_CPU, cpu_model);
> + char *s = name;
> +
> + /* SPARC cpu model names happen to have whitespaces,
> + * as type names shouldn't have spaces replace them with '-'
> + */
> + while ((s = strchr(s, ' '))) {
> + *s = '-';
> + }
> +
> + return name;
> +}
> +
> +static ObjectClass *sparc_cpu_class_by_name(const char *cpu_model)
> +{
> + ObjectClass *oc;
> + char *typename;
> +
> + if (cpu_model == NULL) {
> + return NULL;
> + }
> +
> + typename = sparc_cpu_type_name(cpu_model);
> + oc = object_class_by_name(typename);
> + g_free(typename);
> + return oc;
> +}
> +
> static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
> {
> CPUState *cs = CPU(dev);
> @@ -825,6 +839,7 @@ static void sparc_cpu_initfn(Object *obj)
> {
> CPUState *cs = CPU(obj);
> SPARCCPU *cpu = SPARC_CPU(obj);
> + SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(obj);
> CPUSPARCState *env = &cpu->env;
>
> cs->env_ptr = env;
> @@ -832,6 +847,8 @@ static void sparc_cpu_initfn(Object *obj)
> if (tcg_enabled()) {
> gen_intermediate_code_init(env);
> }
> +
> + env->def = g_memdup(scc->cpu_def, sizeof(*scc->cpu_def));
> }
>
> static void sparc_cpu_uninitfn(Object *obj)
> @@ -854,6 +871,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
> scc->parent_reset = cc->reset;
> cc->reset = sparc_cpu_reset;
>
> + cc->class_by_name = sparc_cpu_class_by_name;
> cc->has_work = sparc_cpu_has_work;
> cc->do_interrupt = sparc_cpu_do_interrupt;
> cc->cpu_exec_interrupt = sparc_cpu_exec_interrupt;
> @@ -893,9 +911,34 @@ static const TypeInfo sparc_cpu_type_info = {
Same here, shouldn't this class be now abstract?
> .class_init = sparc_cpu_class_init,
> };
>
> +static void sparc_cpu_cpudef_class_init(ObjectClass *oc, void *data)
> +{
> + SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
> + scc->cpu_def = data;
> +}
> +
> +static void sparc_register_cpudef_type(const struct sparc_def_t *def)
> +{
> + char *typename = sparc_cpu_type_name(def->name);
> + TypeInfo ti = {
> + .name = typename,
> + .parent = TYPE_SPARC_CPU,
> + .class_init = sparc_cpu_cpudef_class_init,
> + .class_data = (void *)def,
> + };
> +
> + type_register(&ti);
> + g_free(typename);
> +}
> +
> static void sparc_cpu_register_types(void)
> {
> + int i;
> +
> type_register_static(&sparc_cpu_type_info);
> + for (i = 0; i < ARRAY_SIZE(sparc_defs); i++) {
> + sparc_register_cpudef_type(&sparc_defs[i]);
> + }
> }
>
> type_init(sparc_cpu_register_types)
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses
2017-08-17 3:38 ` Philippe Mathieu-Daudé
@ 2017-08-17 10:53 ` Igor Mammedov
2017-08-17 11:15 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-08-17 10:53 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Yongbok Kim, Peter Maydell, Andreas Färber,
Aurelien Jarno, Eduardo Habkost
On Thu, 17 Aug 2017 00:38:59 -0300
Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> Hi Igor,
>
> On 07/15/2017 06:48 PM, Philippe Mathieu-Daudé wrote:
> > On 07/14/2017 10:51 AM, Igor Mammedov wrote:
> >> Register separate QOM types for each mips cpu model,
> >> so it would be possible to reuse generic CPU creation
> >> routines.
> >>
> >> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> >
> > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >
> >> ---
> >> CC: Aurelien Jarno <aurelien@aurel32.net>
> >> CC: Yongbok Kim <yongbok.kim@imgtec.com>
> >> ---
> >> target/mips/cpu-qom.h | 2 ++
> >> target/mips/cpu.h | 57
> >> +++++++++++++++++++++++++++++++++++++++++++-
> >> target/mips/cpu.c | 51
> >> +++++++++++++++++++++++++++++++++++++++
> >> target/mips/translate.c | 13 +++++-----
> >> target/mips/translate_init.c | 57
> >> ++------------------------------------------
> >> 5 files changed, 117 insertions(+), 63 deletions(-)
> >>
> >> diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
> >> index 3f5bf23..4b32401 100644
> >> --- a/target/mips/cpu-qom.h
> >> +++ b/target/mips/cpu-qom.h
> >> @@ -35,6 +35,7 @@
> >> #define MIPS_CPU_GET_CLASS(obj) \
> >> OBJECT_GET_CLASS(MIPSCPUClass, (obj), TYPE_MIPS_CPU)
> >> +typedef struct mips_def_t mips_def_t;
> >> /**
> >> * MIPSCPUClass:
> >> * @parent_realize: The parent class' realize handler.
> >> @@ -49,6 +50,7 @@ typedef struct MIPSCPUClass {
> >> DeviceRealize parent_realize;
> >> void (*parent_reset)(CPUState *cpu);
> >> + const mips_def_t *cpu_def;
> >> } MIPSCPUClass;
> >> typedef struct MIPSCPU MIPSCPU;
> >> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> >> index 9c32228..7c2e0bf 100644
> >> --- a/target/mips/cpu.h
> >> +++ b/target/mips/cpu.h
> >> @@ -161,7 +161,62 @@ struct CPUMIPSMVPContext {
> >> #define CP0MVPC1_PCP1 0
> >> };
> >> -typedef struct mips_def_t mips_def_t;
> >> +/* MMU types, the first four entries have the same layout as the
> >> + CP0C0_MT field. */
> >> +enum mips_mmu_types {
> >> + MMU_TYPE_NONE,
> >> + MMU_TYPE_R4000,
> >> + MMU_TYPE_RESERVED,
> >> + MMU_TYPE_FMT,
> >> + MMU_TYPE_R3000,
> >> + MMU_TYPE_R6000,
> >> + MMU_TYPE_R8000
> >> +};
> >> +
> >> +struct mips_def_t {
> >> + const char *name;
> >> + int32_t CP0_PRid;
> >> + int32_t CP0_Config0;
> >> + int32_t CP0_Config1;
> >> + int32_t CP0_Config2;
> >> + int32_t CP0_Config3;
> >> + int32_t CP0_Config4;
> >> + int32_t CP0_Config4_rw_bitmask;
> >> + int32_t CP0_Config5;
> >> + int32_t CP0_Config5_rw_bitmask;
> >> + int32_t CP0_Config6;
> >> + int32_t CP0_Config7;
> >> + target_ulong CP0_LLAddr_rw_bitmask;
> >> + int CP0_LLAddr_shift;
> >> + int32_t SYNCI_Step;
> >> + int32_t CCRes;
> >> + int32_t CP0_Status_rw_bitmask;
> >> + int32_t CP0_TCStatus_rw_bitmask;
> >> + int32_t CP0_SRSCtl;
> >> + int32_t CP1_fcr0;
> >> + int32_t CP1_fcr31_rw_bitmask;
> >> + int32_t CP1_fcr31;
> >> + int32_t MSAIR;
> >> + int32_t SEGBITS;
> >> + int32_t PABITS;
> >> + int32_t CP0_SRSConf0_rw_bitmask;
> >> + int32_t CP0_SRSConf0;
> >> + int32_t CP0_SRSConf1_rw_bitmask;
> >> + int32_t CP0_SRSConf1;
> >> + int32_t CP0_SRSConf2_rw_bitmask;
> >> + int32_t CP0_SRSConf2;
> >> + int32_t CP0_SRSConf3_rw_bitmask;
> >> + int32_t CP0_SRSConf3;
> >> + int32_t CP0_SRSConf4_rw_bitmask;
> >> + int32_t CP0_SRSConf4;
> >> + int32_t CP0_PageGrain_rw_bitmask;
> >> + int32_t CP0_PageGrain;
> >> + int insn_flags;
> >> + enum mips_mmu_types mmu_type;
> >> +};
> >> +
> >> +extern const struct mips_def_t mips_defs[];
> >> +extern const int mips_defs_number;
> >> #define MIPS_SHADOW_SET_MAX 16
> >> #define MIPS_TC_MAX 5
> >> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
> >> index 82afdaa..111b5ae 100644
> >> --- a/target/mips/cpu.c
> >> +++ b/target/mips/cpu.c
> >> @@ -151,12 +151,37 @@ static void mips_cpu_initfn(Object *obj)
> >> CPUState *cs = CPU(obj);
> >> MIPSCPU *cpu = MIPS_CPU(obj);
> >> CPUMIPSState *env = &cpu->env;
> >> + MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(obj);
> >> cs->env_ptr = env;
> >> if (tcg_enabled()) {
> >> mips_tcg_init();
> >> }
> >> +
> >> + if (mcc->cpu_def) {
> >> + env->cpu_model = mcc->cpu_def;
> >> + }
> >> +}
> >> +
> >> +static char *mips_cpu_type_name(const char *cpu_model)
> >> +{
> >> + return g_strdup_printf("%s-" TYPE_MIPS_CPU, cpu_model);
> >> +}
> >> +
> >> +static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
> >> +{
> >> + ObjectClass *oc;
> >> + char *typename;
> >> +
> >> + if (cpu_model == NULL) {
> >> + return NULL;
> >> + }
> >> +
> >> + typename = mips_cpu_type_name(cpu_model);
> >> + oc = object_class_by_name(typename);
> >> + g_free(typename);
> >> + return oc;
> >> }
> >> static void mips_cpu_class_init(ObjectClass *c, void *data)
> >> @@ -171,6 +196,7 @@ static void mips_cpu_class_init(ObjectClass *c,
> >> void *data)
> >> mcc->parent_reset = cc->reset;
> >> cc->reset = mips_cpu_reset;
> >> + cc->class_by_name = mips_cpu_class_by_name;
>
> Now than I'm reading again...
>
> >> cc->has_work = mips_cpu_has_work;
> >> cc->do_interrupt = mips_cpu_do_interrupt;
> >> cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
> >> @@ -203,9 +229,34 @@ static const TypeInfo mips_cpu_type_info = {
>
> Shouldn't this class now be abstract?
it should,
I see your are fixing it in your version of series,
so I'll just drop mips from my series so that you could merge
your version of mips part separately via your tree,
assuming you can do it fast once merge window is open
as I have another series on top that does more extensive
generalization/clean up and depends on this series
(including mips being properly QOMified)
>
> >> .class_init = mips_cpu_class_init,
> >> };
> >> +static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data)
> >> +{
> >> + MIPSCPUClass *mcc = MIPS_CPU_CLASS(oc);
> >> + mcc->cpu_def = data;
> >> +}
> >> +
> >> +static void mips_register_cpudef_type(const struct mips_def_t *def)
> >> +{
> >> + char *typename = mips_cpu_type_name(def->name);
> >> + TypeInfo ti = {
> >> + .name = typename,
> >> + .parent = TYPE_MIPS_CPU,
> >> + .class_init = mips_cpu_cpudef_class_init,
> >> + .class_data = (void *)def,
> >> + };
> >> +
> >> + type_register(&ti);
> >> + g_free(typename);
> >> +}
> >> +
> >> static void mips_cpu_register_types(void)
> >> {
> >> + int i;
> >> +
> >> type_register_static(&mips_cpu_type_info);
> >> + for (i = 0; i < mips_defs_number; i++) {
> >> + mips_register_cpudef_type(&mips_defs[i]);
> >> + }
> >> }
> >> type_init(mips_cpu_register_types)
> >> diff --git a/target/mips/translate.c b/target/mips/translate.c
> >> index 7b3ae81..ae7ca80 100644
> >> --- a/target/mips/translate.c
> >> +++ b/target/mips/translate.c
> >> @@ -20193,16 +20193,15 @@ void mips_tcg_init(void)
> >> MIPSCPU *cpu_mips_init(const char *cpu_model)
> >> {
> >> + ObjectClass *oc;
> >> MIPSCPU *cpu;
> >> - CPUMIPSState *env;
> >> - const mips_def_t *def;
> >> - def = cpu_mips_find_by_name(cpu_model);
> >> - if (!def)
> >> + oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
> >> + if (oc == NULL) {
> >> return NULL;
> >> - cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU));
> >> - env = &cpu->env;
> >> - env->cpu_model = def;
> >> + }
> >> +
> >> + cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
> >> object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> >> diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
> >> index c771ff1..16c214b 100644
> >> --- a/target/mips/translate_init.c
> >> +++ b/target/mips/translate_init.c
> >> @@ -51,63 +51,9 @@
> >> #define MIPS_CONFIG5 \
> >> ((0 << CP0C5_M))
> >> -/* MMU types, the first four entries have the same layout as the
> >> - CP0C0_MT field. */
> >> -enum mips_mmu_types {
> >> - MMU_TYPE_NONE,
> >> - MMU_TYPE_R4000,
> >> - MMU_TYPE_RESERVED,
> >> - MMU_TYPE_FMT,
> >> - MMU_TYPE_R3000,
> >> - MMU_TYPE_R6000,
> >> - MMU_TYPE_R8000
> >> -};
> >> -
> >> -struct mips_def_t {
> >> - const char *name;
> >> - int32_t CP0_PRid;
> >> - int32_t CP0_Config0;
> >> - int32_t CP0_Config1;
> >> - int32_t CP0_Config2;
> >> - int32_t CP0_Config3;
> >> - int32_t CP0_Config4;
> >> - int32_t CP0_Config4_rw_bitmask;
> >> - int32_t CP0_Config5;
> >> - int32_t CP0_Config5_rw_bitmask;
> >> - int32_t CP0_Config6;
> >> - int32_t CP0_Config7;
> >> - target_ulong CP0_LLAddr_rw_bitmask;
> >> - int CP0_LLAddr_shift;
> >> - int32_t SYNCI_Step;
> >> - int32_t CCRes;
> >> - int32_t CP0_Status_rw_bitmask;
> >> - int32_t CP0_TCStatus_rw_bitmask;
> >> - int32_t CP0_SRSCtl;
> >> - int32_t CP1_fcr0;
> >> - int32_t CP1_fcr31_rw_bitmask;
> >> - int32_t CP1_fcr31;
> >> - int32_t MSAIR;
> >> - int32_t SEGBITS;
> >> - int32_t PABITS;
> >> - int32_t CP0_SRSConf0_rw_bitmask;
> >> - int32_t CP0_SRSConf0;
> >> - int32_t CP0_SRSConf1_rw_bitmask;
> >> - int32_t CP0_SRSConf1;
> >> - int32_t CP0_SRSConf2_rw_bitmask;
> >> - int32_t CP0_SRSConf2;
> >> - int32_t CP0_SRSConf3_rw_bitmask;
> >> - int32_t CP0_SRSConf3;
> >> - int32_t CP0_SRSConf4_rw_bitmask;
> >> - int32_t CP0_SRSConf4;
> >> - int32_t CP0_PageGrain_rw_bitmask;
> >> - int32_t CP0_PageGrain;
> >> - int insn_flags;
> >> - enum mips_mmu_types mmu_type;
> >> -};
> >> -
> >>
> >> /*****************************************************************************/
> >>
> >> /* MIPS CPU definitions */
> >> -static const mips_def_t mips_defs[] =
> >> +const mips_def_t mips_defs[] =
> >> {
> >> {
> >> .name = "4Kc",
> >> @@ -803,6 +749,7 @@ static const mips_def_t mips_defs[] =
> >> #endif
> >> };
> >> +const int mips_defs_number = ARRAY_SIZE(mips_defs);
> >> static const mips_def_t *cpu_mips_find_by_name (const char *name)
> >> {
> >>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses
2017-08-17 10:53 ` Igor Mammedov
@ 2017-08-17 11:15 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 86+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-08-17 11:15 UTC (permalink / raw)
To: Igor Mammedov
Cc: Peter Maydell, Eduardo Habkost, qemu-devel, Yongbok Kim,
Andreas Färber, Aurelien Jarno
On 08/17/2017 07:53 AM, Igor Mammedov wrote:
> On Thu, 17 Aug 2017 00:38:59 -0300
> Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
>> Hi Igor,
>>
>> On 07/15/2017 06:48 PM, Philippe Mathieu-Daudé wrote:
>>> On 07/14/2017 10:51 AM, Igor Mammedov wrote:
>>>> Register separate QOM types for each mips cpu model,
>>>> so it would be possible to reuse generic CPU creation
>>>> routines.
>>>>
>>>> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
>>>
>>> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>>
>>>> ---
[...]
>>>> +static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
>>>> +{
>>>> + ObjectClass *oc;
>>>> + char *typename;
>>>> +
>>>> + if (cpu_model == NULL) {
>>>> + return NULL;
>>>> + }
>>>> +
>>>> + typename = mips_cpu_type_name(cpu_model);
>>>> + oc = object_class_by_name(typename);
>>>> + g_free(typename);
>>>> + return oc;
>>>> }
>>>> static void mips_cpu_class_init(ObjectClass *c, void *data)
>>>> @@ -171,6 +196,7 @@ static void mips_cpu_class_init(ObjectClass *c,
>>>> void *data)
>>>> mcc->parent_reset = cc->reset;
>>>> cc->reset = mips_cpu_reset;
>>>> + cc->class_by_name = mips_cpu_class_by_name;
>>
>> Now than I'm reading again...
>>
>>>> cc->has_work = mips_cpu_has_work;
>>>> cc->do_interrupt = mips_cpu_do_interrupt;
>>>> cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
>>>> @@ -203,9 +229,34 @@ static const TypeInfo mips_cpu_type_info = {
>>
>> Shouldn't this class now be abstract?
> it should,
>
> I see your are fixing it in your version of series,
> so I'll just drop mips from my series so that you could merge
> your version of mips part separately via your tree,
> assuming you can do it fast once merge window is open
> as I have another series on top that does more extensive
> generalization/clean up and depends on this series
> (including mips being properly QOMified)
Ok I'll squash it there.
^ permalink raw reply [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties
2017-08-16 19:32 ` Eduardo Habkost
@ 2017-08-17 14:07 ` Igor Mammedov
2017-08-17 14:07 ` [Qemu-devel] [PATCH 2/2] x86: extract legacy cpu features format parser Igor Mammedov
2017-08-18 17:40 ` [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties Eduardo Habkost
0 siblings, 2 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-08-17 14:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Eduardo Habkost
Since
(commit d4a606b3 i386: Don't override -cpu options on -cpu host/max)
it became possible to delete hack where it was necessary to
postpone applying plus/minus features to realize time
after max_features were applied to keep legacy +-feat
override semantics.
With above commit it's possible to convert +-feat to a set
of GlobalProperty items and keep +-feat override semantics,
these properties should be added to global list at the end
to override properties that were set with feat=on|off syntax.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Eduardo Habkost <ehabkost@redhat.com>
target/i386/cpu.c | 108 ++++++++++++++++++++----------------------------------
1 file changed, 40 insertions(+), 68 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index ddc45ab..84f552d 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2058,23 +2058,32 @@ static const char *x86_cpu_feature_name(FeatureWord w, int bitnr)
return feature_word_info[w].feat_names[bitnr];
}
-/* Compatibily hack to maintain legacy +-feat semantic,
- * where +-feat overwrites any feature set by
- * feat=on|feat even if the later is parsed after +-feat
- * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
- */
-static GList *plus_features, *minus_features;
-
static gint compare_string(gconstpointer a, gconstpointer b)
{
return g_strcmp0(a, b);
}
-/* Parse "+feature,-feature,feature=foo" CPU feature string
- */
+static void
+cpu_add_feat_as_prop(const char *typename, const char *name, const char *val)
+{
+ GlobalProperty *prop = g_new0(typeof(*prop), 1);
+ prop->driver = typename;
+ prop->property = g_strdup(name);
+ prop->value = g_strdup(val);
+ prop->errp = &error_fatal;
+ qdev_prop_register_global(prop);
+}
+
+/* Parse "+feature,-feature,feature=foo" CPU feature string */
static void x86_cpu_parse_featurestr(const char *typename, char *features,
Error **errp)
{
+ /* Compatibily hack to maintain legacy +-feat semantic,
+ * where +-feat overwrites any feature set by
+ * feat=on|feat even if the later is parsed after +-feat
+ * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
+ */
+ GList *l, *plus_features = NULL, *minus_features = NULL;
char *featurestr; /* Single 'key=value" string being parsed */
static bool cpu_globals_initialized;
bool ambiguous = false;
@@ -2095,7 +2104,6 @@ static void x86_cpu_parse_featurestr(const char *typename, char *features,
const char *val = NULL;
char *eq = NULL;
char num[32];
- GlobalProperty *prop;
/* Compatibility syntax: */
if (featurestr[0] == '+') {
@@ -2147,21 +2155,32 @@ static void x86_cpu_parse_featurestr(const char *typename, char *features,
name = "tsc-frequency";
}
- prop = g_new0(typeof(*prop), 1);
- prop->driver = typename;
- prop->property = g_strdup(name);
- prop->value = g_strdup(val);
- prop->errp = &error_fatal;
- qdev_prop_register_global(prop);
+ cpu_add_feat_as_prop(typename, name, val);
}
if (ambiguous) {
warn_report("Compatibility of ambiguous CPU model "
"strings won't be kept on future QEMU versions");
}
+
+ for (l = plus_features; l; l = l->next) {
+ const char *name = l->data;
+ cpu_add_feat_as_prop(typename, name, "on");
+ }
+ if (plus_features) {
+ g_list_free_full(plus_features, g_free);
+ }
+
+ for (l = minus_features; l; l = l->next) {
+ const char *name = l->data;
+ cpu_add_feat_as_prop(typename, name, "off");
+ }
+ if (minus_features) {
+ g_list_free_full(minus_features, g_free);
+ }
}
-static void x86_cpu_expand_features(X86CPU *cpu, Error **errp);
+static void x86_cpu_expand_features(X86CPU *cpu);
static int x86_cpu_filter_features(X86CPU *cpu);
/* Check for missing features that may prevent the CPU class from
@@ -2172,7 +2191,6 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,
{
X86CPU *xc;
FeatureWord w;
- Error *err = NULL;
strList **next = missing_feats;
if (xcc->kvm_required && !kvm_enabled()) {
@@ -2184,18 +2202,7 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,
xc = X86_CPU(object_new(object_class_get_name(OBJECT_CLASS(xcc))));
- x86_cpu_expand_features(xc, &err);
- if (err) {
- /* Errors at x86_cpu_expand_features should never happen,
- * but in case it does, just report the model as not
- * runnable at all using the "type" property.
- */
- strList *new = g_new0(strList, 1);
- new->value = g_strdup("type");
- *next = new;
- next = &new->next;
- }
-
+ x86_cpu_expand_features(xc);
x86_cpu_filter_features(xc);
for (w = 0; w < FEATURE_WORDS; w++) {
@@ -2559,11 +2566,7 @@ static X86CPU *x86_cpu_from_model(const char *model, QDict *props, Error **errp)
}
}
- x86_cpu_expand_features(xc, &err);
- if (err) {
- goto out;
- }
-
+ x86_cpu_expand_features(xc);
out:
if (err) {
error_propagate(errp, err);
@@ -3453,18 +3456,11 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
/* Expand CPU configuration data, based on configured features
* and host/accelerator capabilities when appropriate.
*/
-static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
+static void x86_cpu_expand_features(X86CPU *cpu)
{
CPUX86State *env = &cpu->env;
FeatureWord w;
- GList *l;
- Error *local_err = NULL;
- /*TODO: Now cpu->max_features doesn't overwrite features
- * set using QOM properties, and we can convert
- * plus_features & minus_features to global properties
- * inside x86_cpu_parse_featurestr() too.
- */
if (cpu->max_features) {
for (w = 0; w < FEATURE_WORDS; w++) {
/* Override only features that weren't set explicitly
@@ -3476,22 +3472,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
}
}
- for (l = plus_features; l; l = l->next) {
- const char *prop = l->data;
- object_property_set_bool(OBJECT(cpu), true, prop, &local_err);
- if (local_err) {
- goto out;
- }
- }
-
- for (l = minus_features; l; l = l->next) {
- const char *prop = l->data;
- object_property_set_bool(OBJECT(cpu), false, prop, &local_err);
- if (local_err) {
- goto out;
- }
- }
-
if (!kvm_enabled() || !cpu->expose_kvm) {
env->features[FEAT_KVM] = 0;
}
@@ -3527,11 +3507,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
if (env->cpuid_xlevel2 == UINT32_MAX) {
env->cpuid_xlevel2 = env->cpuid_min_xlevel2;
}
-
-out:
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- }
}
/*
@@ -3587,10 +3562,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
return;
}
- x86_cpu_expand_features(cpu, &local_err);
- if (local_err) {
- goto out;
- }
+ x86_cpu_expand_features(cpu);
if (x86_cpu_filter_features(cpu) &&
(cpu->check_cpuid || cpu->enforce_cpuid)) {
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* [Qemu-devel] [PATCH 2/2] x86: extract legacy cpu features format parser
2017-08-17 14:07 ` [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties Igor Mammedov
@ 2017-08-17 14:07 ` Igor Mammedov
2017-08-18 17:40 ` [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties Eduardo Habkost
1 sibling, 0 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-08-17 14:07 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Riku Voipio, Laurent Vivier, Paolo Bonzini,
Richard Henderson
Move cpu_model +-feat parsing into a separate file so that it
could be reused later for parsing similar format of sparc target
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Riku Voipio <riku.voipio@iki.fi>
CC: Laurent Vivier <laurent@vivier.eu>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Richard Henderson <rth@twiddle.net>
CC: Eduardo Habkost <ehabkost@redhat.com>
---
include/qom/cpu.h | 2 +
default-configs/i386-bsd-user.mak | 1 +
default-configs/i386-linux-user.mak | 1 +
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-bsd-user.mak | 1 +
default-configs/x86_64-linux-user.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
target/i386/cpu.c | 125 +-------------------------
util/Makefile.objs | 1 +
util/legacy_cpu_features_parser.c | 161 ++++++++++++++++++++++++++++++++++
10 files changed, 171 insertions(+), 124 deletions(-)
create mode 100644 util/legacy_cpu_features_parser.c
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 25eefea..30247dc 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -1038,4 +1038,6 @@ extern const struct VMStateDescription vmstate_cpu_common;
#define UNASSIGNED_CPU_INDEX -1
+void cpu_legacy_parse_featurestr(const char *typename, char *features,
+ Error **errp);
#endif
diff --git a/default-configs/i386-bsd-user.mak b/default-configs/i386-bsd-user.mak
index af1b31a..b28a05f 100644
--- a/default-configs/i386-bsd-user.mak
+++ b/default-configs/i386-bsd-user.mak
@@ -1 +1,2 @@
# Default configuration for i386-bsd-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/i386-linux-user.mak b/default-configs/i386-linux-user.mak
index 8657e68..c136967 100644
--- a/default-configs/i386-linux-user.mak
+++ b/default-configs/i386-linux-user.mak
@@ -1 +1,2 @@
# Default configuration for i386-linux-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index d2ab2f6..e3e7c0e 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -59,3 +59,4 @@ CONFIG_SMBIOS=y
CONFIG_HYPERV_TESTDEV=$(CONFIG_KVM)
CONFIG_PXB=y
CONFIG_ACPI_VMGENID=y
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/x86_64-bsd-user.mak b/default-configs/x86_64-bsd-user.mak
index 73e5d34..952323c 100644
--- a/default-configs/x86_64-bsd-user.mak
+++ b/default-configs/x86_64-bsd-user.mak
@@ -1 +1,2 @@
# Default configuration for x86_64-bsd-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/x86_64-linux-user.mak b/default-configs/x86_64-linux-user.mak
index bec1d9e..b513ef2 100644
--- a/default-configs/x86_64-linux-user.mak
+++ b/default-configs/x86_64-linux-user.mak
@@ -1 +1,2 @@
# Default configuration for x86_64-linux-user
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 9bde2f1..6594ddf 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -59,3 +59,4 @@ CONFIG_SMBIOS=y
CONFIG_HYPERV_TESTDEV=$(CONFIG_KVM)
CONFIG_PXB=y
CONFIG_ACPI_VMGENID=y
+CONFIG_LEGACY_CPU_FEATURES=y
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 84f552d..ac60c1a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -17,7 +17,6 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
-#include "qemu/cutils.h"
#include "cpu.h"
#include "exec/exec-all.h"
@@ -2030,13 +2029,6 @@ static const PropertyInfo qdev_prop_spinlocks = {
/* Convert all '_' in a feature string option name to '-', to make feature
* name conform to QOM property naming rule, which uses '-' instead of '_'.
*/
-static inline void feat2prop(char *s)
-{
- while ((s = strchr(s, '_'))) {
- *s = '-';
- }
-}
-
/* Return the feature property name for a feature flag bit */
static const char *x86_cpu_feature_name(FeatureWord w, int bitnr)
{
@@ -2058,126 +2050,11 @@ static const char *x86_cpu_feature_name(FeatureWord w, int bitnr)
return feature_word_info[w].feat_names[bitnr];
}
-static gint compare_string(gconstpointer a, gconstpointer b)
-{
- return g_strcmp0(a, b);
-}
-
-static void
-cpu_add_feat_as_prop(const char *typename, const char *name, const char *val)
-{
- GlobalProperty *prop = g_new0(typeof(*prop), 1);
- prop->driver = typename;
- prop->property = g_strdup(name);
- prop->value = g_strdup(val);
- prop->errp = &error_fatal;
- qdev_prop_register_global(prop);
-}
-
/* Parse "+feature,-feature,feature=foo" CPU feature string */
static void x86_cpu_parse_featurestr(const char *typename, char *features,
Error **errp)
{
- /* Compatibily hack to maintain legacy +-feat semantic,
- * where +-feat overwrites any feature set by
- * feat=on|feat even if the later is parsed after +-feat
- * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
- */
- GList *l, *plus_features = NULL, *minus_features = NULL;
- char *featurestr; /* Single 'key=value" string being parsed */
- static bool cpu_globals_initialized;
- bool ambiguous = false;
-
- if (cpu_globals_initialized) {
- return;
- }
- cpu_globals_initialized = true;
-
- if (!features) {
- return;
- }
-
- for (featurestr = strtok(features, ",");
- featurestr;
- featurestr = strtok(NULL, ",")) {
- const char *name;
- const char *val = NULL;
- char *eq = NULL;
- char num[32];
-
- /* Compatibility syntax: */
- if (featurestr[0] == '+') {
- plus_features = g_list_append(plus_features,
- g_strdup(featurestr + 1));
- continue;
- } else if (featurestr[0] == '-') {
- minus_features = g_list_append(minus_features,
- g_strdup(featurestr + 1));
- continue;
- }
-
- eq = strchr(featurestr, '=');
- if (eq) {
- *eq++ = 0;
- val = eq;
- } else {
- val = "on";
- }
-
- feat2prop(featurestr);
- name = featurestr;
-
- if (g_list_find_custom(plus_features, name, compare_string)) {
- warn_report("Ambiguous CPU model string. "
- "Don't mix both \"+%s\" and \"%s=%s\"",
- name, name, val);
- ambiguous = true;
- }
- if (g_list_find_custom(minus_features, name, compare_string)) {
- warn_report("Ambiguous CPU model string. "
- "Don't mix both \"-%s\" and \"%s=%s\"",
- name, name, val);
- ambiguous = true;
- }
-
- /* Special case: */
- if (!strcmp(name, "tsc-freq")) {
- int ret;
- uint64_t tsc_freq;
-
- ret = qemu_strtosz_metric(val, NULL, &tsc_freq);
- if (ret < 0 || tsc_freq > INT64_MAX) {
- error_setg(errp, "bad numerical value %s", val);
- return;
- }
- snprintf(num, sizeof(num), "%" PRId64, tsc_freq);
- val = num;
- name = "tsc-frequency";
- }
-
- cpu_add_feat_as_prop(typename, name, val);
- }
-
- if (ambiguous) {
- warn_report("Compatibility of ambiguous CPU model "
- "strings won't be kept on future QEMU versions");
- }
-
- for (l = plus_features; l; l = l->next) {
- const char *name = l->data;
- cpu_add_feat_as_prop(typename, name, "on");
- }
- if (plus_features) {
- g_list_free_full(plus_features, g_free);
- }
-
- for (l = minus_features; l; l = l->next) {
- const char *name = l->data;
- cpu_add_feat_as_prop(typename, name, "off");
- }
- if (minus_features) {
- g_list_free_full(minus_features, g_free);
- }
+ cpu_legacy_parse_featurestr(typename, features, errp);
}
static void x86_cpu_expand_features(X86CPU *cpu);
diff --git a/util/Makefile.objs b/util/Makefile.objs
index 50a55ec..14e28f7 100644
--- a/util/Makefile.objs
+++ b/util/Makefile.objs
@@ -45,3 +45,4 @@ util-obj-y += qht.o
util-obj-y += range.o
util-obj-y += stats64.o
util-obj-y += systemd.o
+util-obj-$(CONFIG_LEGACY_CPU_FEATURES) += legacy_cpu_features_parser.o
diff --git a/util/legacy_cpu_features_parser.c b/util/legacy_cpu_features_parser.c
new file mode 100644
index 0000000..6b352a3
--- /dev/null
+++ b/util/legacy_cpu_features_parser.c
@@ -0,0 +1,161 @@
+/* Support for legacy -cpu cpu,features CLI option with +-feat syntax,
+ * used by x86/sparc targets
+ *
+ * Author: Andreas Färber <afaerber@suse.de>
+ * Author: Andre Przywara <andre.przywara@amd.com>
+ * Author: Eduardo Habkost <ehabkost@redhat.com>
+ * Author: Igor Mammedov <imammedo@redhat.com>
+ * Author: Paolo Bonzini <pbonzini@redhat.com>
+ * Author: Markus Armbruster <armbru@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu/cutils.h"
+#include "qom/cpu.h"
+#include "qemu/error-report.h"
+#include "hw/qdev-properties.h"
+
+static inline void feat2prop(char *s)
+{
+ while ((s = strchr(s, '_'))) {
+ *s = '-';
+ }
+}
+
+static gint compare_string(gconstpointer a, gconstpointer b)
+{
+ return g_strcmp0(a, b);
+}
+
+static void
+cpu_add_feat_as_prop(const char *typename, const char *name, const char *val)
+{
+ GlobalProperty *prop = g_new0(typeof(*prop), 1);
+ prop->driver = typename;
+ prop->property = g_strdup(name);
+ prop->value = g_strdup(val);
+ prop->errp = &error_fatal;
+ qdev_prop_register_global(prop);
+}
+
+/* DO NOT USE WITH NEW CODE
+ * Parse "+feature,-feature,feature=foo" CPU feature string
+ */
+void cpu_legacy_parse_featurestr(const char *typename, char *features,
+ Error **errp)
+{
+ /* Compatibily hack to maintain legacy +-feat semantic,
+ * where +-feat overwrites any feature set by
+ * feat=on|feat even if the later is parsed after +-feat
+ * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
+ */
+ GList *l, *plus_features = NULL, *minus_features = NULL;
+ char *featurestr; /* Single 'key=value" string being parsed */
+ static bool cpu_globals_initialized;
+ bool ambiguous = false;
+
+ if (cpu_globals_initialized) {
+ return;
+ }
+ cpu_globals_initialized = true;
+
+ if (!features) {
+ return;
+ }
+
+ for (featurestr = strtok(features, ",");
+ featurestr;
+ featurestr = strtok(NULL, ",")) {
+ const char *name;
+ const char *val = NULL;
+ char *eq = NULL;
+ char num[32];
+
+ /* Compatibility syntax: */
+ if (featurestr[0] == '+') {
+ plus_features = g_list_append(plus_features,
+ g_strdup(featurestr + 1));
+ continue;
+ } else if (featurestr[0] == '-') {
+ minus_features = g_list_append(minus_features,
+ g_strdup(featurestr + 1));
+ continue;
+ }
+
+ eq = strchr(featurestr, '=');
+ if (eq) {
+ *eq++ = 0;
+ val = eq;
+ } else {
+ val = "on";
+ }
+
+ feat2prop(featurestr);
+ name = featurestr;
+
+ if (g_list_find_custom(plus_features, name, compare_string)) {
+ warn_report("Ambiguous CPU model string. "
+ "Don't mix both \"+%s\" and \"%s=%s\"",
+ name, name, val);
+ ambiguous = true;
+ }
+ if (g_list_find_custom(minus_features, name, compare_string)) {
+ warn_report("Ambiguous CPU model string. "
+ "Don't mix both \"-%s\" and \"%s=%s\"",
+ name, name, val);
+ ambiguous = true;
+ }
+
+ /* Special case: */
+ if (!strcmp(name, "tsc-freq")) {
+ int ret;
+ uint64_t tsc_freq;
+
+ ret = qemu_strtosz_metric(val, NULL, &tsc_freq);
+ if (ret < 0 || tsc_freq > INT64_MAX) {
+ error_setg(errp, "bad numerical value %s", val);
+ return;
+ }
+ snprintf(num, sizeof(num), "%" PRId64, tsc_freq);
+ val = num;
+ name = "tsc-frequency";
+ }
+
+ cpu_add_feat_as_prop(typename, name, val);
+ }
+
+ if (ambiguous) {
+ warn_report("Compatibility of ambiguous CPU model "
+ "strings won't be kept on future QEMU versions");
+ }
+
+ for (l = plus_features; l; l = l->next) {
+ const char *name = l->data;
+ cpu_add_feat_as_prop(typename, name, "on");
+ }
+ if (plus_features) {
+ g_list_free_full(plus_features, g_free);
+ }
+
+ for (l = minus_features; l; l = l->next) {
+ const char *name = l->data;
+ cpu_add_feat_as_prop(typename, name, "off");
+ }
+ if (minus_features) {
+ g_list_free_full(minus_features, g_free);
+ }
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses
2017-08-17 3:50 ` Philippe Mathieu-Daudé
@ 2017-08-17 14:11 ` Igor Mammedov
0 siblings, 0 replies; 86+ messages in thread
From: Igor Mammedov @ 2017-08-17 14:11 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Peter Maydell, Mark Cave-Ayland, Andreas Färber,
Artyom Tarasenko, Eduardo Habkost
On Thu, 17 Aug 2017 00:50:50 -0300
Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> On 07/14/2017 10:51 AM, Igor Mammedov wrote:
> > QOMfy cpu models handling introducing propper cpu types
> > for each cpu model.
> >
> > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > ---
> > with this and conversion of features to properties,
> > it would be possible to replace cpu_sparc_init() with
> > cpu_generic_init() and reuse common -cpu handling
> > infrastructure.
> >
> > CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> > CC: Artyom Tarasenko <atar4qemu@gmail.com>
> > ---
> > target/sparc/cpu-qom.h | 2 +
> > target/sparc/cpu.c | 119 +++++++++++++++++++++++++++++++++----------------
> > 2 files changed, 83 insertions(+), 38 deletions(-)
> >
> > diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h
> > index f63af72..af6d57a 100644
> > --- a/target/sparc/cpu-qom.h
> > +++ b/target/sparc/cpu-qom.h
> > @@ -35,6 +35,7 @@
> > #define SPARC_CPU_GET_CLASS(obj) \
> > OBJECT_GET_CLASS(SPARCCPUClass, (obj), TYPE_SPARC_CPU)
> >
> > +typedef struct sparc_def_t sparc_def_t;
> > /**
> > * SPARCCPUClass:
> > * @parent_realize: The parent class' realize handler.
> > @@ -49,6 +50,7 @@ typedef struct SPARCCPUClass {
> >
> > DeviceRealize parent_realize;
> > void (*parent_reset)(CPUState *cpu);
> > + sparc_def_t *cpu_def;
> > } SPARCCPUClass;
> >
> > typedef struct SPARCCPU SPARCCPU;
> > diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
> > index d606eb5..f8cf751 100644
> > --- a/target/sparc/cpu.c
> > +++ b/target/sparc/cpu.c
> > @@ -25,8 +25,6 @@
> >
> > //#define DEBUG_FEATURES
> >
> > -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
> > -
> > /* CPUClass::reset() */
> > static void sparc_cpu_reset(CPUState *s)
> > {
> > @@ -111,17 +109,9 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
> > {
> > CPUSPARCState *env = &cpu->env;
> > char *s = g_strdup(cpu_model);
> > - char *featurestr, *name = strtok(s, ",");
> > - sparc_def_t def1, *def = &def1;
> > + char *featurestr = strtok(s, ",");
> > Error *err = NULL;
> >
> > - if (cpu_sparc_find_by_name(def, name) < 0) {
> > - g_free(s);
> > - return -1;
> > - }
> > -
> > - env->def = g_memdup(def, sizeof(*def));
> > -
> > featurestr = strtok(NULL, ",");
> > sparc_cpu_parse_features(CPU(cpu), featurestr, &err);
> > g_free(s);
> > @@ -130,18 +120,18 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
> > return -1;
> > }
> >
> > - env->version = def->iu_version;
> > - env->fsr = def->fpu_version;
> > - env->nwindows = def->nwindows;
> > + env->version = env->def->iu_version;
> > + env->fsr = env->def->fpu_version;
> > + env->nwindows = env->def->nwindows;
> > #if !defined(TARGET_SPARC64)
> > - env->mmuregs[0] |= def->mmu_version;
> > + env->mmuregs[0] |= env->def->mmu_version;
> > cpu_sparc_set_id(env, 0);
> > - env->mxccregs[7] |= def->mxcc_version;
> > + env->mxccregs[7] |= env->def->mxcc_version;
> > #else
> > - env->mmu_version = def->mmu_version;
> > - env->maxtl = def->maxtl;
> > - env->version |= def->maxtl << 8;
> > - env->version |= def->nwindows - 1;
> > + env->mmu_version = env->def->mmu_version;
> > + env->maxtl = env->def->maxtl;
> > + env->version |= env->def->maxtl << 8;
> > + env->version |= env->def->nwindows - 1;
> > #endif
> > return 0;
> > }
> > @@ -149,8 +139,19 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
> > SPARCCPU *cpu_sparc_init(const char *cpu_model)
> > {
> > SPARCCPU *cpu;
> > + ObjectClass *oc;
> > + char *str, *name;
> > +
> > + str = g_strdup(cpu_model);
> > + name = strtok(str, ",");
> > + oc = cpu_class_by_name(TYPE_SPARC_CPU, name);
> > + if (oc == NULL) {
> > + g_free(str);
> > + return NULL;
> > + }
> > + g_free(str);
> >
> > - cpu = SPARC_CPU(object_new(TYPE_SPARC_CPU));
> > + cpu = SPARC_CPU(object_new(object_class_get_name(oc)));
> >
> > if (cpu_sparc_register(cpu, cpu_model) < 0) {
> > object_unref(OBJECT(cpu));
> > @@ -553,23 +554,6 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features)
> > error_report("CPU feature %s not found", flagname);
> > }
> >
> > -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *name)
> > -{
> > - unsigned int i;
> > - const sparc_def_t *def = NULL;
> > -
> > - for (i = 0; i < ARRAY_SIZE(sparc_defs); i++) {
> > - if (strcasecmp(name, sparc_defs[i].name) == 0) {
> > - def = &sparc_defs[i];
> > - }
> > - }
> > - if (!def) {
> > - return -1;
> > - }
> > - memcpy(cpu_def, def, sizeof(*def));
> > - return 0;
> > -}
> > -
> > static void sparc_cpu_parse_features(CPUState *cs, char *features,
> > Error **errp)
> > {
> > @@ -796,6 +780,36 @@ static bool sparc_cpu_has_work(CPUState *cs)
> > cpu_interrupts_enabled(env);
> > }
> >
> > +static char *sparc_cpu_type_name(const char *cpu_model)
> > +{
> > + char *name = g_strdup_printf("%s-" TYPE_SPARC_CPU, cpu_model);
> > + char *s = name;
> > +
> > + /* SPARC cpu model names happen to have whitespaces,
> > + * as type names shouldn't have spaces replace them with '-'
> > + */
> > + while ((s = strchr(s, ' '))) {
> > + *s = '-';
> > + }
> > +
> > + return name;
> > +}
> > +
> > +static ObjectClass *sparc_cpu_class_by_name(const char *cpu_model)
> > +{
> > + ObjectClass *oc;
> > + char *typename;
> > +
> > + if (cpu_model == NULL) {
> > + return NULL;
> > + }
> > +
> > + typename = sparc_cpu_type_name(cpu_model);
> > + oc = object_class_by_name(typename);
> > + g_free(typename);
> > + return oc;
> > +}
> > +
> > static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
> > {
> > CPUState *cs = CPU(dev);
> > @@ -825,6 +839,7 @@ static void sparc_cpu_initfn(Object *obj)
> > {
> > CPUState *cs = CPU(obj);
> > SPARCCPU *cpu = SPARC_CPU(obj);
> > + SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(obj);
> > CPUSPARCState *env = &cpu->env;
> >
> > cs->env_ptr = env;
> > @@ -832,6 +847,8 @@ static void sparc_cpu_initfn(Object *obj)
> > if (tcg_enabled()) {
> > gen_intermediate_code_init(env);
> > }
> > +
> > + env->def = g_memdup(scc->cpu_def, sizeof(*scc->cpu_def));
> > }
> >
> > static void sparc_cpu_uninitfn(Object *obj)
> > @@ -854,6 +871,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
> > scc->parent_reset = cc->reset;
> > cc->reset = sparc_cpu_reset;
> >
> > + cc->class_by_name = sparc_cpu_class_by_name;
> > cc->has_work = sparc_cpu_has_work;
> > cc->do_interrupt = sparc_cpu_do_interrupt;
> > cc->cpu_exec_interrupt = sparc_cpu_exec_interrupt;
> > @@ -893,9 +911,34 @@ static const TypeInfo sparc_cpu_type_info = {
>
> Same here, shouldn't this class be now abstract?
it should, I'll post v2 series for review with this fixed
since this and 8/28 change causes too many conflicts and
series doesn't apply to current master cleanly so it
has to be rebased anyway.
>
> > .class_init = sparc_cpu_class_init,
> > };
> >
> > +static void sparc_cpu_cpudef_class_init(ObjectClass *oc, void *data)
> > +{
> > + SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
> > + scc->cpu_def = data;
> > +}
> > +
> > +static void sparc_register_cpudef_type(const struct sparc_def_t *def)
> > +{
> > + char *typename = sparc_cpu_type_name(def->name);
> > + TypeInfo ti = {
> > + .name = typename,
> > + .parent = TYPE_SPARC_CPU,
> > + .class_init = sparc_cpu_cpudef_class_init,
> > + .class_data = (void *)def,
> > + };
> > +
> > + type_register(&ti);
> > + g_free(typename);
> > +}
> > +
> > static void sparc_cpu_register_types(void)
> > {
> > + int i;
> > +
> > type_register_static(&sparc_cpu_type_info);
> > + for (i = 0; i < ARRAY_SIZE(sparc_defs); i++) {
> > + sparc_register_cpudef_type(&sparc_defs[i]);
> > + }
> > }
> >
> > type_init(sparc_cpu_register_types)
> >
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() with cpu_generic_init()
2017-08-16 19:56 ` Eduardo Habkost
@ 2017-08-17 14:32 ` Igor Mammedov
2017-08-18 16:50 ` Eduardo Habkost
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-08-17 14:32 UTC (permalink / raw)
To: Eduardo Habkost
Cc: qemu-devel, Max Filippov, Peter Maydell, Andreas Färber
On Wed, 16 Aug 2017 16:56:40 -0300
Eduardo Habkost <ehabkost@redhat.com> wrote:
> On Fri, Jul 14, 2017 at 03:52:09PM +0200, Igor Mammedov wrote:
> > call xtensa_irq_init() at realize time which makes
> > cpu_xtensa_init() like generic cpu creation function.
> > As result we can replace it with cpu_generic_init()
> > which does the same job, reducing code duplication a bit.
> >
> > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
>
> Looks good to me. Were you able to test it?
images are from
http://jcmvbkbc.spb.ru/~dumb/ws/osll/qemu-xtensa/20110829/xtensa-dc232b_kernel_rootfs.tgz
http://jcmvbkbc.spb.ru/~dumb/tmp/201508231001/default-sim-fsf/Image.elf
instructions to test is from
http://qemu-buch.de/de/index.php?title=QEMU-KVM-Buch/_Gast-Systeme/_Xtensa-Architektur
it boots till some point, so CPU is still there
which should be sufficient for this patch
>
> > ---
> > CC: Max Filippov <jcmvbkbc@gmail.com>
> > ---
> > target/xtensa/cpu.h | 4 +---
> > hw/xtensa/sim.c | 2 +-
> > hw/xtensa/xtfpga.c | 2 +-
> > target/xtensa/cpu.c | 3 +++
> > target/xtensa/helper.c | 22 ----------------------
> > 5 files changed, 6 insertions(+), 27 deletions(-)
> >
> > diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
> > index ee29fb1..4803331 100644
> > --- a/target/xtensa/cpu.h
> > +++ b/target/xtensa/cpu.h
> > @@ -475,9 +475,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
> > #define XTENSA_DEFAULT_CPU_MODEL "dc232b"
> > #endif
> >
> > -XtensaCPU *cpu_xtensa_init(const char *cpu_model);
> > -
> > -#define cpu_init(cpu_model) CPU(cpu_xtensa_init(cpu_model))
> > +#define cpu_init(cpu_model) cpu_generic_init(TYPE_XTENSA_CPU, cpu_model)
> >
> > void xtensa_translate_init(void);
> > void xtensa_breakpoint_handler(CPUState *cs);
> > diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
> > index 5521e91..bf1f729 100644
> > --- a/hw/xtensa/sim.c
> > +++ b/hw/xtensa/sim.c
> > @@ -86,7 +86,7 @@ static void xtensa_sim_init(MachineState *machine)
> > }
> >
> > for (n = 0; n < smp_cpus; n++) {
> > - cpu = cpu_xtensa_init(cpu_model);
> > + cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
> > if (cpu == NULL) {
> > error_report("unable to find CPU definition '%s'",
> > cpu_model);
> > diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
> > index d5ac080..b656660 100644
> > --- a/hw/xtensa/xtfpga.c
> > +++ b/hw/xtensa/xtfpga.c
> > @@ -232,7 +232,7 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
> > }
> >
> > for (n = 0; n < smp_cpus; n++) {
> > - cpu = cpu_xtensa_init(cpu_model);
> > + cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
> > if (cpu == NULL) {
> > error_report("unable to find CPU definition '%s'",
> > cpu_model);
> > diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
> > index cd7f958..85897df 100644
> > --- a/target/xtensa/cpu.c
> > +++ b/target/xtensa/cpu.c
> > @@ -100,9 +100,12 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
> > static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
> > {
> > CPUState *cs = CPU(dev);
> > + XtensaCPU *cpu = XTENSA_CPU(dev);
> > XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
> > Error *local_err = NULL;
> >
> > + xtensa_irq_init(&cpu->env);
> > +
> > cpu_exec_realizefn(cs, &local_err);
> > if (local_err != NULL) {
> > error_propagate(errp, local_err);
> > diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
> > index bcd0b77..e8fba20 100644
> > --- a/target/xtensa/helper.c
> > +++ b/target/xtensa/helper.c
> > @@ -113,28 +113,6 @@ void xtensa_breakpoint_handler(CPUState *cs)
> > }
> > }
> >
> > -XtensaCPU *cpu_xtensa_init(const char *cpu_model)
> > -{
> > - ObjectClass *oc;
> > - XtensaCPU *cpu;
> > - CPUXtensaState *env;
> > -
> > - oc = cpu_class_by_name(TYPE_XTENSA_CPU, cpu_model);
> > - if (oc == NULL) {
> > - return NULL;
> > - }
> > -
> > - cpu = XTENSA_CPU(object_new(object_class_get_name(oc)));
> > - env = &cpu->env;
> > -
> > - xtensa_irq_init(env);
> > -
> > - object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> > -
> > - return cpu;
> > -}
> > -
> > -
> > void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf)
> > {
> > XtensaConfigList *core = xtensa_cores;
> > --
> > 2.7.4
> >
> >
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() with cpu_generic_init()
2017-08-17 14:32 ` Igor Mammedov
@ 2017-08-18 16:50 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-18 16:50 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Max Filippov, Peter Maydell, Andreas Färber
On Thu, Aug 17, 2017 at 04:32:23PM +0200, Igor Mammedov wrote:
> On Wed, 16 Aug 2017 16:56:40 -0300
> Eduardo Habkost <ehabkost@redhat.com> wrote:
>
> > On Fri, Jul 14, 2017 at 03:52:09PM +0200, Igor Mammedov wrote:
> > > call xtensa_irq_init() at realize time which makes
> > > cpu_xtensa_init() like generic cpu creation function.
> > > As result we can replace it with cpu_generic_init()
> > > which does the same job, reducing code duplication a bit.
> > >
> > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> >
> > Looks good to me. Were you able to test it?
> images are from
> http://jcmvbkbc.spb.ru/~dumb/ws/osll/qemu-xtensa/20110829/xtensa-dc232b_kernel_rootfs.tgz
> http://jcmvbkbc.spb.ru/~dumb/tmp/201508231001/default-sim-fsf/Image.elf
>
> instructions to test is from
> http://qemu-buch.de/de/index.php?title=QEMU-KVM-Buch/_Gast-Systeme/_Xtensa-Architektur
>
> it boots till some point, so CPU is still there
> which should be sufficient for this patch
Thanks!
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties
2017-08-17 14:07 ` [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties Igor Mammedov
2017-08-17 14:07 ` [Qemu-devel] [PATCH 2/2] x86: extract legacy cpu features format parser Igor Mammedov
@ 2017-08-18 17:40 ` Eduardo Habkost
2017-08-21 8:32 ` Igor Mammedov
1 sibling, 1 reply; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-18 17:40 UTC (permalink / raw)
To: Igor Mammedov; +Cc: qemu-devel
On Thu, Aug 17, 2017 at 04:07:56PM +0200, Igor Mammedov wrote:
> Since
> (commit d4a606b3 i386: Don't override -cpu options on -cpu host/max)
> it became possible to delete hack where it was necessary to
> postpone applying plus/minus features to realize time
> after max_features were applied to keep legacy +-feat
> override semantics.
>
> With above commit it's possible to convert +-feat to a set
> of GlobalProperty items and keep +-feat override semantics,
> these properties should be added to global list at the end
> to override properties that were set with feat=on|off syntax.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
[...]
> +/* Parse "+feature,-feature,feature=foo" CPU feature string */
> static void x86_cpu_parse_featurestr(const char *typename, char *features,
> Error **errp)
> {
> + /* Compatibily hack to maintain legacy +-feat semantic,
> + * where +-feat overwrites any feature set by
> + * feat=on|feat even if the later is parsed after +-feat
> + * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
> + */
> + GList *l, *plus_features = NULL, *minus_features = NULL;
The warning about ambiguous CPU options exists since 2.8, I think
this is a good opportunity to get rid of the "[+-]feat overrides
feat=on|off" rule and simplify the parsing code. Do you want to
do this in the same patch?
> char *featurestr; /* Single 'key=value" string being parsed */
> static bool cpu_globals_initialized;
> bool ambiguous = false;
> @@ -2095,7 +2104,6 @@ static void x86_cpu_parse_featurestr(const char *typename, char *features,
> const char *val = NULL;
> char *eq = NULL;
> char num[32];
> - GlobalProperty *prop;
>
> /* Compatibility syntax: */
> if (featurestr[0] == '+') {
> @@ -2147,21 +2155,32 @@ static void x86_cpu_parse_featurestr(const char *typename, char *features,
> name = "tsc-frequency";
> }
>
> - prop = g_new0(typeof(*prop), 1);
> - prop->driver = typename;
> - prop->property = g_strdup(name);
> - prop->value = g_strdup(val);
> - prop->errp = &error_fatal;
> - qdev_prop_register_global(prop);
> + cpu_add_feat_as_prop(typename, name, val);
> }
>
> if (ambiguous) {
> warn_report("Compatibility of ambiguous CPU model "
> "strings won't be kept on future QEMU versions");
> }
> +
> + for (l = plus_features; l; l = l->next) {
> + const char *name = l->data;
> + cpu_add_feat_as_prop(typename, name, "on");
> + }
> + if (plus_features) {
> + g_list_free_full(plus_features, g_free);
> + }
> +
> + for (l = minus_features; l; l = l->next) {
> + const char *name = l->data;
> + cpu_add_feat_as_prop(typename, name, "off");
> + }
> + if (minus_features) {
> + g_list_free_full(minus_features, g_free);
> + }
> }
>
> -static void x86_cpu_expand_features(X86CPU *cpu, Error **errp);
> +static void x86_cpu_expand_features(X86CPU *cpu);
> static int x86_cpu_filter_features(X86CPU *cpu);
>
> /* Check for missing features that may prevent the CPU class from
> @@ -2172,7 +2191,6 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,
> {
> X86CPU *xc;
> FeatureWord w;
> - Error *err = NULL;
> strList **next = missing_feats;
>
> if (xcc->kvm_required && !kvm_enabled()) {
> @@ -2184,18 +2202,7 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,
>
> xc = X86_CPU(object_new(object_class_get_name(OBJECT_CLASS(xcc))));
>
> - x86_cpu_expand_features(xc, &err);
> - if (err) {
> - /* Errors at x86_cpu_expand_features should never happen,
> - * but in case it does, just report the model as not
> - * runnable at all using the "type" property.
> - */
> - strList *new = g_new0(strList, 1);
> - new->value = g_strdup("type");
> - *next = new;
> - next = &new->next;
> - }
> -
> + x86_cpu_expand_features(xc);
> x86_cpu_filter_features(xc);
>
> for (w = 0; w < FEATURE_WORDS; w++) {
> @@ -2559,11 +2566,7 @@ static X86CPU *x86_cpu_from_model(const char *model, QDict *props, Error **errp)
> }
> }
>
> - x86_cpu_expand_features(xc, &err);
> - if (err) {
> - goto out;
> - }
> -
> + x86_cpu_expand_features(xc);
> out:
> if (err) {
> error_propagate(errp, err);
> @@ -3453,18 +3456,11 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
> /* Expand CPU configuration data, based on configured features
> * and host/accelerator capabilities when appropriate.
> */
> -static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> +static void x86_cpu_expand_features(X86CPU *cpu)
> {
> CPUX86State *env = &cpu->env;
> FeatureWord w;
> - GList *l;
> - Error *local_err = NULL;
>
> - /*TODO: Now cpu->max_features doesn't overwrite features
> - * set using QOM properties, and we can convert
> - * plus_features & minus_features to global properties
> - * inside x86_cpu_parse_featurestr() too.
> - */
> if (cpu->max_features) {
> for (w = 0; w < FEATURE_WORDS; w++) {
> /* Override only features that weren't set explicitly
> @@ -3476,22 +3472,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> }
> }
>
> - for (l = plus_features; l; l = l->next) {
> - const char *prop = l->data;
> - object_property_set_bool(OBJECT(cpu), true, prop, &local_err);
> - if (local_err) {
> - goto out;
> - }
> - }
> -
> - for (l = minus_features; l; l = l->next) {
> - const char *prop = l->data;
> - object_property_set_bool(OBJECT(cpu), false, prop, &local_err);
> - if (local_err) {
> - goto out;
> - }
> - }
> -
> if (!kvm_enabled() || !cpu->expose_kvm) {
> env->features[FEAT_KVM] = 0;
> }
> @@ -3527,11 +3507,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> if (env->cpuid_xlevel2 == UINT32_MAX) {
> env->cpuid_xlevel2 = env->cpuid_min_xlevel2;
> }
> -
> -out:
> - if (local_err != NULL) {
> - error_propagate(errp, local_err);
> - }
> }
>
> /*
> @@ -3587,10 +3562,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
> return;
> }
>
> - x86_cpu_expand_features(cpu, &local_err);
> - if (local_err) {
> - goto out;
> - }
> + x86_cpu_expand_features(cpu);
>
> if (x86_cpu_filter_features(cpu) &&
> (cpu->check_cpuid || cpu->enforce_cpuid)) {
> --
> 2.7.4
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties
2017-08-18 17:40 ` [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties Eduardo Habkost
@ 2017-08-21 8:32 ` Igor Mammedov
2017-08-23 14:24 ` Eduardo Habkost
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-08-21 8:32 UTC (permalink / raw)
To: Eduardo Habkost; +Cc: qemu-devel
On Fri, 18 Aug 2017 14:40:29 -0300
Eduardo Habkost <ehabkost@redhat.com> wrote:
> On Thu, Aug 17, 2017 at 04:07:56PM +0200, Igor Mammedov wrote:
> > Since
> > (commit d4a606b3 i386: Don't override -cpu options on -cpu host/max)
> > it became possible to delete hack where it was necessary to
> > postpone applying plus/minus features to realize time
> > after max_features were applied to keep legacy +-feat
> > override semantics.
> >
> > With above commit it's possible to convert +-feat to a set
> > of GlobalProperty items and keep +-feat override semantics,
> > these properties should be added to global list at the end
> > to override properties that were set with feat=on|off syntax.
> >
> > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> [...]
> > +/* Parse "+feature,-feature,feature=foo" CPU feature string */
> > static void x86_cpu_parse_featurestr(const char *typename, char *features,
> > Error **errp)
> > {
> > + /* Compatibily hack to maintain legacy +-feat semantic,
> > + * where +-feat overwrites any feature set by
> > + * feat=on|feat even if the later is parsed after +-feat
> > + * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
> > + */
> > + GList *l, *plus_features = NULL, *minus_features = NULL;
>
> The warning about ambiguous CPU options exists since 2.8, I think
> this is a good opportunity to get rid of the "[+-]feat overrides
> feat=on|off" rule and simplify the parsing code. Do you want to
> do this in the same patch?
I'd prefer not to do it in this patch/series, as it's not related.
WE can do cleanups later on top.
>
>
> > char *featurestr; /* Single 'key=value" string being parsed */
> > static bool cpu_globals_initialized;
> > bool ambiguous = false;
> > @@ -2095,7 +2104,6 @@ static void x86_cpu_parse_featurestr(const char *typename, char *features,
> > const char *val = NULL;
> > char *eq = NULL;
> > char num[32];
> > - GlobalProperty *prop;
> >
> > /* Compatibility syntax: */
> > if (featurestr[0] == '+') {
> > @@ -2147,21 +2155,32 @@ static void x86_cpu_parse_featurestr(const char *typename, char *features,
> > name = "tsc-frequency";
> > }
> >
> > - prop = g_new0(typeof(*prop), 1);
> > - prop->driver = typename;
> > - prop->property = g_strdup(name);
> > - prop->value = g_strdup(val);
> > - prop->errp = &error_fatal;
> > - qdev_prop_register_global(prop);
> > + cpu_add_feat_as_prop(typename, name, val);
> > }
> >
> > if (ambiguous) {
> > warn_report("Compatibility of ambiguous CPU model "
> > "strings won't be kept on future QEMU versions");
> > }
> > +
> > + for (l = plus_features; l; l = l->next) {
> > + const char *name = l->data;
> > + cpu_add_feat_as_prop(typename, name, "on");
> > + }
> > + if (plus_features) {
> > + g_list_free_full(plus_features, g_free);
> > + }
> > +
> > + for (l = minus_features; l; l = l->next) {
> > + const char *name = l->data;
> > + cpu_add_feat_as_prop(typename, name, "off");
> > + }
> > + if (minus_features) {
> > + g_list_free_full(minus_features, g_free);
> > + }
> > }
> >
> > -static void x86_cpu_expand_features(X86CPU *cpu, Error **errp);
> > +static void x86_cpu_expand_features(X86CPU *cpu);
> > static int x86_cpu_filter_features(X86CPU *cpu);
> >
> > /* Check for missing features that may prevent the CPU class from
> > @@ -2172,7 +2191,6 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,
> > {
> > X86CPU *xc;
> > FeatureWord w;
> > - Error *err = NULL;
> > strList **next = missing_feats;
> >
> > if (xcc->kvm_required && !kvm_enabled()) {
> > @@ -2184,18 +2202,7 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,
> >
> > xc = X86_CPU(object_new(object_class_get_name(OBJECT_CLASS(xcc))));
> >
> > - x86_cpu_expand_features(xc, &err);
> > - if (err) {
> > - /* Errors at x86_cpu_expand_features should never happen,
> > - * but in case it does, just report the model as not
> > - * runnable at all using the "type" property.
> > - */
> > - strList *new = g_new0(strList, 1);
> > - new->value = g_strdup("type");
> > - *next = new;
> > - next = &new->next;
> > - }
> > -
> > + x86_cpu_expand_features(xc);
> > x86_cpu_filter_features(xc);
> >
> > for (w = 0; w < FEATURE_WORDS; w++) {
> > @@ -2559,11 +2566,7 @@ static X86CPU *x86_cpu_from_model(const char *model, QDict *props, Error **errp)
> > }
> > }
> >
> > - x86_cpu_expand_features(xc, &err);
> > - if (err) {
> > - goto out;
> > - }
> > -
> > + x86_cpu_expand_features(xc);
> > out:
> > if (err) {
> > error_propagate(errp, err);
> > @@ -3453,18 +3456,11 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
> > /* Expand CPU configuration data, based on configured features
> > * and host/accelerator capabilities when appropriate.
> > */
> > -static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> > +static void x86_cpu_expand_features(X86CPU *cpu)
> > {
> > CPUX86State *env = &cpu->env;
> > FeatureWord w;
> > - GList *l;
> > - Error *local_err = NULL;
> >
> > - /*TODO: Now cpu->max_features doesn't overwrite features
> > - * set using QOM properties, and we can convert
> > - * plus_features & minus_features to global properties
> > - * inside x86_cpu_parse_featurestr() too.
> > - */
> > if (cpu->max_features) {
> > for (w = 0; w < FEATURE_WORDS; w++) {
> > /* Override only features that weren't set explicitly
> > @@ -3476,22 +3472,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> > }
> > }
> >
> > - for (l = plus_features; l; l = l->next) {
> > - const char *prop = l->data;
> > - object_property_set_bool(OBJECT(cpu), true, prop, &local_err);
> > - if (local_err) {
> > - goto out;
> > - }
> > - }
> > -
> > - for (l = minus_features; l; l = l->next) {
> > - const char *prop = l->data;
> > - object_property_set_bool(OBJECT(cpu), false, prop, &local_err);
> > - if (local_err) {
> > - goto out;
> > - }
> > - }
> > -
> > if (!kvm_enabled() || !cpu->expose_kvm) {
> > env->features[FEAT_KVM] = 0;
> > }
> > @@ -3527,11 +3507,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> > if (env->cpuid_xlevel2 == UINT32_MAX) {
> > env->cpuid_xlevel2 = env->cpuid_min_xlevel2;
> > }
> > -
> > -out:
> > - if (local_err != NULL) {
> > - error_propagate(errp, local_err);
> > - }
> > }
> >
> > /*
> > @@ -3587,10 +3562,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
> > return;
> > }
> >
> > - x86_cpu_expand_features(cpu, &local_err);
> > - if (local_err) {
> > - goto out;
> > - }
> > + x86_cpu_expand_features(cpu);
> >
> > if (x86_cpu_filter_features(cpu) &&
> > (cpu->check_cpuid || cpu->enforce_cpuid)) {
> > --
> > 2.7.4
> >
> >
>
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties
2017-08-21 8:32 ` Igor Mammedov
@ 2017-08-23 14:24 ` Eduardo Habkost
2017-08-23 15:54 ` Igor Mammedov
0 siblings, 1 reply; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-23 14:24 UTC (permalink / raw)
To: Igor Mammedov; +Cc: qemu-devel
On Mon, Aug 21, 2017 at 10:32:41AM +0200, Igor Mammedov wrote:
> On Fri, 18 Aug 2017 14:40:29 -0300
> Eduardo Habkost <ehabkost@redhat.com> wrote:
>
> > On Thu, Aug 17, 2017 at 04:07:56PM +0200, Igor Mammedov wrote:
> > > Since
> > > (commit d4a606b3 i386: Don't override -cpu options on -cpu host/max)
> > > it became possible to delete hack where it was necessary to
> > > postpone applying plus/minus features to realize time
> > > after max_features were applied to keep legacy +-feat
> > > override semantics.
> > >
> > > With above commit it's possible to convert +-feat to a set
> > > of GlobalProperty items and keep +-feat override semantics,
> > > these properties should be added to global list at the end
> > > to override properties that were set with feat=on|off syntax.
> > >
> > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > [...]
> > > +/* Parse "+feature,-feature,feature=foo" CPU feature string */
> > > static void x86_cpu_parse_featurestr(const char *typename, char *features,
> > > Error **errp)
> > > {
> > > + /* Compatibily hack to maintain legacy +-feat semantic,
> > > + * where +-feat overwrites any feature set by
> > > + * feat=on|feat even if the later is parsed after +-feat
> > > + * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
> > > + */
> > > + GList *l, *plus_features = NULL, *minus_features = NULL;
> >
> > The warning about ambiguous CPU options exists since 2.8, I think
> > this is a good opportunity to get rid of the "[+-]feat overrides
> > feat=on|off" rule and simplify the parsing code. Do you want to
> > do this in the same patch?
> I'd prefer not to do it in this patch/series, as it's not related.
>
> WE can do cleanups later on top.
This is not a problem in this patch, but it is a problem when you
create a generic cpu_legacy_parse_featurestr() function in
another series. We should remove that useless feature from the
function before making it generic. It has the additional benefit
of making the resulting patch and code easier to review.
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties
2017-08-23 14:24 ` Eduardo Habkost
@ 2017-08-23 15:54 ` Igor Mammedov
2017-08-23 16:52 ` Eduardo Habkost
0 siblings, 1 reply; 86+ messages in thread
From: Igor Mammedov @ 2017-08-23 15:54 UTC (permalink / raw)
To: Eduardo Habkost; +Cc: qemu-devel
On Wed, 23 Aug 2017 11:24:27 -0300
Eduardo Habkost <ehabkost@redhat.com> wrote:
> On Mon, Aug 21, 2017 at 10:32:41AM +0200, Igor Mammedov wrote:
> > On Fri, 18 Aug 2017 14:40:29 -0300
> > Eduardo Habkost <ehabkost@redhat.com> wrote:
> >
> > > On Thu, Aug 17, 2017 at 04:07:56PM +0200, Igor Mammedov wrote:
> > > > Since
> > > > (commit d4a606b3 i386: Don't override -cpu options on -cpu host/max)
> > > > it became possible to delete hack where it was necessary to
> > > > postpone applying plus/minus features to realize time
> > > > after max_features were applied to keep legacy +-feat
> > > > override semantics.
> > > >
> > > > With above commit it's possible to convert +-feat to a set
> > > > of GlobalProperty items and keep +-feat override semantics,
> > > > these properties should be added to global list at the end
> > > > to override properties that were set with feat=on|off syntax.
> > > >
> > > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > > [...]
> > > > +/* Parse "+feature,-feature,feature=foo" CPU feature string */
> > > > static void x86_cpu_parse_featurestr(const char *typename, char *features,
> > > > Error **errp)
> > > > {
> > > > + /* Compatibily hack to maintain legacy +-feat semantic,
> > > > + * where +-feat overwrites any feature set by
> > > > + * feat=on|feat even if the later is parsed after +-feat
> > > > + * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
> > > > + */
> > > > + GList *l, *plus_features = NULL, *minus_features = NULL;
> > >
> > > The warning about ambiguous CPU options exists since 2.8, I think
> > > this is a good opportunity to get rid of the "[+-]feat overrides
> > > feat=on|off" rule and simplify the parsing code. Do you want to
> > > do this in the same patch?
> > I'd prefer not to do it in this patch/series, as it's not related.
> >
> > WE can do cleanups later on top.
>
> This is not a problem in this patch, but it is a problem when you
> create a generic cpu_legacy_parse_featurestr() function in
> another series. We should remove that useless feature from the
> function before making it generic. It has the additional benefit
> of making the resulting patch and code easier to review.
Removing means replacing warning with hard error, so that setups
that happen to use this combination would fail instead of silently
changing behavior.
So it won't actually simplify function but will cause side-effects
that weren't intended by this series.
As is in this series, I'm being rather conservative,
it's just replacing code duplication that exists in SPARC with x86 impl.
without behavioral change
(and even though it's in public header it's not really public API
that's why it's called legacy_foo() - to try preventing new usage).
If we decide to make it hard error, it would be better to do it separately.
I can post a patch on top if you insist, that would do it
so we could discuss there if it's ok to break users in 2 releases
or not but it should not hold this series as it's totally
orthogonal matter. (it also would be easier to revert patch
if we apply it but later decide to keep old ways).
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties
2017-08-23 15:54 ` Igor Mammedov
@ 2017-08-23 16:52 ` Eduardo Habkost
0 siblings, 0 replies; 86+ messages in thread
From: Eduardo Habkost @ 2017-08-23 16:52 UTC (permalink / raw)
To: Igor Mammedov; +Cc: qemu-devel
On Wed, Aug 23, 2017 at 05:54:12PM +0200, Igor Mammedov wrote:
> On Wed, 23 Aug 2017 11:24:27 -0300
> Eduardo Habkost <ehabkost@redhat.com> wrote:
>
> > On Mon, Aug 21, 2017 at 10:32:41AM +0200, Igor Mammedov wrote:
> > > On Fri, 18 Aug 2017 14:40:29 -0300
> > > Eduardo Habkost <ehabkost@redhat.com> wrote:
> > >
> > > > On Thu, Aug 17, 2017 at 04:07:56PM +0200, Igor Mammedov wrote:
> > > > > Since
> > > > > (commit d4a606b3 i386: Don't override -cpu options on -cpu host/max)
> > > > > it became possible to delete hack where it was necessary to
> > > > > postpone applying plus/minus features to realize time
> > > > > after max_features were applied to keep legacy +-feat
> > > > > override semantics.
> > > > >
> > > > > With above commit it's possible to convert +-feat to a set
> > > > > of GlobalProperty items and keep +-feat override semantics,
> > > > > these properties should be added to global list at the end
> > > > > to override properties that were set with feat=on|off syntax.
> > > > >
> > > > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > > > [...]
> > > > > +/* Parse "+feature,-feature,feature=foo" CPU feature string */
> > > > > static void x86_cpu_parse_featurestr(const char *typename, char *features,
> > > > > Error **errp)
> > > > > {
> > > > > + /* Compatibily hack to maintain legacy +-feat semantic,
> > > > > + * where +-feat overwrites any feature set by
> > > > > + * feat=on|feat even if the later is parsed after +-feat
> > > > > + * (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
> > > > > + */
> > > > > + GList *l, *plus_features = NULL, *minus_features = NULL;
> > > >
> > > > The warning about ambiguous CPU options exists since 2.8, I think
> > > > this is a good opportunity to get rid of the "[+-]feat overrides
> > > > feat=on|off" rule and simplify the parsing code. Do you want to
> > > > do this in the same patch?
> > > I'd prefer not to do it in this patch/series, as it's not related.
> > >
> > > WE can do cleanups later on top.
> >
> > This is not a problem in this patch, but it is a problem when you
> > create a generic cpu_legacy_parse_featurestr() function in
> > another series. We should remove that useless feature from the
> > function before making it generic. It has the additional benefit
> > of making the resulting patch and code easier to review.
> Removing means replacing warning with hard error, so that setups
> that happen to use this combination would fail instead of silently
> changing behavior.
> So it won't actually simplify function but will cause side-effects
> that weren't intended by this series.
I don't think it should be a hard error, it will be just a
semantics change (that we're already warning about for 3
releases). But I understand that you don't intend to introduce
this behavior change in x86 now.
However:
>
> As is in this series, I'm being rather conservative,
> it's just replacing code duplication that exists in SPARC with x86 impl.
> without behavioral change
You are not introducing behavior change on x86, that's right.
But you are introducing new behavior on sparc, and the new
behavior includes the ordering misfeature we have in x86. Let's
keep the misfeature x86-only.
> (and even though it's in public header it's not really public API
> that's why it's called legacy_foo() - to try preventing new usage).
>
> If we decide to make it hard error, it would be better to do it separately.
> I can post a patch on top if you insist, that would do it
> so we could discuss there if it's ok to break users in 2 releases
> or not but it should not hold this series as it's totally
> orthogonal matter. (it also would be easier to revert patch
> if we apply it but later decide to keep old ways).
I agree to implement x86 behavior change separately, but I insist
we don't introduce the ordering misfeature in sparc too. Fixing
x86 shouldn't hold the series, I agree. But making sparc parser
as bad as x86 is a blocker to me.
--
Eduardo
^ permalink raw reply [flat|nested] 86+ messages in thread
end of thread, other threads:[~2017-08-23 16:52 UTC | newest]
Thread overview: 86+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-07-14 13:51 [Qemu-devel] [PATCH 00/28] complete cpu QOMification and remove cpu_FOO_init() helpers Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 01/28] mips: cpu: move mmu/fpu/mvp_init to realize time Igor Mammedov
2017-07-15 21:48 ` Philippe Mathieu-Daudé
2017-07-14 13:51 ` [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses Igor Mammedov
2017-07-15 21:48 ` Philippe Mathieu-Daudé
2017-08-17 3:38 ` Philippe Mathieu-Daudé
2017-08-17 10:53 ` Igor Mammedov
2017-08-17 11:15 ` Philippe Mathieu-Daudé
2017-07-14 13:51 ` [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init() Igor Mammedov
2017-07-15 6:09 ` Hervé Poussineau
2017-07-15 21:48 ` Philippe Mathieu-Daudé
2017-07-14 13:51 ` [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses Igor Mammedov
2017-08-14 7:56 ` Igor Mammedov
2017-08-14 16:24 ` Artyom Tarasenko
2017-08-15 7:38 ` Igor Mammedov
2017-08-15 11:27 ` Mark Cave-Ayland
2017-08-17 3:50 ` Philippe Mathieu-Daudé
2017-08-17 14:11 ` Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 05/28] sparc: embed sparc_def_t into CPUSPARCState Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 06/28] sparc: convert cpu features to qdev properties Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 07/28] sparc: move adhoc CPUSPARCState initialization to realize time Igor Mammedov
2017-07-14 13:51 ` [Qemu-devel] [PATCH 08/28] x86: extract legacy cpu features format parser Igor Mammedov
2017-08-16 19:32 ` Eduardo Habkost
2017-08-17 14:07 ` [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties Igor Mammedov
2017-08-17 14:07 ` [Qemu-devel] [PATCH 2/2] x86: extract legacy cpu features format parser Igor Mammedov
2017-08-18 17:40 ` [Qemu-devel] [PATCH 1/2] target-i386: cpu: convert plus/minus properties to global properties Eduardo Habkost
2017-08-21 8:32 ` Igor Mammedov
2017-08-23 14:24 ` Eduardo Habkost
2017-08-23 15:54 ` Igor Mammedov
2017-08-23 16:52 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 09/28] sparc: replace custom cpu feature parsing with cpu_legacy_parse_featurestr() Igor Mammedov
2017-07-14 13:52 ` [Qemu-devel] [PATCH 10/28] sparc: replace cpu_sparc_init() with cpu_generic_init() Igor Mammedov
2017-07-14 13:52 ` [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() " Igor Mammedov
2017-07-18 12:30 ` Cornelia Huck
2017-07-18 13:17 ` Igor Mammedov
2017-08-14 8:03 ` Igor Mammedov
2017-08-14 8:53 ` Cornelia Huck
2017-08-14 9:24 ` Igor Mammedov
2017-08-14 9:27 ` Cornelia Huck
2017-07-14 13:52 ` [Qemu-devel] [PATCH 12/28] alpha: replace cpu_alpha_init() " Igor Mammedov
2017-07-15 18:05 ` Richard Henderson
2017-07-14 13:52 ` [Qemu-devel] [PATCH 13/28] hppa: replace cpu_hppa_init() " Igor Mammedov
2017-07-15 18:06 ` Richard Henderson
2017-07-14 13:52 ` [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() " Igor Mammedov
2017-07-15 8:05 ` Thomas Huth
2017-07-15 18:08 ` Richard Henderson
2017-07-15 20:57 ` Laurent Vivier
2017-07-17 10:41 ` Igor Mammedov
2017-07-17 15:05 ` Andreas Färber
2017-07-17 15:23 ` Igor Mammedov
2017-08-14 8:00 ` Igor Mammedov
2017-08-14 18:23 ` Laurent Vivier
2017-07-14 13:52 ` [Qemu-devel] [PATCH 15/28] microblaze: replace cpu_mb_init() " Igor Mammedov
2017-07-15 21:51 ` Philippe Mathieu-Daudé
2017-07-14 13:52 ` [Qemu-devel] [PATCH 16/28] nios2: replace cpu_nios2_init() " Igor Mammedov
2017-07-15 21:53 ` Philippe Mathieu-Daudé
2017-07-14 13:52 ` [Qemu-devel] [PATCH 17/28] tilegx: replace cpu_tilegx_init() " Igor Mammedov
2017-08-16 19:53 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() " Igor Mammedov
2017-08-16 19:56 ` Eduardo Habkost
2017-08-17 14:32 ` Igor Mammedov
2017-08-18 16:50 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 19/28] tricore: replace cpu_tricore_init() " Igor Mammedov
2017-08-16 19:56 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 20/28] sh4: replace cpu_sh4_init() " Igor Mammedov
2017-08-16 19:57 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 21/28] arm: replace cpu_arm_init() " Igor Mammedov
2017-08-14 8:53 ` Andrew Jones
2017-07-14 13:52 ` [Qemu-devel] [PATCH 22/28] cris: replace cpu_cris_init() " Igor Mammedov
2017-08-16 19:57 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 23/28] x86: replace cpu_x86_init() " Igor Mammedov
2017-08-16 19:57 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() " Igor Mammedov
2017-07-14 15:51 ` Michael Walle
2017-08-16 19:58 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 25/28] moxie: replace cpu_moxie_init() " Igor Mammedov
2017-08-16 19:58 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() " Igor Mammedov
2017-08-16 19:58 ` Eduardo Habkost
2017-08-16 21:28 ` Stafford Horne
2017-07-14 13:52 ` [Qemu-devel] [PATCH 27/28] unicore32: replace uc32_cpu_init() " Igor Mammedov
2017-08-16 19:59 ` Eduardo Habkost
2017-07-14 13:52 ` [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() " Igor Mammedov
2017-07-15 2:36 ` David Gibson
2017-07-15 6:09 ` Hervé Poussineau
2017-08-16 19:59 ` Eduardo Habkost
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