* [PATCH v3 1/2] arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node
@ 2017-08-24 8:46 Antoine Tenart
2017-08-24 8:46 ` [PATCH v3 2/2] arm64: dts: marvell: mcbin: enable more networking ports Antoine Tenart
0 siblings, 1 reply; 4+ messages in thread
From: Antoine Tenart @ 2017-08-24 8:46 UTC (permalink / raw)
To: linux-arm-kernel
The network driver on Marvell SoC (7k/8k) needs to access some registers
in the system controller to configure its ports at runtime. This patch
adds a phandle reference to the syscon system controller node in the
ppv2 node.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Tested-by: Marcin Wojtas <mw@semihalf.com>
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 1 +
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index 4c68605675a8..18299e164cb7 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -65,6 +65,7 @@
reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>, <&cpm_clk 1 5>;
clock-names = "pp_clk", "gop_clk", "mg_clk";
+ marvell,system-controller = <&cpm_syscon0>;
status = "disabled";
dma-coherent;
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
index 923f354b02f0..5ae8fa575859 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
@@ -72,6 +72,7 @@
reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cps_clk 1 3>, <&cps_clk 1 9>, <&cps_clk 1 5>;
clock-names = "pp_clk", "gop_clk", "mg_clk";
+ marvell,system-controller = <&cps_syscon0>;
status = "disabled";
dma-coherent;
--
2.13.5
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v3 2/2] arm64: dts: marvell: mcbin: enable more networking ports
2017-08-24 8:46 [PATCH v3 1/2] arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node Antoine Tenart
@ 2017-08-24 8:46 ` Antoine Tenart
2017-08-30 9:36 ` Antoine Tenart
0 siblings, 1 reply; 4+ messages in thread
From: Antoine Tenart @ 2017-08-24 8:46 UTC (permalink / raw)
To: linux-arm-kernel
This patch enables the two GE/SFP ports. They are configured in 10GKR
mode by default. To do this the cpm_xdmio is enabled as well, and two
phy descriptions are added.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Tested-by: Marcin Wojtas <mw@semihalf.com>
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 30 +++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
index abd39d1c1739..9f0a00802452 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
@@ -127,6 +127,30 @@
};
};
+&cpm_xmdio {
+ status = "okay";
+
+ phy0: ethernet-phy at 0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0>;
+ };
+
+ phy8: ethernet-phy at 8 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <8>;
+ };
+};
+
+&cpm_ethernet {
+ status = "okay";
+};
+
+&cpm_eth0 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "10gbase-kr";
+};
+
&cpm_sata0 {
/* CPM Lane 0 - U29 */
status = "okay";
@@ -154,6 +178,12 @@
status = "okay";
};
+&cps_eth0 {
+ status = "okay";
+ phy = <&phy8>;
+ phy-mode = "10gbase-kr";
+};
+
&cps_eth1 {
/* CPS Lane 0 - J5 (Gigabit RJ45) */
status = "okay";
--
2.13.5
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v3 2/2] arm64: dts: marvell: mcbin: enable more networking ports
2017-08-24 8:46 ` [PATCH v3 2/2] arm64: dts: marvell: mcbin: enable more networking ports Antoine Tenart
@ 2017-08-30 9:36 ` Antoine Tenart
2017-08-30 12:28 ` Gregory CLEMENT
0 siblings, 1 reply; 4+ messages in thread
From: Antoine Tenart @ 2017-08-30 9:36 UTC (permalink / raw)
To: linux-arm-kernel
Hi Gregory,
On Thu, Aug 24, 2017 at 10:46:39AM +0200, Antoine Tenart wrote:
> This patch enables the two GE/SFP ports. They are configured in 10GKR
> mode by default. To do this the cpm_xdmio is enabled as well, and two
> phy descriptions are added.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
> Tested-by: Marcin Wojtas <mw@semihalf.com>
These DT changes (patches 1/2 and 2/2) came along a series with patches
on the PPv2 driver. All the net part was merged in linux-next, but these
two dt patches were not taken because we all were in holidays.
I know it's very late, but it would be very nice to have these two
patches merged for 4.14.
Thanks!
Antoine
> ---
> arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 30 +++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
> index abd39d1c1739..9f0a00802452 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
> @@ -127,6 +127,30 @@
> };
> };
>
> +&cpm_xmdio {
> + status = "okay";
> +
> + phy0: ethernet-phy at 0 {
> + compatible = "ethernet-phy-ieee802.3-c45";
> + reg = <0>;
> + };
> +
> + phy8: ethernet-phy at 8 {
> + compatible = "ethernet-phy-ieee802.3-c45";
> + reg = <8>;
> + };
> +};
> +
> +&cpm_ethernet {
> + status = "okay";
> +};
> +
> +&cpm_eth0 {
> + status = "okay";
> + phy = <&phy0>;
> + phy-mode = "10gbase-kr";
> +};
> +
> &cpm_sata0 {
> /* CPM Lane 0 - U29 */
> status = "okay";
> @@ -154,6 +178,12 @@
> status = "okay";
> };
>
> +&cps_eth0 {
> + status = "okay";
> + phy = <&phy8>;
> + phy-mode = "10gbase-kr";
> +};
> +
> &cps_eth1 {
> /* CPS Lane 0 - J5 (Gigabit RJ45) */
> status = "okay";
> --
> 2.13.5
>
--
Antoine T?nart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v3 2/2] arm64: dts: marvell: mcbin: enable more networking ports
2017-08-30 9:36 ` Antoine Tenart
@ 2017-08-30 12:28 ` Gregory CLEMENT
0 siblings, 0 replies; 4+ messages in thread
From: Gregory CLEMENT @ 2017-08-30 12:28 UTC (permalink / raw)
To: linux-arm-kernel
Hi Antoine,
On mer., ao?t 30 2017, Antoine Tenart <antoine.tenart@free-electrons.com> wrote:
> Hi Gregory,
>
> On Thu, Aug 24, 2017 at 10:46:39AM +0200, Antoine Tenart wrote:
>> This patch enables the two GE/SFP ports. They are configured in 10GKR
>> mode by default. To do this the cpm_xdmio is enabled as well, and two
>> phy descriptions are added.
>>
>> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
>> Tested-by: Marcin Wojtas <mw@semihalf.com>
>
> These DT changes (patches 1/2 and 2/2) came along a series with patches
> on the PPv2 driver. All the net part was merged in linux-next, but these
> two dt patches were not taken because we all were in holidays.
>
> I know it's very late, but it would be very nice to have these two
> patches merged for 4.14.
I added them to mvebu/dt64 and made a pull request with the patch from
Thomas.
Thanks,
Gregory
>
> Thanks!
> Antoine
>
>> ---
>> arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 30 +++++++++++++++++++++++
>> 1 file changed, 30 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
>> index abd39d1c1739..9f0a00802452 100644
>> --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
>> +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
>> @@ -127,6 +127,30 @@
>> };
>> };
>>
>> +&cpm_xmdio {
>> + status = "okay";
>> +
>> + phy0: ethernet-phy at 0 {
>> + compatible = "ethernet-phy-ieee802.3-c45";
>> + reg = <0>;
>> + };
>> +
>> + phy8: ethernet-phy at 8 {
>> + compatible = "ethernet-phy-ieee802.3-c45";
>> + reg = <8>;
>> + };
>> +};
>> +
>> +&cpm_ethernet {
>> + status = "okay";
>> +};
>> +
>> +&cpm_eth0 {
>> + status = "okay";
>> + phy = <&phy0>;
>> + phy-mode = "10gbase-kr";
>> +};
>> +
>> &cpm_sata0 {
>> /* CPM Lane 0 - U29 */
>> status = "okay";
>> @@ -154,6 +178,12 @@
>> status = "okay";
>> };
>>
>> +&cps_eth0 {
>> + status = "okay";
>> + phy = <&phy8>;
>> + phy-mode = "10gbase-kr";
>> +};
>> +
>> &cps_eth1 {
>> /* CPS Lane 0 - J5 (Gigabit RJ45) */
>> status = "okay";
>> --
>> 2.13.5
>>
>
> --
> Antoine T?nart, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-08-30 12:28 UTC | newest]
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2017-08-24 8:46 [PATCH v3 1/2] arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node Antoine Tenart
2017-08-24 8:46 ` [PATCH v3 2/2] arm64: dts: marvell: mcbin: enable more networking ports Antoine Tenart
2017-08-30 9:36 ` Antoine Tenart
2017-08-30 12:28 ` Gregory CLEMENT
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