* [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable @ 2017-08-28 13:53 Juha-Pekka Heikkila 2017-08-28 13:53 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila ` (2 more replies) 0 siblings, 3 replies; 5+ messages in thread From: Juha-Pekka Heikkila @ 2017-08-28 13:53 UTC (permalink / raw) To: intel-gfx Move u32 dspaddr_offset from struct intel_crtc member into local variable in i9xx_update_primary_plane() Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/intel_display.c | 11 ++++++----- drivers/gpu/drm/i915/intel_drv.h | 1 - 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7cd392f..f922e2f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3287,13 +3287,14 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, int x = plane_state->main.x; int y = plane_state->main.y; unsigned long irqflags; + u32 dspaddr_offset; linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); if (INTEL_GEN(dev_priv) >= 4) - crtc->dspaddr_offset = plane_state->main.offset; + dspaddr_offset = plane_state->main.offset; else - crtc->dspaddr_offset = linear_offset; + dspaddr_offset = linear_offset; crtc->adjusted_x = x; crtc->adjusted_y = y; @@ -3322,18 +3323,18 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { I915_WRITE_FW(DSPSURF(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); I915_WRITE_FW(DSPOFFSET(plane), (y << 16) | x); } else if (INTEL_GEN(dev_priv) >= 4) { I915_WRITE_FW(DSPSURF(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); I915_WRITE_FW(DSPTILEOFF(plane), (y << 16) | x); I915_WRITE_FW(DSPLINOFF(plane), linear_offset); } else { I915_WRITE_FW(DSPADDR(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); } POSTING_READ_FW(reg); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 17649f1..0d0abed1 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -805,7 +805,6 @@ struct intel_crtc { /* Display surface base address adjustement for pageflips. Note that on * gen4+ this only adjusts up to a tile, offsets within a tile are * handled in the hw itself (with the TILEOFF register). */ - u32 dspaddr_offset; int adjusted_x; int adjusted_y; -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] drm/i915: Unify skylake plane update 2017-08-28 13:53 [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila @ 2017-08-28 13:53 ` Juha-Pekka Heikkila 2017-08-29 7:45 ` Jani Nikula 2017-08-28 13:53 ` [PATCH 3/3] drm/i915: Unify skylake plane disable Juha-Pekka Heikkila 2017-08-28 13:56 ` ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Patchwork 2 siblings, 1 reply; 5+ messages in thread From: Juha-Pekka Heikkila @ 2017-08-28 13:53 UTC (permalink / raw) To: intel-gfx Don't handle skylake primary plane separately as it is similar plane as the others. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/intel_display.c | 79 +----------------------------------- drivers/gpu/drm/i915/intel_drv.h | 3 ++ drivers/gpu/drm/i915/intel_sprite.c | 2 +- 3 files changed, 5 insertions(+), 79 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f922e2f..96eac33 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3534,83 +3534,6 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, return plane_ctl; } -static void skylake_update_primary_plane(struct intel_plane *plane, - const struct intel_crtc_state *crtc_state, - const struct intel_plane_state *plane_state) -{ - struct drm_i915_private *dev_priv = to_i915(plane->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); - const struct drm_framebuffer *fb = plane_state->base.fb; - enum plane_id plane_id = plane->id; - enum pipe pipe = plane->pipe; - u32 plane_ctl = plane_state->ctl; - unsigned int rotation = plane_state->base.rotation; - u32 stride = skl_plane_stride(fb, 0, rotation); - u32 aux_stride = skl_plane_stride(fb, 1, rotation); - u32 surf_addr = plane_state->main.offset; - int scaler_id = plane_state->scaler_id; - int src_x = plane_state->main.x; - int src_y = plane_state->main.y; - int src_w = drm_rect_width(&plane_state->base.src) >> 16; - int src_h = drm_rect_height(&plane_state->base.src) >> 16; - int dst_x = plane_state->base.dst.x1; - int dst_y = plane_state->base.dst.y1; - int dst_w = drm_rect_width(&plane_state->base.dst); - int dst_h = drm_rect_height(&plane_state->base.dst); - unsigned long irqflags; - - /* Sizes are 0 based */ - src_w--; - src_h--; - dst_w--; - dst_h--; - - crtc->dspaddr_offset = surf_addr; - - crtc->adjusted_x = src_x; - crtc->adjusted_y = src_y; - - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); - - if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) { - I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id), - PLANE_COLOR_PIPE_GAMMA_ENABLE | - PLANE_COLOR_PIPE_CSC_ENABLE | - PLANE_COLOR_PLANE_GAMMA_DISABLE); - } - - I915_WRITE_FW(PLANE_CTL(pipe, plane_id), plane_ctl); - I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (src_y << 16) | src_x); - I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride); - I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); - I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), - (plane_state->aux.offset - surf_addr) | aux_stride); - I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), - (plane_state->aux.y << 16) | plane_state->aux.x); - - if (scaler_id >= 0) { - uint32_t ps_ctrl = 0; - - WARN_ON(!dst_w || !dst_h); - ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane_id) | - crtc_state->scaler_state.scalers[scaler_id].mode; - I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl); - I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0); - I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (dst_x << 16) | dst_y); - I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | dst_h); - I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0); - } else { - I915_WRITE_FW(PLANE_POS(pipe, plane_id), (dst_y << 16) | dst_x); - } - - I915_WRITE_FW(PLANE_SURF(pipe, plane_id), - intel_plane_ggtt_offset(plane_state) + surf_addr); - - POSTING_READ_FW(PLANE_SURF(pipe, plane_id)); - - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); -} - static void skylake_disable_primary_plane(struct intel_plane *primary, struct intel_crtc *crtc) { @@ -13275,7 +13198,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) else modifiers = skl_format_modifiers_noccs; - primary->update_plane = skylake_update_primary_plane; + primary->update_plane = skl_update_plane; primary->disable_plane = skylake_disable_primary_plane; } else if (INTEL_GEN(dev_priv) >= 4) { intel_primary_formats = i965_primary_formats; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 0d0abed1..1efd612 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1887,6 +1887,9 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, struct drm_file *file_priv); void intel_pipe_update_start(struct intel_crtc *crtc); void intel_pipe_update_end(struct intel_crtc *crtc); +void skl_update_plane(struct intel_plane *plane, + const struct intel_crtc_state *crtc_state, + const struct intel_plane_state *plane_state); /* intel_tv.c */ void intel_tv_init(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 524933b..ef16519 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -225,7 +225,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc) #endif } -static void +void skl_update_plane(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/3] drm/i915: Unify skylake plane update 2017-08-28 13:53 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila @ 2017-08-29 7:45 ` Jani Nikula 0 siblings, 0 replies; 5+ messages in thread From: Jani Nikula @ 2017-08-29 7:45 UTC (permalink / raw) To: Juha-Pekka Heikkila, intel-gfx On Mon, 28 Aug 2017, Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> wrote: > Don't handle skylake primary plane separately as it is similar > plane as the others. This misses another reference to skylake_update_primary_plane, as reported by CI. BR, Jani. > > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> > --- > drivers/gpu/drm/i915/intel_display.c | 79 +----------------------------------- > drivers/gpu/drm/i915/intel_drv.h | 3 ++ > drivers/gpu/drm/i915/intel_sprite.c | 2 +- > 3 files changed, 5 insertions(+), 79 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index f922e2f..96eac33 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3534,83 +3534,6 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, > return plane_ctl; > } > > -static void skylake_update_primary_plane(struct intel_plane *plane, > - const struct intel_crtc_state *crtc_state, > - const struct intel_plane_state *plane_state) > -{ > - struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > - const struct drm_framebuffer *fb = plane_state->base.fb; > - enum plane_id plane_id = plane->id; > - enum pipe pipe = plane->pipe; > - u32 plane_ctl = plane_state->ctl; > - unsigned int rotation = plane_state->base.rotation; > - u32 stride = skl_plane_stride(fb, 0, rotation); > - u32 aux_stride = skl_plane_stride(fb, 1, rotation); > - u32 surf_addr = plane_state->main.offset; > - int scaler_id = plane_state->scaler_id; > - int src_x = plane_state->main.x; > - int src_y = plane_state->main.y; > - int src_w = drm_rect_width(&plane_state->base.src) >> 16; > - int src_h = drm_rect_height(&plane_state->base.src) >> 16; > - int dst_x = plane_state->base.dst.x1; > - int dst_y = plane_state->base.dst.y1; > - int dst_w = drm_rect_width(&plane_state->base.dst); > - int dst_h = drm_rect_height(&plane_state->base.dst); > - unsigned long irqflags; > - > - /* Sizes are 0 based */ > - src_w--; > - src_h--; > - dst_w--; > - dst_h--; > - > - crtc->dspaddr_offset = surf_addr; > - > - crtc->adjusted_x = src_x; > - crtc->adjusted_y = src_y; > - > - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); > - > - if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) { > - I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id), > - PLANE_COLOR_PIPE_GAMMA_ENABLE | > - PLANE_COLOR_PIPE_CSC_ENABLE | > - PLANE_COLOR_PLANE_GAMMA_DISABLE); > - } > - > - I915_WRITE_FW(PLANE_CTL(pipe, plane_id), plane_ctl); > - I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (src_y << 16) | src_x); > - I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride); > - I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); > - I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), > - (plane_state->aux.offset - surf_addr) | aux_stride); > - I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), > - (plane_state->aux.y << 16) | plane_state->aux.x); > - > - if (scaler_id >= 0) { > - uint32_t ps_ctrl = 0; > - > - WARN_ON(!dst_w || !dst_h); > - ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane_id) | > - crtc_state->scaler_state.scalers[scaler_id].mode; > - I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl); > - I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0); > - I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (dst_x << 16) | dst_y); > - I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | dst_h); > - I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0); > - } else { > - I915_WRITE_FW(PLANE_POS(pipe, plane_id), (dst_y << 16) | dst_x); > - } > - > - I915_WRITE_FW(PLANE_SURF(pipe, plane_id), > - intel_plane_ggtt_offset(plane_state) + surf_addr); > - > - POSTING_READ_FW(PLANE_SURF(pipe, plane_id)); > - > - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); > -} > - > static void skylake_disable_primary_plane(struct intel_plane *primary, > struct intel_crtc *crtc) > { > @@ -13275,7 +13198,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) > else > modifiers = skl_format_modifiers_noccs; > > - primary->update_plane = skylake_update_primary_plane; > + primary->update_plane = skl_update_plane; > primary->disable_plane = skylake_disable_primary_plane; > } else if (INTEL_GEN(dev_priv) >= 4) { > intel_primary_formats = i965_primary_formats; > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 0d0abed1..1efd612 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1887,6 +1887,9 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, > struct drm_file *file_priv); > void intel_pipe_update_start(struct intel_crtc *crtc); > void intel_pipe_update_end(struct intel_crtc *crtc); > +void skl_update_plane(struct intel_plane *plane, > + const struct intel_crtc_state *crtc_state, > + const struct intel_plane_state *plane_state); > > /* intel_tv.c */ > void intel_tv_init(struct drm_i915_private *dev_priv); > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 524933b..ef16519 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -225,7 +225,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc) > #endif > } > > -static void > +void > skl_update_plane(struct intel_plane *plane, > const struct intel_crtc_state *crtc_state, > const struct intel_plane_state *plane_state) -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 3/3] drm/i915: Unify skylake plane disable 2017-08-28 13:53 [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila 2017-08-28 13:53 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila @ 2017-08-28 13:53 ` Juha-Pekka Heikkila 2017-08-28 13:56 ` ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Patchwork 2 siblings, 0 replies; 5+ messages in thread From: Juha-Pekka Heikkila @ 2017-08-28 13:53 UTC (permalink / raw) To: intel-gfx Don't handle skylake primary plane separately as it is similar plane as the others. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/intel_display.c | 19 +------------------ drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_sprite.c | 2 +- 3 files changed, 3 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 96eac33..66a83cb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3534,23 +3534,6 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, return plane_ctl; } -static void skylake_disable_primary_plane(struct intel_plane *primary, - struct intel_crtc *crtc) -{ - struct drm_i915_private *dev_priv = to_i915(primary->base.dev); - enum plane_id plane_id = primary->id; - enum pipe pipe = primary->pipe; - unsigned long irqflags; - - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); - - I915_WRITE_FW(PLANE_CTL(pipe, plane_id), 0); - I915_WRITE_FW(PLANE_SURF(pipe, plane_id), 0); - POSTING_READ_FW(PLANE_SURF(pipe, plane_id)); - - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); -} - static int __intel_display_resume(struct drm_device *dev, struct drm_atomic_state *state, @@ -13199,7 +13182,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) modifiers = skl_format_modifiers_noccs; primary->update_plane = skl_update_plane; - primary->disable_plane = skylake_disable_primary_plane; + primary->disable_plane = skl_disable_plane; } else if (INTEL_GEN(dev_priv) >= 4) { intel_primary_formats = i965_primary_formats; num_formats = ARRAY_SIZE(i965_primary_formats); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1efd612..18752b7 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1890,6 +1890,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc); void skl_update_plane(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state); +void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc); /* intel_tv.c */ void intel_tv_init(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index ef16519..bc6bae6 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -306,7 +306,7 @@ skl_update_plane(struct intel_plane *plane, spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); } -static void +void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(plane->base.dev); -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable 2017-08-28 13:53 [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila 2017-08-28 13:53 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila 2017-08-28 13:53 ` [PATCH 3/3] drm/i915: Unify skylake plane disable Juha-Pekka Heikkila @ 2017-08-28 13:56 ` Patchwork 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2017-08-28 13:56 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable URL : https://patchwork.freedesktop.org/series/29429/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK include/generated/bounds.h CHK include/generated/timeconst.h CHK include/generated/asm-offsets.h CALL scripts/checksyscalls.sh CHK scripts/mod/devicetable-offsets.h CHK include/generated/compile.h CHK kernel/config_data.h CC [M] drivers/gpu/drm/i915/intel_display.o drivers/gpu/drm/i915/intel_display.c: In function ‘intel_primary_plane_create’: drivers/gpu/drm/i915/intel_display.c:13174:27: error: ‘skylake_update_primary_plane’ undeclared (first use in this function) primary->update_plane = skylake_update_primary_plane; ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/intel_display.c:13174:27: note: each undeclared identifier is reported only once for each function it appears in drivers/gpu/drm/i915/intel_display.c:13175:28: error: ‘skylake_disable_primary_plane’ undeclared (first use in this function) primary->disable_plane = skylake_disable_primary_plane; ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ scripts/Makefile.build:302: recipe for target 'drivers/gpu/drm/i915/intel_display.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_display.o] Error 1 scripts/Makefile.build:561: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:561: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:561: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1019: recipe for target 'drivers' failed make: *** [drivers] Error 2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-08-29 7:46 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-08-28 13:53 [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Juha-Pekka Heikkila 2017-08-28 13:53 ` [PATCH 2/3] drm/i915: Unify skylake plane update Juha-Pekka Heikkila 2017-08-29 7:45 ` Jani Nikula 2017-08-28 13:53 ` [PATCH 3/3] drm/i915: Unify skylake plane disable Juha-Pekka Heikkila 2017-08-28 13:56 ` ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable Patchwork
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